diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-14 11:59:48 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-14 11:59:48 -0400 |
commit | cbe619b162121577bc1e8ed4384dfb85f19e43d8 (patch) | |
tree | a26287f4fcb2ae732ac3f5ee1e18473de8a2247a /drivers/video | |
parent | 5dd80d5d096f58b7a83ae493a20bfc9d0de30226 (diff) | |
parent | 45b3f4cc6025bdb14beb65b8a3a732bf55d1bc41 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: (23 commits)
[SPARC64]: virt_to_real_irq_table --> virt_irq_table
[SPARC64]: virt_irq --> bucket mapping no longer necessary
[SPARC64]: Kill ugly __bucket() macro.
[SPARC64]: Kill ugly __irq_ino() macro.
[SPARC64]: Only use bypass accesses to INO buckets.
[SPARC64]: Update defconfig.
[SPARC64]: Use sun4v VIRQ interfaces as intended.
[SPARC64]: Allocate ivector_table dynamically.
[SPARC64]: Access ivector_table[] using physical addresses.
[SPARC64]: Make IVEC pointers 64-bit.
[SPARC64]: Fix register usage in xor_raid_4().
[SPARC64]: Kill pci_memspace_mask.
[SPARC64]: Consolidate MSI support code.
[SPARC/64]: Move of_platform_driver initialisations: arch/sparc{,64}.
[SPARC64]: Fix bugs in SYSV IPC handling in 64-bit processes.
[SPARC/64]: Prepare to remove of_platform_driver name.
[SPARC32]: Add irqflags.h to sparc32 and use it from generic code.
[SPARC64]: beautify vmlinux.lds
[SPARC]: beautify vmlinux.lds
[SPARC64]: Enable MSI on sun4u Fire PCI-E controllers.
...
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/cg6.c | 294 | ||||
-rw-r--r-- | drivers/video/ffb.c | 161 |
2 files changed, 244 insertions, 211 deletions
diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c index ee9046db9c7d..549891d76ef5 100644 --- a/drivers/video/cg6.c +++ b/drivers/video/cg6.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/mm.h> | 19 | #include <linux/mm.h> |
20 | 20 | ||
21 | #include <asm/io.h> | 21 | #include <asm/io.h> |
22 | #include <asm/prom.h> | ||
23 | #include <asm/of_device.h> | 22 | #include <asm/of_device.h> |
24 | #include <asm/fbio.h> | 23 | #include <asm/fbio.h> |
25 | 24 | ||
@@ -38,6 +37,7 @@ static void cg6_fillrect(struct fb_info *, const struct fb_fillrect *); | |||
38 | static int cg6_sync(struct fb_info *); | 37 | static int cg6_sync(struct fb_info *); |
39 | static int cg6_mmap(struct fb_info *, struct vm_area_struct *); | 38 | static int cg6_mmap(struct fb_info *, struct vm_area_struct *); |
40 | static int cg6_ioctl(struct fb_info *, unsigned int, unsigned long); | 39 | static int cg6_ioctl(struct fb_info *, unsigned int, unsigned long); |
40 | static void cg6_copyarea(struct fb_info *info, const struct fb_copyarea *area); | ||
41 | 41 | ||
42 | /* | 42 | /* |
43 | * Frame buffer operations | 43 | * Frame buffer operations |
@@ -48,7 +48,7 @@ static struct fb_ops cg6_ops = { | |||
48 | .fb_setcolreg = cg6_setcolreg, | 48 | .fb_setcolreg = cg6_setcolreg, |
49 | .fb_blank = cg6_blank, | 49 | .fb_blank = cg6_blank, |
50 | .fb_fillrect = cg6_fillrect, | 50 | .fb_fillrect = cg6_fillrect, |
51 | .fb_copyarea = cfb_copyarea, | 51 | .fb_copyarea = cg6_copyarea, |
52 | .fb_imageblit = cg6_imageblit, | 52 | .fb_imageblit = cg6_imageblit, |
53 | .fb_sync = cg6_sync, | 53 | .fb_sync = cg6_sync, |
54 | .fb_mmap = cg6_mmap, | 54 | .fb_mmap = cg6_mmap, |
@@ -65,41 +65,41 @@ static struct fb_ops cg6_ops = { | |||
65 | * The FBC could be the frame buffer control | 65 | * The FBC could be the frame buffer control |
66 | * The FHC could is the frame buffer hardware control. | 66 | * The FHC could is the frame buffer hardware control. |
67 | */ | 67 | */ |
68 | #define CG6_ROM_OFFSET 0x0UL | 68 | #define CG6_ROM_OFFSET 0x0UL |
69 | #define CG6_BROOKTREE_OFFSET 0x200000UL | 69 | #define CG6_BROOKTREE_OFFSET 0x200000UL |
70 | #define CG6_DHC_OFFSET 0x240000UL | 70 | #define CG6_DHC_OFFSET 0x240000UL |
71 | #define CG6_ALT_OFFSET 0x280000UL | 71 | #define CG6_ALT_OFFSET 0x280000UL |
72 | #define CG6_FHC_OFFSET 0x300000UL | 72 | #define CG6_FHC_OFFSET 0x300000UL |
73 | #define CG6_THC_OFFSET 0x301000UL | 73 | #define CG6_THC_OFFSET 0x301000UL |
74 | #define CG6_FBC_OFFSET 0x700000UL | 74 | #define CG6_FBC_OFFSET 0x700000UL |
75 | #define CG6_TEC_OFFSET 0x701000UL | 75 | #define CG6_TEC_OFFSET 0x701000UL |
76 | #define CG6_RAM_OFFSET 0x800000UL | 76 | #define CG6_RAM_OFFSET 0x800000UL |
77 | 77 | ||
78 | /* FHC definitions */ | 78 | /* FHC definitions */ |
79 | #define CG6_FHC_FBID_SHIFT 24 | 79 | #define CG6_FHC_FBID_SHIFT 24 |
80 | #define CG6_FHC_FBID_MASK 255 | 80 | #define CG6_FHC_FBID_MASK 255 |
81 | #define CG6_FHC_REV_SHIFT 20 | 81 | #define CG6_FHC_REV_SHIFT 20 |
82 | #define CG6_FHC_REV_MASK 15 | 82 | #define CG6_FHC_REV_MASK 15 |
83 | #define CG6_FHC_FROP_DISABLE (1 << 19) | 83 | #define CG6_FHC_FROP_DISABLE (1 << 19) |
84 | #define CG6_FHC_ROW_DISABLE (1 << 18) | 84 | #define CG6_FHC_ROW_DISABLE (1 << 18) |
85 | #define CG6_FHC_SRC_DISABLE (1 << 17) | 85 | #define CG6_FHC_SRC_DISABLE (1 << 17) |
86 | #define CG6_FHC_DST_DISABLE (1 << 16) | 86 | #define CG6_FHC_DST_DISABLE (1 << 16) |
87 | #define CG6_FHC_RESET (1 << 15) | 87 | #define CG6_FHC_RESET (1 << 15) |
88 | #define CG6_FHC_LITTLE_ENDIAN (1 << 13) | 88 | #define CG6_FHC_LITTLE_ENDIAN (1 << 13) |
89 | #define CG6_FHC_RES_MASK (3 << 11) | 89 | #define CG6_FHC_RES_MASK (3 << 11) |
90 | #define CG6_FHC_1024 (0 << 11) | 90 | #define CG6_FHC_1024 (0 << 11) |
91 | #define CG6_FHC_1152 (1 << 11) | 91 | #define CG6_FHC_1152 (1 << 11) |
92 | #define CG6_FHC_1280 (2 << 11) | 92 | #define CG6_FHC_1280 (2 << 11) |
93 | #define CG6_FHC_1600 (3 << 11) | 93 | #define CG6_FHC_1600 (3 << 11) |
94 | #define CG6_FHC_CPU_MASK (3 << 9) | 94 | #define CG6_FHC_CPU_MASK (3 << 9) |
95 | #define CG6_FHC_CPU_SPARC (0 << 9) | 95 | #define CG6_FHC_CPU_SPARC (0 << 9) |
96 | #define CG6_FHC_CPU_68020 (1 << 9) | 96 | #define CG6_FHC_CPU_68020 (1 << 9) |
97 | #define CG6_FHC_CPU_386 (2 << 9) | 97 | #define CG6_FHC_CPU_386 (2 << 9) |
98 | #define CG6_FHC_TEST (1 << 8) | 98 | #define CG6_FHC_TEST (1 << 8) |
99 | #define CG6_FHC_TEST_X_SHIFT 4 | 99 | #define CG6_FHC_TEST_X_SHIFT 4 |
100 | #define CG6_FHC_TEST_X_MASK 15 | 100 | #define CG6_FHC_TEST_X_MASK 15 |
101 | #define CG6_FHC_TEST_Y_SHIFT 0 | 101 | #define CG6_FHC_TEST_Y_SHIFT 0 |
102 | #define CG6_FHC_TEST_Y_MASK 15 | 102 | #define CG6_FHC_TEST_Y_MASK 15 |
103 | 103 | ||
104 | /* FBC mode definitions */ | 104 | /* FBC mode definitions */ |
105 | #define CG6_FBC_BLIT_IGNORE 0x00000000 | 105 | #define CG6_FBC_BLIT_IGNORE 0x00000000 |
@@ -150,17 +150,17 @@ static struct fb_ops cg6_ops = { | |||
150 | #define CG6_FBC_INDEX_MASK 0x00000030 | 150 | #define CG6_FBC_INDEX_MASK 0x00000030 |
151 | 151 | ||
152 | /* THC definitions */ | 152 | /* THC definitions */ |
153 | #define CG6_THC_MISC_REV_SHIFT 16 | 153 | #define CG6_THC_MISC_REV_SHIFT 16 |
154 | #define CG6_THC_MISC_REV_MASK 15 | 154 | #define CG6_THC_MISC_REV_MASK 15 |
155 | #define CG6_THC_MISC_RESET (1 << 12) | 155 | #define CG6_THC_MISC_RESET (1 << 12) |
156 | #define CG6_THC_MISC_VIDEO (1 << 10) | 156 | #define CG6_THC_MISC_VIDEO (1 << 10) |
157 | #define CG6_THC_MISC_SYNC (1 << 9) | 157 | #define CG6_THC_MISC_SYNC (1 << 9) |
158 | #define CG6_THC_MISC_VSYNC (1 << 8) | 158 | #define CG6_THC_MISC_VSYNC (1 << 8) |
159 | #define CG6_THC_MISC_SYNC_ENAB (1 << 7) | 159 | #define CG6_THC_MISC_SYNC_ENAB (1 << 7) |
160 | #define CG6_THC_MISC_CURS_RES (1 << 6) | 160 | #define CG6_THC_MISC_CURS_RES (1 << 6) |
161 | #define CG6_THC_MISC_INT_ENAB (1 << 5) | 161 | #define CG6_THC_MISC_INT_ENAB (1 << 5) |
162 | #define CG6_THC_MISC_INT (1 << 4) | 162 | #define CG6_THC_MISC_INT (1 << 4) |
163 | #define CG6_THC_MISC_INIT 0x9f | 163 | #define CG6_THC_MISC_INIT 0x9f |
164 | 164 | ||
165 | /* The contents are unknown */ | 165 | /* The contents are unknown */ |
166 | struct cg6_tec { | 166 | struct cg6_tec { |
@@ -170,25 +170,25 @@ struct cg6_tec { | |||
170 | }; | 170 | }; |
171 | 171 | ||
172 | struct cg6_thc { | 172 | struct cg6_thc { |
173 | u32 thc_pad0[512]; | 173 | u32 thc_pad0[512]; |
174 | u32 thc_hs; /* hsync timing */ | 174 | u32 thc_hs; /* hsync timing */ |
175 | u32 thc_hsdvs; | 175 | u32 thc_hsdvs; |
176 | u32 thc_hd; | 176 | u32 thc_hd; |
177 | u32 thc_vs; /* vsync timing */ | 177 | u32 thc_vs; /* vsync timing */ |
178 | u32 thc_vd; | 178 | u32 thc_vd; |
179 | u32 thc_refresh; | 179 | u32 thc_refresh; |
180 | u32 thc_misc; | 180 | u32 thc_misc; |
181 | u32 thc_pad1[56]; | 181 | u32 thc_pad1[56]; |
182 | u32 thc_cursxy; /* cursor x,y position (16 bits each) */ | 182 | u32 thc_cursxy; /* cursor x,y position (16 bits each) */ |
183 | u32 thc_cursmask[32]; /* cursor mask bits */ | 183 | u32 thc_cursmask[32]; /* cursor mask bits */ |
184 | u32 thc_cursbits[32]; /* what to show where mask enabled */ | 184 | u32 thc_cursbits[32]; /* what to show where mask enabled */ |
185 | }; | 185 | }; |
186 | 186 | ||
187 | struct cg6_fbc { | 187 | struct cg6_fbc { |
188 | u32 xxx0[1]; | 188 | u32 xxx0[1]; |
189 | u32 mode; | 189 | u32 mode; |
190 | u32 clip; | 190 | u32 clip; |
191 | u32 xxx1[1]; | 191 | u32 xxx1[1]; |
192 | u32 s; | 192 | u32 s; |
193 | u32 draw; | 193 | u32 draw; |
194 | u32 blit; | 194 | u32 blit; |
@@ -243,10 +243,10 @@ struct cg6_fbc { | |||
243 | }; | 243 | }; |
244 | 244 | ||
245 | struct bt_regs { | 245 | struct bt_regs { |
246 | u32 addr; | 246 | u32 addr; |
247 | u32 color_map; | 247 | u32 color_map; |
248 | u32 control; | 248 | u32 control; |
249 | u32 cursor; | 249 | u32 cursor; |
250 | }; | 250 | }; |
251 | 251 | ||
252 | struct cg6_par { | 252 | struct cg6_par { |
@@ -267,7 +267,7 @@ struct cg6_par { | |||
267 | 267 | ||
268 | static int cg6_sync(struct fb_info *info) | 268 | static int cg6_sync(struct fb_info *info) |
269 | { | 269 | { |
270 | struct cg6_par *par = (struct cg6_par *) info->par; | 270 | struct cg6_par *par = (struct cg6_par *)info->par; |
271 | struct cg6_fbc __iomem *fbc = par->fbc; | 271 | struct cg6_fbc __iomem *fbc = par->fbc; |
272 | int limit = 10000; | 272 | int limit = 10000; |
273 | 273 | ||
@@ -281,24 +281,24 @@ static int cg6_sync(struct fb_info *info) | |||
281 | } | 281 | } |
282 | 282 | ||
283 | /** | 283 | /** |
284 | * cg6_fillrect - REQUIRED function. Can use generic routines if | 284 | * cg6_fillrect - Draws a rectangle on the screen. |
285 | * non acclerated hardware and packed pixel based. | ||
286 | * Draws a rectangle on the screen. | ||
287 | * | 285 | * |
288 | * @info: frame buffer structure that represents a single frame buffer | 286 | * @info: frame buffer structure that represents a single frame buffer |
289 | * @rect: structure defining the rectagle and operation. | 287 | * @rect: structure defining the rectagle and operation. |
290 | */ | 288 | */ |
291 | static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | 289 | static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
292 | { | 290 | { |
293 | struct cg6_par *par = (struct cg6_par *) info->par; | 291 | struct cg6_par *par = (struct cg6_par *)info->par; |
294 | struct cg6_fbc __iomem *fbc = par->fbc; | 292 | struct cg6_fbc __iomem *fbc = par->fbc; |
295 | unsigned long flags; | 293 | unsigned long flags; |
296 | s32 val; | 294 | s32 val; |
297 | 295 | ||
298 | /* XXX doesn't handle ROP_XOR */ | 296 | /* CG6 doesn't handle ROP_XOR */ |
299 | 297 | ||
300 | spin_lock_irqsave(&par->lock, flags); | 298 | spin_lock_irqsave(&par->lock, flags); |
299 | |||
301 | cg6_sync(info); | 300 | cg6_sync(info); |
301 | |||
302 | sbus_writel(rect->color, &fbc->fg); | 302 | sbus_writel(rect->color, &fbc->fg); |
303 | sbus_writel(~(u32)0, &fbc->pixelm); | 303 | sbus_writel(~(u32)0, &fbc->pixelm); |
304 | sbus_writel(0xea80ff00, &fbc->alu); | 304 | sbus_writel(0xea80ff00, &fbc->alu); |
@@ -316,16 +316,56 @@ static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | |||
316 | } | 316 | } |
317 | 317 | ||
318 | /** | 318 | /** |
319 | * cg6_imageblit - REQUIRED function. Can use generic routines if | 319 | * cg6_copyarea - Copies one area of the screen to another area. |
320 | * non acclerated hardware and packed pixel based. | 320 | * |
321 | * Copies a image from system memory to the screen. | 321 | * @info: frame buffer structure that represents a single frame buffer |
322 | * @area: Structure providing the data to copy the framebuffer contents | ||
323 | * from one region to another. | ||
324 | * | ||
325 | * This drawing operation copies a rectangular area from one area of the | ||
326 | * screen to another area. | ||
327 | */ | ||
328 | static void cg6_copyarea(struct fb_info *info, const struct fb_copyarea *area) | ||
329 | { | ||
330 | struct cg6_par *par = (struct cg6_par *)info->par; | ||
331 | struct cg6_fbc __iomem *fbc = par->fbc; | ||
332 | unsigned long flags; | ||
333 | int i; | ||
334 | |||
335 | spin_lock_irqsave(&par->lock, flags); | ||
336 | |||
337 | cg6_sync(info); | ||
338 | |||
339 | sbus_writel(0xff, &fbc->fg); | ||
340 | sbus_writel(0x00, &fbc->bg); | ||
341 | sbus_writel(~0, &fbc->pixelm); | ||
342 | sbus_writel(0xe880cccc, &fbc->alu); | ||
343 | sbus_writel(0, &fbc->s); | ||
344 | sbus_writel(0, &fbc->clip); | ||
345 | |||
346 | sbus_writel(area->sy, &fbc->y0); | ||
347 | sbus_writel(area->sx, &fbc->x0); | ||
348 | sbus_writel(area->sy + area->height - 1, &fbc->y1); | ||
349 | sbus_writel(area->sx + area->width - 1, &fbc->x1); | ||
350 | sbus_writel(area->dy, &fbc->y2); | ||
351 | sbus_writel(area->dx, &fbc->x2); | ||
352 | sbus_writel(area->dy + area->height - 1, &fbc->y3); | ||
353 | sbus_writel(area->dx + area->width - 1, &fbc->x3); | ||
354 | do { | ||
355 | i = sbus_readl(&fbc->blit); | ||
356 | } while (i < 0 && (i & 0x20000000)); | ||
357 | spin_unlock_irqrestore(&par->lock, flags); | ||
358 | } | ||
359 | |||
360 | /** | ||
361 | * cg6_imageblit - Copies a image from system memory to the screen. | ||
322 | * | 362 | * |
323 | * @info: frame buffer structure that represents a single frame buffer | 363 | * @info: frame buffer structure that represents a single frame buffer |
324 | * @image: structure defining the image. | 364 | * @image: structure defining the image. |
325 | */ | 365 | */ |
326 | static void cg6_imageblit(struct fb_info *info, const struct fb_image *image) | 366 | static void cg6_imageblit(struct fb_info *info, const struct fb_image *image) |
327 | { | 367 | { |
328 | struct cg6_par *par = (struct cg6_par *) info->par; | 368 | struct cg6_par *par = (struct cg6_par *)info->par; |
329 | struct cg6_fbc __iomem *fbc = par->fbc; | 369 | struct cg6_fbc __iomem *fbc = par->fbc; |
330 | const u8 *data = image->data; | 370 | const u8 *data = image->data; |
331 | unsigned long flags; | 371 | unsigned long flags; |
@@ -363,7 +403,7 @@ static void cg6_imageblit(struct fb_info *info, const struct fb_image *image) | |||
363 | sbus_writel(y, &fbc->y0); | 403 | sbus_writel(y, &fbc->y0); |
364 | sbus_writel(x, &fbc->x0); | 404 | sbus_writel(x, &fbc->x0); |
365 | sbus_writel(x + 32 - 1, &fbc->x1); | 405 | sbus_writel(x + 32 - 1, &fbc->x1); |
366 | 406 | ||
367 | val = ((u32)data[0] << 24) | | 407 | val = ((u32)data[0] << 24) | |
368 | ((u32)data[1] << 16) | | 408 | ((u32)data[1] << 16) | |
369 | ((u32)data[2] << 8) | | 409 | ((u32)data[2] << 8) | |
@@ -404,19 +444,20 @@ static void cg6_imageblit(struct fb_info *info, const struct fb_image *image) | |||
404 | } | 444 | } |
405 | 445 | ||
406 | /** | 446 | /** |
407 | * cg6_setcolreg - Optional function. Sets a color register. | 447 | * cg6_setcolreg - Sets a color register. |
408 | * @regno: boolean, 0 copy local, 1 get_user() function | 448 | * |
409 | * @red: frame buffer colormap structure | 449 | * @regno: boolean, 0 copy local, 1 get_user() function |
410 | * @green: The green value which can be up to 16 bits wide | 450 | * @red: frame buffer colormap structure |
411 | * @blue: The blue value which can be up to 16 bits wide. | 451 | * @green: The green value which can be up to 16 bits wide |
412 | * @transp: If supported the alpha value which can be up to 16 bits wide. | 452 | * @blue: The blue value which can be up to 16 bits wide. |
413 | * @info: frame buffer info structure | 453 | * @transp: If supported the alpha value which can be up to 16 bits wide. |
454 | * @info: frame buffer info structure | ||
414 | */ | 455 | */ |
415 | static int cg6_setcolreg(unsigned regno, | 456 | static int cg6_setcolreg(unsigned regno, |
416 | unsigned red, unsigned green, unsigned blue, | 457 | unsigned red, unsigned green, unsigned blue, |
417 | unsigned transp, struct fb_info *info) | 458 | unsigned transp, struct fb_info *info) |
418 | { | 459 | { |
419 | struct cg6_par *par = (struct cg6_par *) info->par; | 460 | struct cg6_par *par = (struct cg6_par *)info->par; |
420 | struct bt_regs __iomem *bt = par->bt; | 461 | struct bt_regs __iomem *bt = par->bt; |
421 | unsigned long flags; | 462 | unsigned long flags; |
422 | 463 | ||
@@ -440,25 +481,24 @@ static int cg6_setcolreg(unsigned regno, | |||
440 | } | 481 | } |
441 | 482 | ||
442 | /** | 483 | /** |
443 | * cg6_blank - Optional function. Blanks the display. | 484 | * cg6_blank - Blanks the display. |
444 | * @blank_mode: the blank mode we want. | 485 | * |
445 | * @info: frame buffer structure that represents a single frame buffer | 486 | * @blank_mode: the blank mode we want. |
487 | * @info: frame buffer structure that represents a single frame buffer | ||
446 | */ | 488 | */ |
447 | static int | 489 | static int cg6_blank(int blank, struct fb_info *info) |
448 | cg6_blank(int blank, struct fb_info *info) | ||
449 | { | 490 | { |
450 | struct cg6_par *par = (struct cg6_par *) info->par; | 491 | struct cg6_par *par = (struct cg6_par *)info->par; |
451 | struct cg6_thc __iomem *thc = par->thc; | 492 | struct cg6_thc __iomem *thc = par->thc; |
452 | unsigned long flags; | 493 | unsigned long flags; |
453 | u32 val; | 494 | u32 val; |
454 | 495 | ||
455 | spin_lock_irqsave(&par->lock, flags); | 496 | spin_lock_irqsave(&par->lock, flags); |
497 | val = sbus_readl(&thc->thc_misc); | ||
456 | 498 | ||
457 | switch (blank) { | 499 | switch (blank) { |
458 | case FB_BLANK_UNBLANK: /* Unblanking */ | 500 | case FB_BLANK_UNBLANK: /* Unblanking */ |
459 | val = sbus_readl(&thc->thc_misc); | ||
460 | val |= CG6_THC_MISC_VIDEO; | 501 | val |= CG6_THC_MISC_VIDEO; |
461 | sbus_writel(val, &thc->thc_misc); | ||
462 | par->flags &= ~CG6_FLAG_BLANKED; | 502 | par->flags &= ~CG6_FLAG_BLANKED; |
463 | break; | 503 | break; |
464 | 504 | ||
@@ -466,13 +506,12 @@ cg6_blank(int blank, struct fb_info *info) | |||
466 | case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ | 506 | case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ |
467 | case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ | 507 | case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ |
468 | case FB_BLANK_POWERDOWN: /* Poweroff */ | 508 | case FB_BLANK_POWERDOWN: /* Poweroff */ |
469 | val = sbus_readl(&thc->thc_misc); | ||
470 | val &= ~CG6_THC_MISC_VIDEO; | 509 | val &= ~CG6_THC_MISC_VIDEO; |
471 | sbus_writel(val, &thc->thc_misc); | ||
472 | par->flags |= CG6_FLAG_BLANKED; | 510 | par->flags |= CG6_FLAG_BLANKED; |
473 | break; | 511 | break; |
474 | } | 512 | } |
475 | 513 | ||
514 | sbus_writel(val, &thc->thc_misc); | ||
476 | spin_unlock_irqrestore(&par->lock, flags); | 515 | spin_unlock_irqrestore(&par->lock, flags); |
477 | 516 | ||
478 | return 0; | 517 | return 0; |
@@ -533,7 +572,7 @@ static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma) | |||
533 | 572 | ||
534 | static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) | 573 | static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) |
535 | { | 574 | { |
536 | struct cg6_par *par = (struct cg6_par *) info->par; | 575 | struct cg6_par *par = (struct cg6_par *)info->par; |
537 | 576 | ||
538 | return sbusfb_ioctl_helper(cmd, arg, info, | 577 | return sbusfb_ioctl_helper(cmd, arg, info, |
539 | FBTYPE_SUNFAST_COLOR, 8, par->fbsize); | 578 | FBTYPE_SUNFAST_COLOR, 8, par->fbsize); |
@@ -543,15 +582,14 @@ static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) | |||
543 | * Initialisation | 582 | * Initialisation |
544 | */ | 583 | */ |
545 | 584 | ||
546 | static void | 585 | static void __devinit cg6_init_fix(struct fb_info *info, int linebytes) |
547 | cg6_init_fix(struct fb_info *info, int linebytes) | ||
548 | { | 586 | { |
549 | struct cg6_par *par = (struct cg6_par *)info->par; | 587 | struct cg6_par *par = (struct cg6_par *)info->par; |
550 | const char *cg6_cpu_name, *cg6_card_name; | 588 | const char *cg6_cpu_name, *cg6_card_name; |
551 | u32 conf; | 589 | u32 conf; |
552 | 590 | ||
553 | conf = sbus_readl(par->fhc); | 591 | conf = sbus_readl(par->fhc); |
554 | switch(conf & CG6_FHC_CPU_MASK) { | 592 | switch (conf & CG6_FHC_CPU_MASK) { |
555 | case CG6_FHC_CPU_SPARC: | 593 | case CG6_FHC_CPU_SPARC: |
556 | cg6_cpu_name = "sparc"; | 594 | cg6_cpu_name = "sparc"; |
557 | break; | 595 | break; |
@@ -563,21 +601,19 @@ cg6_init_fix(struct fb_info *info, int linebytes) | |||
563 | break; | 601 | break; |
564 | }; | 602 | }; |
565 | if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) { | 603 | if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) { |
566 | if (par->fbsize <= 0x100000) { | 604 | if (par->fbsize <= 0x100000) |
567 | cg6_card_name = "TGX"; | 605 | cg6_card_name = "TGX"; |
568 | } else { | 606 | else |
569 | cg6_card_name = "TGX+"; | 607 | cg6_card_name = "TGX+"; |
570 | } | ||
571 | } else { | 608 | } else { |
572 | if (par->fbsize <= 0x100000) { | 609 | if (par->fbsize <= 0x100000) |
573 | cg6_card_name = "GX"; | 610 | cg6_card_name = "GX"; |
574 | } else { | 611 | else |
575 | cg6_card_name = "GX+"; | 612 | cg6_card_name = "GX+"; |
576 | } | ||
577 | } | 613 | } |
578 | 614 | ||
579 | sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name); | 615 | sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name); |
580 | info->fix.id[sizeof(info->fix.id)-1] = 0; | 616 | info->fix.id[sizeof(info->fix.id) - 1] = 0; |
581 | 617 | ||
582 | info->fix.type = FB_TYPE_PACKED_PIXELS; | 618 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
583 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | 619 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; |
@@ -588,28 +624,28 @@ cg6_init_fix(struct fb_info *info, int linebytes) | |||
588 | } | 624 | } |
589 | 625 | ||
590 | /* Initialize Brooktree DAC */ | 626 | /* Initialize Brooktree DAC */ |
591 | static void cg6_bt_init(struct cg6_par *par) | 627 | static void __devinit cg6_bt_init(struct cg6_par *par) |
592 | { | 628 | { |
593 | struct bt_regs __iomem *bt = par->bt; | 629 | struct bt_regs __iomem *bt = par->bt; |
594 | 630 | ||
595 | sbus_writel(0x04 << 24, &bt->addr); /* color planes */ | 631 | sbus_writel(0x04 << 24, &bt->addr); /* color planes */ |
596 | sbus_writel(0xff << 24, &bt->control); | 632 | sbus_writel(0xff << 24, &bt->control); |
597 | sbus_writel(0x05 << 24, &bt->addr); | 633 | sbus_writel(0x05 << 24, &bt->addr); |
598 | sbus_writel(0x00 << 24, &bt->control); | 634 | sbus_writel(0x00 << 24, &bt->control); |
599 | sbus_writel(0x06 << 24, &bt->addr); /* overlay plane */ | 635 | sbus_writel(0x06 << 24, &bt->addr); /* overlay plane */ |
600 | sbus_writel(0x73 << 24, &bt->control); | 636 | sbus_writel(0x73 << 24, &bt->control); |
601 | sbus_writel(0x07 << 24, &bt->addr); | 637 | sbus_writel(0x07 << 24, &bt->addr); |
602 | sbus_writel(0x00 << 24, &bt->control); | 638 | sbus_writel(0x00 << 24, &bt->control); |
603 | } | 639 | } |
604 | 640 | ||
605 | static void cg6_chip_init(struct fb_info *info) | 641 | static void __devinit cg6_chip_init(struct fb_info *info) |
606 | { | 642 | { |
607 | struct cg6_par *par = (struct cg6_par *) info->par; | 643 | struct cg6_par *par = (struct cg6_par *)info->par; |
608 | struct cg6_tec __iomem *tec = par->tec; | 644 | struct cg6_tec __iomem *tec = par->tec; |
609 | struct cg6_fbc __iomem *fbc = par->fbc; | 645 | struct cg6_fbc __iomem *fbc = par->fbc; |
610 | u32 rev, conf, mode; | 646 | u32 rev, conf, mode; |
611 | int i; | 647 | int i; |
612 | 648 | ||
613 | /* Turn off stuff in the Transform Engine. */ | 649 | /* Turn off stuff in the Transform Engine. */ |
614 | sbus_writel(0, &tec->tec_matrix); | 650 | sbus_writel(0, &tec->tec_matrix); |
615 | sbus_writel(0, &tec->tec_clip); | 651 | sbus_writel(0, &tec->tec_clip); |
@@ -635,13 +671,13 @@ static void cg6_chip_init(struct fb_info *info) | |||
635 | i = sbus_readl(&fbc->s); | 671 | i = sbus_readl(&fbc->s); |
636 | } while (i & 0x10000000); | 672 | } while (i & 0x10000000); |
637 | mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK | | 673 | mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK | |
638 | CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK | | 674 | CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK | |
639 | CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK | | 675 | CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK | |
640 | CG6_FBC_BDISP_MASK); | 676 | CG6_FBC_BDISP_MASK); |
641 | mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 | | 677 | mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 | |
642 | CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE | | 678 | CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE | |
643 | CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 | | 679 | CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 | |
644 | CG6_FBC_BDISP_0); | 680 | CG6_FBC_BDISP_0); |
645 | sbus_writel(mode, &fbc->mode); | 681 | sbus_writel(mode, &fbc->mode); |
646 | 682 | ||
647 | sbus_writel(0, &fbc->clip); | 683 | sbus_writel(0, &fbc->clip); |
@@ -671,7 +707,8 @@ static void cg6_unmap_regs(struct of_device *op, struct fb_info *info, | |||
671 | of_iounmap(&op->resource[0], info->screen_base, par->fbsize); | 707 | of_iounmap(&op->resource[0], info->screen_base, par->fbsize); |
672 | } | 708 | } |
673 | 709 | ||
674 | static int __devinit cg6_probe(struct of_device *op, const struct of_device_id *match) | 710 | static int __devinit cg6_probe(struct of_device *op, |
711 | const struct of_device_id *match) | ||
675 | { | 712 | { |
676 | struct device_node *dp = op->node; | 713 | struct device_node *dp = op->node; |
677 | struct fb_info *info; | 714 | struct fb_info *info; |
@@ -705,22 +742,23 @@ static int __devinit cg6_probe(struct of_device *op, const struct of_device_id * | |||
705 | par->fbsize *= 4; | 742 | par->fbsize *= 4; |
706 | 743 | ||
707 | par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET, | 744 | par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET, |
708 | 4096, "cgsix fbc"); | 745 | 4096, "cgsix fbc"); |
709 | par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET, | 746 | par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET, |
710 | sizeof(struct cg6_tec), "cgsix tec"); | 747 | sizeof(struct cg6_tec), "cgsix tec"); |
711 | par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET, | 748 | par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET, |
712 | sizeof(struct cg6_thc), "cgsix thc"); | 749 | sizeof(struct cg6_thc), "cgsix thc"); |
713 | par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET, | 750 | par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET, |
714 | sizeof(struct bt_regs), "cgsix dac"); | 751 | sizeof(struct bt_regs), "cgsix dac"); |
715 | par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET, | 752 | par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET, |
716 | sizeof(u32), "cgsix fhc"); | 753 | sizeof(u32), "cgsix fhc"); |
717 | 754 | ||
718 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT | | 755 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT | |
719 | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; | 756 | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT | |
757 | FBINFO_READS_FAST; | ||
720 | info->fbops = &cg6_ops; | 758 | info->fbops = &cg6_ops; |
721 | 759 | ||
722 | info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET, | 760 | info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET, |
723 | par->fbsize, "cgsix ram"); | 761 | par->fbsize, "cgsix ram"); |
724 | if (!par->fbc || !par->tec || !par->thc || | 762 | if (!par->fbc || !par->tec || !par->thc || |
725 | !par->bt || !par->fhc || !info->screen_base) | 763 | !par->bt || !par->fhc || !info->screen_base) |
726 | goto out_unmap_regs; | 764 | goto out_unmap_regs; |
diff --git a/drivers/video/ffb.c b/drivers/video/ffb.c index 4b520b573911..d7e24889650e 100644 --- a/drivers/video/ffb.c +++ b/drivers/video/ffb.c | |||
@@ -171,17 +171,17 @@ static struct fb_ops ffb_ops = { | |||
171 | #define FFB_PPC_CS_VAR 0x000002 | 171 | #define FFB_PPC_CS_VAR 0x000002 |
172 | #define FFB_PPC_CS_CONST 0x000003 | 172 | #define FFB_PPC_CS_CONST 0x000003 |
173 | 173 | ||
174 | #define FFB_ROP_NEW 0x83 | 174 | #define FFB_ROP_NEW 0x83 |
175 | #define FFB_ROP_OLD 0x85 | 175 | #define FFB_ROP_OLD 0x85 |
176 | #define FFB_ROP_NEW_XOR_OLD 0x86 | 176 | #define FFB_ROP_NEW_XOR_OLD 0x86 |
177 | 177 | ||
178 | #define FFB_UCSR_FIFO_MASK 0x00000fff | 178 | #define FFB_UCSR_FIFO_MASK 0x00000fff |
179 | #define FFB_UCSR_FB_BUSY 0x01000000 | 179 | #define FFB_UCSR_FB_BUSY 0x01000000 |
180 | #define FFB_UCSR_RP_BUSY 0x02000000 | 180 | #define FFB_UCSR_RP_BUSY 0x02000000 |
181 | #define FFB_UCSR_ALL_BUSY (FFB_UCSR_RP_BUSY|FFB_UCSR_FB_BUSY) | 181 | #define FFB_UCSR_ALL_BUSY (FFB_UCSR_RP_BUSY|FFB_UCSR_FB_BUSY) |
182 | #define FFB_UCSR_READ_ERR 0x40000000 | 182 | #define FFB_UCSR_READ_ERR 0x40000000 |
183 | #define FFB_UCSR_FIFO_OVFL 0x80000000 | 183 | #define FFB_UCSR_FIFO_OVFL 0x80000000 |
184 | #define FFB_UCSR_ALL_ERRORS (FFB_UCSR_READ_ERR|FFB_UCSR_FIFO_OVFL) | 184 | #define FFB_UCSR_ALL_ERRORS (FFB_UCSR_READ_ERR|FFB_UCSR_FIFO_OVFL) |
185 | 185 | ||
186 | struct ffb_fbc { | 186 | struct ffb_fbc { |
187 | /* Next vertex registers */ | 187 | /* Next vertex registers */ |
@@ -197,7 +197,7 @@ struct ffb_fbc { | |||
197 | u32 ryf; | 197 | u32 ryf; |
198 | u32 rxf; | 198 | u32 rxf; |
199 | u32 xxx3[2]; | 199 | u32 xxx3[2]; |
200 | 200 | ||
201 | u32 dmyf; | 201 | u32 dmyf; |
202 | u32 dmxf; | 202 | u32 dmxf; |
203 | u32 xxx4[2]; | 203 | u32 xxx4[2]; |
@@ -211,13 +211,13 @@ struct ffb_fbc { | |||
211 | u32 bh; | 211 | u32 bh; |
212 | u32 bw; | 212 | u32 bw; |
213 | u32 xxx6[2]; | 213 | u32 xxx6[2]; |
214 | 214 | ||
215 | u32 xxx7[32]; | 215 | u32 xxx7[32]; |
216 | 216 | ||
217 | /* Setup unit vertex state register */ | 217 | /* Setup unit vertex state register */ |
218 | u32 suvtx; | 218 | u32 suvtx; |
219 | u32 xxx8[63]; | 219 | u32 xxx8[63]; |
220 | 220 | ||
221 | /* Control registers */ | 221 | /* Control registers */ |
222 | u32 ppc; | 222 | u32 ppc; |
223 | u32 wid; | 223 | u32 wid; |
@@ -235,7 +235,7 @@ struct ffb_fbc { | |||
235 | u32 dcsb; | 235 | u32 dcsb; |
236 | u32 dczf; | 236 | u32 dczf; |
237 | u32 dczb; | 237 | u32 dczb; |
238 | 238 | ||
239 | u32 xxx9; | 239 | u32 xxx9; |
240 | u32 blendc; | 240 | u32 blendc; |
241 | u32 blendc1; | 241 | u32 blendc1; |
@@ -252,7 +252,7 @@ struct ffb_fbc { | |||
252 | u32 fbcfg1; | 252 | u32 fbcfg1; |
253 | u32 fbcfg2; | 253 | u32 fbcfg2; |
254 | u32 fbcfg3; | 254 | u32 fbcfg3; |
255 | 255 | ||
256 | u32 ppcfg; | 256 | u32 ppcfg; |
257 | u32 pick; | 257 | u32 pick; |
258 | u32 fillmode; | 258 | u32 fillmode; |
@@ -269,7 +269,7 @@ struct ffb_fbc { | |||
269 | u32 clip2max; | 269 | u32 clip2max; |
270 | u32 clip3min; | 270 | u32 clip3min; |
271 | u32 clip3max; | 271 | u32 clip3max; |
272 | 272 | ||
273 | /* New 3dRAM III support regs */ | 273 | /* New 3dRAM III support regs */ |
274 | u32 rawblend2; | 274 | u32 rawblend2; |
275 | u32 rawpreblend; | 275 | u32 rawpreblend; |
@@ -287,7 +287,7 @@ struct ffb_fbc { | |||
287 | u32 rawcmp; | 287 | u32 rawcmp; |
288 | u32 rawwac; | 288 | u32 rawwac; |
289 | u32 fbramid; | 289 | u32 fbramid; |
290 | 290 | ||
291 | u32 drawop; | 291 | u32 drawop; |
292 | u32 xxx10[2]; | 292 | u32 xxx10[2]; |
293 | u32 fontlpat; | 293 | u32 fontlpat; |
@@ -302,7 +302,7 @@ struct ffb_fbc { | |||
302 | u32 stencil; | 302 | u32 stencil; |
303 | u32 stencilctl; | 303 | u32 stencilctl; |
304 | 304 | ||
305 | u32 xxx13[4]; | 305 | u32 xxx13[4]; |
306 | u32 dcss1; | 306 | u32 dcss1; |
307 | u32 dcss2; | 307 | u32 dcss2; |
308 | u32 dcss3; | 308 | u32 dcss3; |
@@ -315,17 +315,17 @@ struct ffb_fbc { | |||
315 | u32 dcd3; | 315 | u32 dcd3; |
316 | u32 dcd4; | 316 | u32 dcd4; |
317 | u32 xxx15; | 317 | u32 xxx15; |
318 | 318 | ||
319 | u32 pattern[32]; | 319 | u32 pattern[32]; |
320 | 320 | ||
321 | u32 xxx16[256]; | 321 | u32 xxx16[256]; |
322 | 322 | ||
323 | u32 devid; | 323 | u32 devid; |
324 | u32 xxx17[63]; | 324 | u32 xxx17[63]; |
325 | 325 | ||
326 | u32 ucsr; | 326 | u32 ucsr; |
327 | u32 xxx18[31]; | 327 | u32 xxx18[31]; |
328 | 328 | ||
329 | u32 mer; | 329 | u32 mer; |
330 | }; | 330 | }; |
331 | 331 | ||
@@ -336,20 +336,20 @@ struct ffb_dac { | |||
336 | u32 value2; | 336 | u32 value2; |
337 | }; | 337 | }; |
338 | 338 | ||
339 | #define FFB_DAC_UCTRL 0x1001 /* User Control */ | 339 | #define FFB_DAC_UCTRL 0x1001 /* User Control */ |
340 | #define FFB_DAC_UCTRL_MANREV 0x00000f00 /* 4-bit Manufacturing Revision */ | 340 | #define FFB_DAC_UCTRL_MANREV 0x00000f00 /* 4-bit Manufacturing Revision */ |
341 | #define FFB_DAC_UCTRL_MANREV_SHIFT 8 | 341 | #define FFB_DAC_UCTRL_MANREV_SHIFT 8 |
342 | #define FFB_DAC_TGEN 0x6000 /* Timing Generator */ | 342 | #define FFB_DAC_TGEN 0x6000 /* Timing Generator */ |
343 | #define FFB_DAC_TGEN_VIDE 0x00000001 /* Video Enable */ | 343 | #define FFB_DAC_TGEN_VIDE 0x00000001 /* Video Enable */ |
344 | #define FFB_DAC_DID 0x8000 /* Device Identification */ | 344 | #define FFB_DAC_DID 0x8000 /* Device Identification */ |
345 | #define FFB_DAC_DID_PNUM 0x0ffff000 /* Device Part Number */ | 345 | #define FFB_DAC_DID_PNUM 0x0ffff000 /* Device Part Number */ |
346 | #define FFB_DAC_DID_PNUM_SHIFT 12 | 346 | #define FFB_DAC_DID_PNUM_SHIFT 12 |
347 | #define FFB_DAC_DID_REV 0xf0000000 /* Device Revision */ | 347 | #define FFB_DAC_DID_REV 0xf0000000 /* Device Revision */ |
348 | #define FFB_DAC_DID_REV_SHIFT 28 | 348 | #define FFB_DAC_DID_REV_SHIFT 28 |
349 | 349 | ||
350 | #define FFB_DAC_CUR_CTRL 0x100 | 350 | #define FFB_DAC_CUR_CTRL 0x100 |
351 | #define FFB_DAC_CUR_CTRL_P0 0x00000001 | 351 | #define FFB_DAC_CUR_CTRL_P0 0x00000001 |
352 | #define FFB_DAC_CUR_CTRL_P1 0x00000002 | 352 | #define FFB_DAC_CUR_CTRL_P1 0x00000002 |
353 | 353 | ||
354 | struct ffb_par { | 354 | struct ffb_par { |
355 | spinlock_t lock; | 355 | spinlock_t lock; |
@@ -382,7 +382,9 @@ static void FFBFifo(struct ffb_par *par, int n) | |||
382 | 382 | ||
383 | if (cache - n < 0) { | 383 | if (cache - n < 0) { |
384 | fbc = par->fbc; | 384 | fbc = par->fbc; |
385 | do { cache = (upa_readl(&fbc->ucsr) & FFB_UCSR_FIFO_MASK) - 8; | 385 | do { |
386 | cache = (upa_readl(&fbc->ucsr) & FFB_UCSR_FIFO_MASK); | ||
387 | cache -= 8; | ||
386 | } while (cache - n < 0); | 388 | } while (cache - n < 0); |
387 | } | 389 | } |
388 | par->fifo_cache = cache - n; | 390 | par->fifo_cache = cache - n; |
@@ -401,12 +403,12 @@ static void FFBWait(struct ffb_par *par) | |||
401 | upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr); | 403 | upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr); |
402 | } | 404 | } |
403 | udelay(10); | 405 | udelay(10); |
404 | } while(--limit > 0); | 406 | } while (--limit > 0); |
405 | } | 407 | } |
406 | 408 | ||
407 | static int ffb_sync(struct fb_info *p) | 409 | static int ffb_sync(struct fb_info *p) |
408 | { | 410 | { |
409 | struct ffb_par *par = (struct ffb_par *) p->par; | 411 | struct ffb_par *par = (struct ffb_par *)p->par; |
410 | 412 | ||
411 | FFBWait(par); | 413 | FFBWait(par); |
412 | return 0; | 414 | return 0; |
@@ -431,8 +433,8 @@ static void ffb_switch_from_graph(struct ffb_par *par) | |||
431 | FFBWait(par); | 433 | FFBWait(par); |
432 | par->fifo_cache = 0; | 434 | par->fifo_cache = 0; |
433 | FFBFifo(par, 7); | 435 | FFBFifo(par, 7); |
434 | upa_writel(FFB_PPC_VCE_DISABLE|FFB_PPC_TBE_OPAQUE| | 436 | upa_writel(FFB_PPC_VCE_DISABLE | FFB_PPC_TBE_OPAQUE | |
435 | FFB_PPC_APE_DISABLE|FFB_PPC_CS_CONST, | 437 | FFB_PPC_APE_DISABLE | FFB_PPC_CS_CONST, |
436 | &fbc->ppc); | 438 | &fbc->ppc); |
437 | upa_writel(0x2000707f, &fbc->fbc); | 439 | upa_writel(0x2000707f, &fbc->fbc); |
438 | upa_writel(par->rop_cache, &fbc->rop); | 440 | upa_writel(par->rop_cache, &fbc->rop); |
@@ -455,7 +457,7 @@ static void ffb_switch_from_graph(struct ffb_par *par) | |||
455 | 457 | ||
456 | static int ffb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | 458 | static int ffb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
457 | { | 459 | { |
458 | struct ffb_par *par = (struct ffb_par *) info->par; | 460 | struct ffb_par *par = (struct ffb_par *)info->par; |
459 | 461 | ||
460 | /* We just use this to catch switches out of | 462 | /* We just use this to catch switches out of |
461 | * graphics mode. | 463 | * graphics mode. |
@@ -468,16 +470,14 @@ static int ffb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | |||
468 | } | 470 | } |
469 | 471 | ||
470 | /** | 472 | /** |
471 | * ffb_fillrect - REQUIRED function. Can use generic routines if | 473 | * ffb_fillrect - Draws a rectangle on the screen. |
472 | * non acclerated hardware and packed pixel based. | ||
473 | * Draws a rectangle on the screen. | ||
474 | * | 474 | * |
475 | * @info: frame buffer structure that represents a single frame buffer | 475 | * @info: frame buffer structure that represents a single frame buffer |
476 | * @rect: structure defining the rectagle and operation. | 476 | * @rect: structure defining the rectagle and operation. |
477 | */ | 477 | */ |
478 | static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | 478 | static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
479 | { | 479 | { |
480 | struct ffb_par *par = (struct ffb_par *) info->par; | 480 | struct ffb_par *par = (struct ffb_par *)info->par; |
481 | struct ffb_fbc __iomem *fbc = par->fbc; | 481 | struct ffb_fbc __iomem *fbc = par->fbc; |
482 | unsigned long flags; | 482 | unsigned long flags; |
483 | u32 fg; | 483 | u32 fg; |
@@ -494,9 +494,9 @@ static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | |||
494 | par->fg_cache = fg; | 494 | par->fg_cache = fg; |
495 | } | 495 | } |
496 | 496 | ||
497 | ffb_rop(par, (rect->rop == ROP_COPY ? | 497 | ffb_rop(par, rect->rop == ROP_COPY ? |
498 | FFB_ROP_NEW : | 498 | FFB_ROP_NEW : |
499 | FFB_ROP_NEW_XOR_OLD)); | 499 | FFB_ROP_NEW_XOR_OLD); |
500 | 500 | ||
501 | FFBFifo(par, 5); | 501 | FFBFifo(par, 5); |
502 | upa_writel(FFB_DRAWOP_RECTANGLE, &fbc->drawop); | 502 | upa_writel(FFB_DRAWOP_RECTANGLE, &fbc->drawop); |
@@ -509,18 +509,15 @@ static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | |||
509 | } | 509 | } |
510 | 510 | ||
511 | /** | 511 | /** |
512 | * ffb_copyarea - REQUIRED function. Can use generic routines if | 512 | * ffb_copyarea - Copies on area of the screen to another area. |
513 | * non acclerated hardware and packed pixel based. | ||
514 | * Copies on area of the screen to another area. | ||
515 | * | 513 | * |
516 | * @info: frame buffer structure that represents a single frame buffer | 514 | * @info: frame buffer structure that represents a single frame buffer |
517 | * @area: structure defining the source and destination. | 515 | * @area: structure defining the source and destination. |
518 | */ | 516 | */ |
519 | 517 | ||
520 | static void | 518 | static void ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area) |
521 | ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | ||
522 | { | 519 | { |
523 | struct ffb_par *par = (struct ffb_par *) info->par; | 520 | struct ffb_par *par = (struct ffb_par *)info->par; |
524 | struct ffb_fbc __iomem *fbc = par->fbc; | 521 | struct ffb_fbc __iomem *fbc = par->fbc; |
525 | unsigned long flags; | 522 | unsigned long flags; |
526 | 523 | ||
@@ -547,16 +544,14 @@ ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | |||
547 | } | 544 | } |
548 | 545 | ||
549 | /** | 546 | /** |
550 | * ffb_imageblit - REQUIRED function. Can use generic routines if | 547 | * ffb_imageblit - Copies a image from system memory to the screen. |
551 | * non acclerated hardware and packed pixel based. | ||
552 | * Copies a image from system memory to the screen. | ||
553 | * | 548 | * |
554 | * @info: frame buffer structure that represents a single frame buffer | 549 | * @info: frame buffer structure that represents a single frame buffer |
555 | * @image: structure defining the image. | 550 | * @image: structure defining the image. |
556 | */ | 551 | */ |
557 | static void ffb_imageblit(struct fb_info *info, const struct fb_image *image) | 552 | static void ffb_imageblit(struct fb_info *info, const struct fb_image *image) |
558 | { | 553 | { |
559 | struct ffb_par *par = (struct ffb_par *) info->par; | 554 | struct ffb_par *par = (struct ffb_par *)info->par; |
560 | struct ffb_fbc __iomem *fbc = par->fbc; | 555 | struct ffb_fbc __iomem *fbc = par->fbc; |
561 | const u8 *data = image->data; | 556 | const u8 *data = image->data; |
562 | unsigned long flags; | 557 | unsigned long flags; |
@@ -644,13 +639,14 @@ static void ffb_fixup_var_rgb(struct fb_var_screeninfo *var) | |||
644 | } | 639 | } |
645 | 640 | ||
646 | /** | 641 | /** |
647 | * ffb_setcolreg - Optional function. Sets a color register. | 642 | * ffb_setcolreg - Sets a color register. |
648 | * @regno: boolean, 0 copy local, 1 get_user() function | 643 | * |
649 | * @red: frame buffer colormap structure | 644 | * @regno: boolean, 0 copy local, 1 get_user() function |
650 | * @green: The green value which can be up to 16 bits wide | 645 | * @red: frame buffer colormap structure |
651 | * @blue: The blue value which can be up to 16 bits wide. | 646 | * @green: The green value which can be up to 16 bits wide |
652 | * @transp: If supported the alpha value which can be up to 16 bits wide. | 647 | * @blue: The blue value which can be up to 16 bits wide. |
653 | * @info: frame buffer info structure | 648 | * @transp: If supported the alpha value which can be up to 16 bits wide. |
649 | * @info: frame buffer info structure | ||
654 | */ | 650 | */ |
655 | static int ffb_setcolreg(unsigned regno, | 651 | static int ffb_setcolreg(unsigned regno, |
656 | unsigned red, unsigned green, unsigned blue, | 652 | unsigned red, unsigned green, unsigned blue, |
@@ -672,14 +668,13 @@ static int ffb_setcolreg(unsigned regno, | |||
672 | } | 668 | } |
673 | 669 | ||
674 | /** | 670 | /** |
675 | * ffb_blank - Optional function. Blanks the display. | 671 | * ffb_blank - Optional function. Blanks the display. |
676 | * @blank_mode: the blank mode we want. | 672 | * @blank_mode: the blank mode we want. |
677 | * @info: frame buffer structure that represents a single frame buffer | 673 | * @info: frame buffer structure that represents a single frame buffer |
678 | */ | 674 | */ |
679 | static int | 675 | static int ffb_blank(int blank, struct fb_info *info) |
680 | ffb_blank(int blank, struct fb_info *info) | ||
681 | { | 676 | { |
682 | struct ffb_par *par = (struct ffb_par *) info->par; | 677 | struct ffb_par *par = (struct ffb_par *)info->par; |
683 | struct ffb_dac __iomem *dac = par->dac; | 678 | struct ffb_dac __iomem *dac = par->dac; |
684 | unsigned long flags; | 679 | unsigned long flags; |
685 | u32 val; | 680 | u32 val; |
@@ -867,7 +862,7 @@ static int ffb_mmap(struct fb_info *info, struct vm_area_struct *vma) | |||
867 | 862 | ||
868 | static int ffb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) | 863 | static int ffb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) |
869 | { | 864 | { |
870 | struct ffb_par *par = (struct ffb_par *) info->par; | 865 | struct ffb_par *par = (struct ffb_par *)info->par; |
871 | 866 | ||
872 | return sbusfb_ioctl_helper(cmd, arg, info, | 867 | return sbusfb_ioctl_helper(cmd, arg, info, |
873 | FBTYPE_CREATOR, 24, par->fbsize); | 868 | FBTYPE_CREATOR, 24, par->fbsize); |
@@ -877,8 +872,7 @@ static int ffb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) | |||
877 | * Initialisation | 872 | * Initialisation |
878 | */ | 873 | */ |
879 | 874 | ||
880 | static void | 875 | static void ffb_init_fix(struct fb_info *info) |
881 | ffb_init_fix(struct fb_info *info) | ||
882 | { | 876 | { |
883 | struct ffb_par *par = (struct ffb_par *)info->par; | 877 | struct ffb_par *par = (struct ffb_par *)info->par; |
884 | const char *ffb_type_name; | 878 | const char *ffb_type_name; |
@@ -902,7 +896,8 @@ ffb_init_fix(struct fb_info *info) | |||
902 | info->fix.accel = FB_ACCEL_SUN_CREATOR; | 896 | info->fix.accel = FB_ACCEL_SUN_CREATOR; |
903 | } | 897 | } |
904 | 898 | ||
905 | static int __devinit ffb_probe(struct of_device *op, const struct of_device_id *match) | 899 | static int __devinit ffb_probe(struct of_device *op, |
900 | const struct of_device_id *match) | ||
906 | { | 901 | { |
907 | struct device_node *dp = op->node; | 902 | struct device_node *dp = op->node; |
908 | struct ffb_fbc __iomem *fbc; | 903 | struct ffb_fbc __iomem *fbc; |