aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video/via
diff options
context:
space:
mode:
authorJonathan Corbet <corbet@lwn.net>2010-04-23 11:46:59 -0400
committerJonathan Corbet <corbet@lwn.net>2010-05-07 19:17:38 -0400
commit94dd1a856b23bd51dfebf68e6dd63cfd4d4fd5ae (patch)
tree32d573966e60cf0b2b41e785015366f6a2eeff0e /drivers/video/via
parent6b841edf572ad757f11013326b796e126f05a719 (diff)
viafb: Add a simple interrupt management infrastructure
The viafb device shares a single interrupt control register among several distinct subunits. This adds a simple layer for management of that register. Cc: ScottFang@viatech.com.cn Cc: JosephChan@via.com.tw Cc: Harald Welte <laforge@gnumonks.org> Acked-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'drivers/video/via')
-rw-r--r--drivers/video/via/via-core.c64
-rw-r--r--drivers/video/via/via-core.h44
2 files changed, 107 insertions, 1 deletions
diff --git a/drivers/video/via/via-core.c b/drivers/video/via/via-core.c
index 5a78ef9cb382..701b95575747 100644
--- a/drivers/video/via/via-core.c
+++ b/drivers/video/via/via-core.c
@@ -35,6 +35,65 @@ static struct viafb_dev global_dev;
35 35
36 36
37/* 37/*
38 * Basic register access; spinlock required.
39 */
40static inline void viafb_mmio_write(int reg, u32 v)
41{
42 iowrite32(v, global_dev.engine_mmio + reg);
43}
44
45static inline int viafb_mmio_read(int reg)
46{
47 return ioread32(global_dev.engine_mmio + reg);
48}
49
50/* ---------------------------------------------------------------------- */
51/*
52 * Interrupt management. We have a single IRQ line for a lot of
53 * different functions, so we need to share it. The design here
54 * is that we don't want to reimplement the shared IRQ code here;
55 * we also want to avoid having contention for a single handler thread.
56 * So each subdev driver which needs interrupts just requests
57 * them directly from the kernel. We just have what's needed for
58 * overall access to the interrupt control register.
59 */
60
61/*
62 * Which interrupts are enabled now?
63 */
64static u32 viafb_enabled_ints;
65
66static void viafb_int_init(void)
67{
68 viafb_enabled_ints = 0;
69
70 viafb_mmio_write(VDE_INTERRUPT, 0);
71}
72
73/*
74 * Allow subdevs to ask for specific interrupts to be enabled. These
75 * functions must be called with reg_lock held
76 */
77void viafb_irq_enable(u32 mask)
78{
79 viafb_enabled_ints |= mask;
80 viafb_mmio_write(VDE_INTERRUPT, viafb_enabled_ints | VDE_I_ENABLE);
81}
82EXPORT_SYMBOL_GPL(viafb_irq_enable);
83
84void viafb_irq_disable(u32 mask)
85{
86 viafb_enabled_ints &= ~mask;
87 if (viafb_enabled_ints == 0)
88 viafb_mmio_write(VDE_INTERRUPT, 0); /* Disable entirely */
89 else
90 viafb_mmio_write(VDE_INTERRUPT,
91 viafb_enabled_ints | VDE_I_ENABLE);
92}
93EXPORT_SYMBOL_GPL(viafb_irq_disable);
94
95
96/*
38 * Figure out how big our framebuffer memory is. Kind of ugly, 97 * Figure out how big our framebuffer memory is. Kind of ugly,
39 * but evidently we can't trust the information found in the 98 * but evidently we can't trust the information found in the
40 * fbdev configuration area. 99 * fbdev configuration area.
@@ -275,8 +334,10 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
275 if (ret) 334 if (ret)
276 goto out_disable; 335 goto out_disable;
277 /* 336 /*
278 * Create our subdevices. Continue even if some things fail. 337 * Set up interrupts and create our subdevices. Continue even if
338 * some things fail.
279 */ 339 */
340 viafb_int_init();
280 via_setup_subdevs(&global_dev); 341 via_setup_subdevs(&global_dev);
281 /* 342 /*
282 * Set up the framebuffer. 343 * Set up the framebuffer.
@@ -284,6 +345,7 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
284 ret = via_fb_pci_probe(&global_dev); 345 ret = via_fb_pci_probe(&global_dev);
285 if (ret) 346 if (ret)
286 goto out_subdevs; 347 goto out_subdevs;
348
287 return 0; 349 return 0;
288 350
289out_subdevs: 351out_subdevs:
diff --git a/drivers/video/via/via-core.h b/drivers/video/via/via-core.h
index ac89c2aa98b5..ba64b36d58e3 100644
--- a/drivers/video/via/via-core.h
+++ b/drivers/video/via/via-core.h
@@ -87,4 +87,48 @@ struct viafb_dev {
87 87
88}; 88};
89 89
90/*
91 * Interrupt management.
92 */
93
94void viafb_irq_enable(u32 mask);
95void viafb_irq_disable(u32 mask);
96
97/*
98 * The global interrupt control register and its bits.
99 */
100#define VDE_INTERRUPT 0x200 /* Video interrupt flags/masks */
101#define VDE_I_DVISENSE 0x00000001 /* DVI sense int status */
102#define VDE_I_VBLANK 0x00000002 /* Vertical blank status */
103#define VDE_I_MCCFI 0x00000004 /* MCE compl. frame int status */
104#define VDE_I_VSYNC 0x00000008 /* VGA VSYNC int status */
105#define VDE_I_DMA0DDONE 0x00000010 /* DMA 0 descr done */
106#define VDE_I_DMA0TDONE 0x00000020 /* DMA 0 transfer done */
107#define VDE_I_DMA1DDONE 0x00000040 /* DMA 1 descr done */
108#define VDE_I_DMA1TDONE 0x00000080 /* DMA 1 transfer done */
109#define VDE_I_C1AV 0x00000100 /* Cap Eng 1 act vid end */
110#define VDE_I_HQV0 0x00000200 /* First HQV engine */
111#define VDE_I_HQV1 0x00000400 /* Second HQV engine */
112#define VDE_I_HQV1EN 0x00000800 /* Second HQV engine enable */
113#define VDE_I_C0AV 0x00001000 /* Cap Eng 0 act vid end */
114#define VDE_I_C0VBI 0x00002000 /* Cap Eng 0 VBI end */
115#define VDE_I_C1VBI 0x00004000 /* Cap Eng 1 VBI end */
116#define VDE_I_VSYNC2 0x00008000 /* Sec. Disp. VSYNC */
117#define VDE_I_DVISNSEN 0x00010000 /* DVI sense enable */
118#define VDE_I_VSYNC2EN 0x00020000 /* Sec Disp VSYNC enable */
119#define VDE_I_MCCFIEN 0x00040000 /* MC comp frame int mask enable */
120#define VDE_I_VSYNCEN 0x00080000 /* VSYNC enable */
121#define VDE_I_DMA0DDEN 0x00100000 /* DMA 0 descr done enable */
122#define VDE_I_DMA0TDEN 0x00200000 /* DMA 0 trans done enable */
123#define VDE_I_DMA1DDEN 0x00400000 /* DMA 1 descr done enable */
124#define VDE_I_DMA1TDEN 0x00800000 /* DMA 1 trans done enable */
125#define VDE_I_C1AVEN 0x01000000 /* cap 1 act vid end enable */
126#define VDE_I_HQV0EN 0x02000000 /* First hqv engine enable */
127#define VDE_I_C1VBIEN 0x04000000 /* Cap 1 VBI end enable */
128#define VDE_I_LVDSSI 0x08000000 /* LVDS sense interrupt */
129#define VDE_I_C0AVEN 0x10000000 /* Cap 0 act vid end enable */
130#define VDE_I_C0VBIEN 0x20000000 /* Cap 0 VBI end enable */
131#define VDE_I_LVDSSIEN 0x40000000 /* LVDS Sense enable */
132#define VDE_I_ENABLE 0x80000000 /* Global interrupt enable */
133
90#endif /* __VIA_CORE_H__ */ 134#endif /* __VIA_CORE_H__ */