diff options
author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2010-03-10 18:21:36 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 18:52:33 -0500 |
commit | 4bbac05f8c0ab40dcc52ed6dff44e1b0d80fa6e3 (patch) | |
tree | 2829ac5401f88c99e4f796d7445f9311cd34670c /drivers/video/via/hw.c | |
parent | daacccd1657bdecae8f7c98a8e2b84367a8d4e87 (diff) |
viafb: remove dead code due to IGA1_IGA2
Some code depended on IGA1_IGA2 which was never set (at least with the
symbolic name). Remove this dead code although it might one day be useful
to get a hint on how some things might work. However as this is dead it
is likely full of bugs and would prevent a clean structure (as it has some
very strange things).
Dead code -> no regressions, at least if VIA doesn't do anything very ugly.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: Scott Fang <ScottFang@viatech.com.cn>
Cc: Joseph Chan <JosephChan@via.com.tw>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/via/hw.c')
-rw-r--r-- | drivers/video/via/hw.c | 22 |
1 files changed, 5 insertions, 17 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index ecbb01f05112..ed8d78a35b29 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c | |||
@@ -757,11 +757,8 @@ static void set_crt_output_path(int set_iga) | |||
757 | viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6); | 757 | viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6); |
758 | break; | 758 | break; |
759 | case IGA2: | 759 | case IGA2: |
760 | case IGA1_IGA2: | ||
761 | viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7); | 760 | viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7); |
762 | viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6); | 761 | viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6); |
763 | if (set_iga == IGA1_IGA2) | ||
764 | viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3); | ||
765 | break; | 762 | break; |
766 | } | 763 | } |
767 | } | 764 | } |
@@ -951,13 +948,6 @@ static void set_lcd_output_path(int set_iga, int output_interface) | |||
951 | 948 | ||
952 | enable_second_display_channel(); | 949 | enable_second_display_channel(); |
953 | break; | 950 | break; |
954 | |||
955 | case IGA1_IGA2: | ||
956 | viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3); | ||
957 | viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); | ||
958 | |||
959 | disable_second_display_channel(); | ||
960 | break; | ||
961 | } | 951 | } |
962 | 952 | ||
963 | switch (output_interface) { | 953 | switch (output_interface) { |
@@ -1125,15 +1115,13 @@ void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga) | |||
1125 | struct io_register *reg = NULL; | 1115 | struct io_register *reg = NULL; |
1126 | 1116 | ||
1127 | switch (set_iga) { | 1117 | switch (set_iga) { |
1128 | case IGA1_IGA2: | ||
1129 | case IGA1: | 1118 | case IGA1: |
1130 | reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte); | 1119 | reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte); |
1131 | viafb_load_reg_num = fetch_count_reg. | 1120 | viafb_load_reg_num = fetch_count_reg. |
1132 | iga1_fetch_count_reg.reg_num; | 1121 | iga1_fetch_count_reg.reg_num; |
1133 | reg = fetch_count_reg.iga1_fetch_count_reg.reg; | 1122 | reg = fetch_count_reg.iga1_fetch_count_reg.reg; |
1134 | viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); | 1123 | viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); |
1135 | if (set_iga == IGA1) | 1124 | break; |
1136 | break; | ||
1137 | case IGA2: | 1125 | case IGA2: |
1138 | reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte); | 1126 | reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte); |
1139 | viafb_load_reg_num = fetch_count_reg. | 1127 | viafb_load_reg_num = fetch_count_reg. |
@@ -1503,7 +1491,7 @@ void viafb_set_vclock(u32 CLK, int set_iga) | |||
1503 | /* H.W. Reset : ON */ | 1491 | /* H.W. Reset : ON */ |
1504 | viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); | 1492 | viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); |
1505 | 1493 | ||
1506 | if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) { | 1494 | if (set_iga == IGA1) { |
1507 | /* Change D,N FOR VCLK */ | 1495 | /* Change D,N FOR VCLK */ |
1508 | switch (viaparinfo->chip_info->gfx_chip_name) { | 1496 | switch (viaparinfo->chip_info->gfx_chip_name) { |
1509 | case UNICHROME_CLE266: | 1497 | case UNICHROME_CLE266: |
@@ -1532,7 +1520,7 @@ void viafb_set_vclock(u32 CLK, int set_iga) | |||
1532 | } | 1520 | } |
1533 | } | 1521 | } |
1534 | 1522 | ||
1535 | if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) { | 1523 | if (set_iga == IGA2) { |
1536 | /* Change D,N FOR LCK */ | 1524 | /* Change D,N FOR LCK */ |
1537 | switch (viaparinfo->chip_info->gfx_chip_name) { | 1525 | switch (viaparinfo->chip_info->gfx_chip_name) { |
1538 | case UNICHROME_CLE266: | 1526 | case UNICHROME_CLE266: |
@@ -1561,12 +1549,12 @@ void viafb_set_vclock(u32 CLK, int set_iga) | |||
1561 | viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); | 1549 | viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); |
1562 | 1550 | ||
1563 | /* Reset PLL */ | 1551 | /* Reset PLL */ |
1564 | if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) { | 1552 | if (set_iga == IGA1) { |
1565 | viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1); | 1553 | viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1); |
1566 | viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1); | 1554 | viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1); |
1567 | } | 1555 | } |
1568 | 1556 | ||
1569 | if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) { | 1557 | if (set_iga == IGA2) { |
1570 | viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0); | 1558 | viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0); |
1571 | viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0); | 1559 | viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0); |
1572 | } | 1560 | } |