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authorFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2010-09-07 10:28:26 -0400
committerFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2010-09-23 22:15:03 -0400
commit6f9422d4e407bd63a9bd665ea09e57c1e3800c47 (patch)
treea8db0fe983bf177ed2653249aa55c9c846a0ce25 /drivers/video/via/dvi.c
parentc2a07c932dad49b3b80b11132183b8b2ec8ea1aa (diff)
viafb: introduce per output device power management
This patch moves common parts of dvi.c, lcd.c and vt1636.c to hw.c to start a per output device power management. There should be no runtime changes aside that this patch enables the proc interface to enable/disable devices when needed which greatly increases the chances that changes to the output device configuration will work. However the power management is not yet complete so it might fail on some configurations. As this area is quite complex and touches undocumented things there is a slight chance of regressions. Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Joseph Chan <JosephChan@via.com.tw>
Diffstat (limited to 'drivers/video/via/dvi.c')
-rw-r--r--drivers/video/via/dvi.c25
1 files changed, 1 insertions, 24 deletions
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c
index 7c82f6fda918..84e21b39dd0b 100644
--- a/drivers/video/via/dvi.c
+++ b/drivers/video/via/dvi.c
@@ -470,26 +470,6 @@ static void __devinit dvi_get_panel_size_from_DDCv2(
470void viafb_dvi_disable(void) 470void viafb_dvi_disable(void)
471{ 471{
472 if (viaparinfo->chip_info-> 472 if (viaparinfo->chip_info->
473 tmds_chip_info.output_interface == INTERFACE_DVP0)
474 viafb_write_reg(SR1E, VIASR,
475 viafb_read_reg(VIASR, SR1E) & (~0xC0));
476
477 if (viaparinfo->chip_info->
478 tmds_chip_info.output_interface == INTERFACE_DVP1)
479 viafb_write_reg(SR1E, VIASR,
480 viafb_read_reg(VIASR, SR1E) & (~0x30));
481
482 if (viaparinfo->chip_info->
483 tmds_chip_info.output_interface == INTERFACE_DFP_HIGH)
484 viafb_write_reg(SR2A, VIASR,
485 viafb_read_reg(VIASR, SR2A) & (~0x0C));
486
487 if (viaparinfo->chip_info->
488 tmds_chip_info.output_interface == INTERFACE_DFP_LOW)
489 viafb_write_reg(SR2A, VIASR,
490 viafb_read_reg(VIASR, SR2A) & (~0x03));
491
492 if (viaparinfo->chip_info->
493 tmds_chip_info.output_interface == INTERFACE_TMDS) 473 tmds_chip_info.output_interface == INTERFACE_TMDS)
494 /* Turn off TMDS power. */ 474 /* Turn off TMDS power. */
495 viafb_write_reg(CRD2, VIACR, 475 viafb_write_reg(CRD2, VIACR,
@@ -571,7 +551,6 @@ void viafb_dvi_enable(void)
571 case INTERFACE_DVP0: 551 case INTERFACE_DVP0:
572 viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0); 552 viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0);
573 viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5); 553 viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5);
574 viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6);
575 dvi_patch_skew_dvp0(); 554 dvi_patch_skew_dvp0();
576 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) 555 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
577 tmds_register_write(0x88, 0x3b); 556 tmds_register_write(0x88, 0x3b);
@@ -585,7 +564,6 @@ void viafb_dvi_enable(void)
585 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) 564 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
586 viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5); 565 viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5);
587 566
588 viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5);
589 /*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */ 567 /*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */
590 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) 568 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
591 tmds_register_write(0x88, 0x3b); 569 tmds_register_write(0x88, 0x3b);
@@ -616,14 +594,13 @@ void viafb_dvi_enable(void)
616 if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) 594 if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
617 via_write_reg_mask(VIACR, CR97, 0x03, 0x03); 595 via_write_reg_mask(VIACR, CR97, 0x03, 0x03);
618 596
619 viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3);
620 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); 597 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
621 break; 598 break;
622 599
623 case INTERFACE_DFP_LOW: 600 case INTERFACE_DFP_LOW:
624 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) 601 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
625 break; 602 break;
626 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); 603
627 dvi_patch_skew_dvp_low(); 604 dvi_patch_skew_dvp_low();
628 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); 605 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
629 break; 606 break;