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authorFinn Thain <fthain@telegraphics.com.au>2009-11-03 08:43:52 -0500
committerGeert Uytterhoeven <geert@linux-m68k.org>2010-02-27 12:31:13 -0500
commit11e8faca2e501c25d2f98c1b9534776a9a9704c5 (patch)
tree0f98adbc0b0880e5fc88d47a02c0c39f6f5085bd /drivers/video/valkyriefb.h
parentd876c11a0fd40993136f5cc1e81371ccc6c21a63 (diff)
valkyriefb: various fixes
Valkyriefb and macfb will adopt the same card if they get the chance, so remove valkyrie support from macfb. Also fix the "valkyriefb: can't do 832x624x8" problem reported by Raylynn Knight some time ago, by adding vmode 13 support for CONFIG_MAC. Also add vmode 11 since that works too. Make use of the monitor sense lines on 68k Macs too. Also some cleanups. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Diffstat (limited to 'drivers/video/valkyriefb.h')
-rw-r--r--drivers/video/valkyriefb.h31
1 files changed, 10 insertions, 21 deletions
diff --git a/drivers/video/valkyriefb.h b/drivers/video/valkyriefb.h
index 97aaf7bb6417..d787441e5a42 100644
--- a/drivers/video/valkyriefb.h
+++ b/drivers/video/valkyriefb.h
@@ -134,15 +134,7 @@ static struct valkyrie_regvals valkyrie_reg_init_14 = {
134 { 1024, 0 }, 134 { 1024, 0 },
135 1024, 768 135 1024, 768
136}; 136};
137 137#endif /* !defined CONFIG_MAC */
138/* Register values for 800x600, 72Hz mode (11) */
139static struct valkyrie_regvals valkyrie_reg_init_11 = {
140 13,
141 { 17, 27, 3 }, /* pixel clock = 49.63MHz for V=71.66Hz */
142 { 800, 0 },
143 800, 600
144};
145#endif /* CONFIG_MAC */
146 138
147/* Register values for 832x624, 75Hz mode (13) */ 139/* Register values for 832x624, 75Hz mode (13) */
148static struct valkyrie_regvals valkyrie_reg_init_13 = { 140static struct valkyrie_regvals valkyrie_reg_init_13 = {
@@ -152,6 +144,14 @@ static struct valkyrie_regvals valkyrie_reg_init_13 = {
152 832, 624 144 832, 624
153}; 145};
154 146
147/* Register values for 800x600, 72Hz mode (11) */
148static struct valkyrie_regvals valkyrie_reg_init_11 = {
149 13,
150 { 17, 27, 3 }, /* pixel clock = 49.63MHz for V=71.66Hz */
151 { 800, 0 },
152 800, 600
153};
154
155/* Register values for 800x600, 60Hz mode (10) */ 155/* Register values for 800x600, 60Hz mode (10) */
156static struct valkyrie_regvals valkyrie_reg_init_10 = { 156static struct valkyrie_regvals valkyrie_reg_init_10 = {
157 12, 157 12,
@@ -188,24 +188,13 @@ static struct valkyrie_regvals *valkyrie_reg_init[VMODE_MAX] = {
188 NULL, 188 NULL,
189 NULL, 189 NULL,
190 &valkyrie_reg_init_10, 190 &valkyrie_reg_init_10,
191#ifdef CONFIG_MAC
192 NULL,
193 NULL,
194 &valkyrie_reg_init_13,
195 NULL,
196 NULL,
197 NULL,
198 NULL,
199#else
200 &valkyrie_reg_init_11, 191 &valkyrie_reg_init_11,
201 NULL, 192 NULL,
202 &valkyrie_reg_init_13, 193 &valkyrie_reg_init_13,
194#ifndef CONFIG_MAC
203 &valkyrie_reg_init_14, 195 &valkyrie_reg_init_14,
204 &valkyrie_reg_init_15, 196 &valkyrie_reg_init_15,
205 NULL, 197 NULL,
206 &valkyrie_reg_init_17, 198 &valkyrie_reg_init_17,
207#endif 199#endif
208 NULL,
209 NULL,
210 NULL
211}; 200};