diff options
author | David Miller <davem@davemloft.net> | 2011-01-11 18:52:25 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-03-22 02:47:22 -0400 |
commit | 38d2620ea40c2f9a5f17d6488bf004973570279c (patch) | |
tree | 7eb90cb12bf9264c87d9b4daeb2ec197da8b2f9f /drivers/video/svgalib.c | |
parent | 55db092388455457791cf00216b6b3965a8071f8 (diff) |
svga: Make svga_set_timings() take an iomem regbase pointer.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/video/svgalib.c')
-rw-r--r-- | drivers/video/svgalib.c | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 4876be85ecfd..33df9ec91795 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c | |||
@@ -507,8 +507,9 @@ int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screenin | |||
507 | } | 507 | } |
508 | 508 | ||
509 | /* Set CRT timing registers */ | 509 | /* Set CRT timing registers */ |
510 | void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, | 510 | void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, |
511 | u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) | 511 | struct fb_var_screeninfo *var, |
512 | u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) | ||
512 | { | 513 | { |
513 | u8 regval; | 514 | u8 regval; |
514 | u32 value; | 515 | u32 value; |
@@ -516,66 +517,66 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf | |||
516 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; | 517 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; |
517 | value = (value * hmul) / hdiv; | 518 | value = (value * hmul) / hdiv; |
518 | pr_debug("fb%d: horizontal total : %d\n", node, value); | 519 | pr_debug("fb%d: horizontal total : %d\n", node, value); |
519 | svga_wcrt_multi(NULL, tm->h_total_regs, (value / 8) - 5); | 520 | svga_wcrt_multi(regbase, tm->h_total_regs, (value / 8) - 5); |
520 | 521 | ||
521 | value = var->xres; | 522 | value = var->xres; |
522 | value = (value * hmul) / hdiv; | 523 | value = (value * hmul) / hdiv; |
523 | pr_debug("fb%d: horizontal display : %d\n", node, value); | 524 | pr_debug("fb%d: horizontal display : %d\n", node, value); |
524 | svga_wcrt_multi(NULL, tm->h_display_regs, (value / 8) - 1); | 525 | svga_wcrt_multi(regbase, tm->h_display_regs, (value / 8) - 1); |
525 | 526 | ||
526 | value = var->xres; | 527 | value = var->xres; |
527 | value = (value * hmul) / hdiv; | 528 | value = (value * hmul) / hdiv; |
528 | pr_debug("fb%d: horizontal blank start: %d\n", node, value); | 529 | pr_debug("fb%d: horizontal blank start: %d\n", node, value); |
529 | svga_wcrt_multi(NULL, tm->h_blank_start_regs, (value / 8) - 1 + hborder); | 530 | svga_wcrt_multi(regbase, tm->h_blank_start_regs, (value / 8) - 1 + hborder); |
530 | 531 | ||
531 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; | 532 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; |
532 | value = (value * hmul) / hdiv; | 533 | value = (value * hmul) / hdiv; |
533 | pr_debug("fb%d: horizontal blank end : %d\n", node, value); | 534 | pr_debug("fb%d: horizontal blank end : %d\n", node, value); |
534 | svga_wcrt_multi(NULL, tm->h_blank_end_regs, (value / 8) - 1 - hborder); | 535 | svga_wcrt_multi(regbase, tm->h_blank_end_regs, (value / 8) - 1 - hborder); |
535 | 536 | ||
536 | value = var->xres + var->right_margin; | 537 | value = var->xres + var->right_margin; |
537 | value = (value * hmul) / hdiv; | 538 | value = (value * hmul) / hdiv; |
538 | pr_debug("fb%d: horizontal sync start : %d\n", node, value); | 539 | pr_debug("fb%d: horizontal sync start : %d\n", node, value); |
539 | svga_wcrt_multi(NULL, tm->h_sync_start_regs, (value / 8)); | 540 | svga_wcrt_multi(regbase, tm->h_sync_start_regs, (value / 8)); |
540 | 541 | ||
541 | value = var->xres + var->right_margin + var->hsync_len; | 542 | value = var->xres + var->right_margin + var->hsync_len; |
542 | value = (value * hmul) / hdiv; | 543 | value = (value * hmul) / hdiv; |
543 | pr_debug("fb%d: horizontal sync end : %d\n", node, value); | 544 | pr_debug("fb%d: horizontal sync end : %d\n", node, value); |
544 | svga_wcrt_multi(NULL, tm->h_sync_end_regs, (value / 8)); | 545 | svga_wcrt_multi(regbase, tm->h_sync_end_regs, (value / 8)); |
545 | 546 | ||
546 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; | 547 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; |
547 | value = (value * vmul) / vdiv; | 548 | value = (value * vmul) / vdiv; |
548 | pr_debug("fb%d: vertical total : %d\n", node, value); | 549 | pr_debug("fb%d: vertical total : %d\n", node, value); |
549 | svga_wcrt_multi(NULL, tm->v_total_regs, value - 2); | 550 | svga_wcrt_multi(regbase, tm->v_total_regs, value - 2); |
550 | 551 | ||
551 | value = var->yres; | 552 | value = var->yres; |
552 | value = (value * vmul) / vdiv; | 553 | value = (value * vmul) / vdiv; |
553 | pr_debug("fb%d: vertical display : %d\n", node, value); | 554 | pr_debug("fb%d: vertical display : %d\n", node, value); |
554 | svga_wcrt_multi(NULL, tm->v_display_regs, value - 1); | 555 | svga_wcrt_multi(regbase, tm->v_display_regs, value - 1); |
555 | 556 | ||
556 | value = var->yres; | 557 | value = var->yres; |
557 | value = (value * vmul) / vdiv; | 558 | value = (value * vmul) / vdiv; |
558 | pr_debug("fb%d: vertical blank start : %d\n", node, value); | 559 | pr_debug("fb%d: vertical blank start : %d\n", node, value); |
559 | svga_wcrt_multi(NULL, tm->v_blank_start_regs, value); | 560 | svga_wcrt_multi(regbase, tm->v_blank_start_regs, value); |
560 | 561 | ||
561 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; | 562 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; |
562 | value = (value * vmul) / vdiv; | 563 | value = (value * vmul) / vdiv; |
563 | pr_debug("fb%d: vertical blank end : %d\n", node, value); | 564 | pr_debug("fb%d: vertical blank end : %d\n", node, value); |
564 | svga_wcrt_multi(NULL, tm->v_blank_end_regs, value - 2); | 565 | svga_wcrt_multi(regbase, tm->v_blank_end_regs, value - 2); |
565 | 566 | ||
566 | value = var->yres + var->lower_margin; | 567 | value = var->yres + var->lower_margin; |
567 | value = (value * vmul) / vdiv; | 568 | value = (value * vmul) / vdiv; |
568 | pr_debug("fb%d: vertical sync start : %d\n", node, value); | 569 | pr_debug("fb%d: vertical sync start : %d\n", node, value); |
569 | svga_wcrt_multi(NULL, tm->v_sync_start_regs, value); | 570 | svga_wcrt_multi(regbase, tm->v_sync_start_regs, value); |
570 | 571 | ||
571 | value = var->yres + var->lower_margin + var->vsync_len; | 572 | value = var->yres + var->lower_margin + var->vsync_len; |
572 | value = (value * vmul) / vdiv; | 573 | value = (value * vmul) / vdiv; |
573 | pr_debug("fb%d: vertical sync end : %d\n", node, value); | 574 | pr_debug("fb%d: vertical sync end : %d\n", node, value); |
574 | svga_wcrt_multi(NULL, tm->v_sync_end_regs, value); | 575 | svga_wcrt_multi(regbase, tm->v_sync_end_regs, value); |
575 | 576 | ||
576 | /* Set horizontal and vertical sync pulse polarity in misc register */ | 577 | /* Set horizontal and vertical sync pulse polarity in misc register */ |
577 | 578 | ||
578 | regval = vga_r(NULL, VGA_MIS_R); | 579 | regval = vga_r(regbase, VGA_MIS_R); |
579 | if (var->sync & FB_SYNC_HOR_HIGH_ACT) { | 580 | if (var->sync & FB_SYNC_HOR_HIGH_ACT) { |
580 | pr_debug("fb%d: positive horizontal sync\n", node); | 581 | pr_debug("fb%d: positive horizontal sync\n", node); |
581 | regval = regval & ~0x80; | 582 | regval = regval & ~0x80; |
@@ -590,7 +591,7 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf | |||
590 | pr_debug("fb%d: negative vertical sync\n\n", node); | 591 | pr_debug("fb%d: negative vertical sync\n\n", node); |
591 | regval = regval | 0x40; | 592 | regval = regval | 0x40; |
592 | } | 593 | } |
593 | vga_w(NULL, VGA_MIS_W, regval); | 594 | vga_w(regbase, VGA_MIS_W, regval); |
594 | } | 595 | } |
595 | 596 | ||
596 | 597 | ||