diff options
author | Aaro Koskinen <aaro.koskinen@iki.fi> | 2010-12-20 16:50:21 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-12-21 22:57:23 -0500 |
commit | 114776776a8e38fff5772efeef68fc3fdde76a82 (patch) | |
tree | 41dc4ffdbeccd4e2f2af9118be2714550ee67ec5 /drivers/video/sis/sis.h | |
parent | ad78adb4e814104510da421a38cfe89ab018a8b1 (diff) |
sisfb: delete unused register I/O macros
Delete unused register I/O macros.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Thomas Winischhofer <thomas@winischhofer.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/video/sis/sis.h')
-rw-r--r-- | drivers/video/sis/sis.h | 54 |
1 files changed, 1 insertions, 53 deletions
diff --git a/drivers/video/sis/sis.h b/drivers/video/sis/sis.h index acf0766c4dbf..eac7a01925f3 100644 --- a/drivers/video/sis/sis.h +++ b/drivers/video/sis/sis.h | |||
@@ -307,7 +307,7 @@ | |||
307 | #define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV) | 307 | #define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV) |
308 | #define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T) | 308 | #define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T) |
309 | 309 | ||
310 | /* I/O port access macros and functions */ | 310 | /* I/O port access functions */ |
311 | 311 | ||
312 | void SiS_SetReg(SISIOADDRESS, u8, u8); | 312 | void SiS_SetReg(SISIOADDRESS, u8, u8); |
313 | void SiS_SetRegByte(SISIOADDRESS, u8); | 313 | void SiS_SetRegByte(SISIOADDRESS, u8); |
@@ -321,58 +321,6 @@ u8 SiS_GetRegByte(SISIOADDRESS); | |||
321 | u16 SiS_GetRegShort(SISIOADDRESS); | 321 | u16 SiS_GetRegShort(SISIOADDRESS); |
322 | u32 SiS_GetRegLong(SISIOADDRESS); | 322 | u32 SiS_GetRegLong(SISIOADDRESS); |
323 | 323 | ||
324 | #define inSISREG(base) inb(base) | ||
325 | |||
326 | #define outSISREG(base,val) outb(val,base) | ||
327 | |||
328 | #define orSISREG(base,val) \ | ||
329 | do { \ | ||
330 | u8 __Temp = inSISREG(base); \ | ||
331 | outSISREG(base, __Temp | (val));\ | ||
332 | } while (0) | ||
333 | |||
334 | #define andSISREG(base,val) \ | ||
335 | do { \ | ||
336 | u8 __Temp = inSISREG(base); \ | ||
337 | outSISREG(base, __Temp & (val));\ | ||
338 | } while (0) | ||
339 | |||
340 | #define inSISIDXREG(base,idx,var) \ | ||
341 | do { \ | ||
342 | outSISREG(base, idx); \ | ||
343 | var = inSISREG((base)+1); \ | ||
344 | } while (0) | ||
345 | |||
346 | #define outSISIDXREG(base,idx,val) \ | ||
347 | do { \ | ||
348 | outSISREG(base, idx); \ | ||
349 | outSISREG((base)+1, val); \ | ||
350 | } while (0) | ||
351 | |||
352 | #define orSISIDXREG(base,idx,val) \ | ||
353 | do { \ | ||
354 | u8 __Temp; \ | ||
355 | outSISREG(base, idx); \ | ||
356 | __Temp = inSISREG((base)+1) | (val); \ | ||
357 | outSISREG((base)+1, __Temp); \ | ||
358 | } while (0) | ||
359 | |||
360 | #define andSISIDXREG(base,idx,and) \ | ||
361 | do { \ | ||
362 | u8 __Temp; \ | ||
363 | outSISREG(base, idx); \ | ||
364 | __Temp = inSISREG((base)+1) & (and); \ | ||
365 | outSISREG((base)+1, __Temp); \ | ||
366 | } while (0) | ||
367 | |||
368 | #define setSISIDXREG(base,idx,and,or) \ | ||
369 | do { \ | ||
370 | u8 __Temp; \ | ||
371 | outSISREG(base, idx); \ | ||
372 | __Temp = (inSISREG((base)+1) & (and)) | (or); \ | ||
373 | outSISREG((base)+1, __Temp); \ | ||
374 | } while (0) | ||
375 | |||
376 | /* MMIO access macros */ | 324 | /* MMIO access macros */ |
377 | #define MMIO_IN8(base, offset) readb((base+offset)) | 325 | #define MMIO_IN8(base, offset) readb((base+offset)) |
378 | #define MMIO_IN16(base, offset) readw((base+offset)) | 326 | #define MMIO_IN16(base, offset) readw((base+offset)) |