diff options
author | Antonino A. Daplas <adaplas@gmail.com> | 2006-06-26 03:26:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 12:58:30 -0400 |
commit | 026fbe16c29848648599df9967b98250a6b86916 (patch) | |
tree | 1810960b5b8130265c3509c957b1b0216b0103bd /drivers/video/savage/savagefb_driver.c | |
parent | 0c683dbfc017e52e632853b33981be1a49276ba6 (diff) |
[PATCH] savagefb: Whitespace cleanup
Whitespace cleanup
Signed-off-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/video/savage/savagefb_driver.c')
-rw-r--r-- | drivers/video/savage/savagefb_driver.c | 993 |
1 files changed, 496 insertions, 497 deletions
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c index 3bd0a573d755..78883cf66a4d 100644 --- a/drivers/video/savage/savagefb_driver.c +++ b/drivers/video/savage/savagefb_driver.c | |||
@@ -86,15 +86,15 @@ MODULE_DESCRIPTION("FBDev driver for S3 Savage PCI/AGP Chips"); | |||
86 | 86 | ||
87 | /* --------------------------------------------------------------------- */ | 87 | /* --------------------------------------------------------------------- */ |
88 | 88 | ||
89 | static void vgaHWSeqReset (struct savagefb_par *par, int start) | 89 | static void vgaHWSeqReset(struct savagefb_par *par, int start) |
90 | { | 90 | { |
91 | if (start) | 91 | if (start) |
92 | VGAwSEQ (0x00, 0x01, par); /* Synchronous Reset */ | 92 | VGAwSEQ(0x00, 0x01, par); /* Synchronous Reset */ |
93 | else | 93 | else |
94 | VGAwSEQ (0x00, 0x03, par); /* End Reset */ | 94 | VGAwSEQ(0x00, 0x03, par); /* End Reset */ |
95 | } | 95 | } |
96 | 96 | ||
97 | static void vgaHWProtect (struct savagefb_par *par, int on) | 97 | static void vgaHWProtect(struct savagefb_par *par, int on) |
98 | { | 98 | { |
99 | unsigned char tmp; | 99 | unsigned char tmp; |
100 | 100 | ||
@@ -102,10 +102,10 @@ static void vgaHWProtect (struct savagefb_par *par, int on) | |||
102 | /* | 102 | /* |
103 | * Turn off screen and disable sequencer. | 103 | * Turn off screen and disable sequencer. |
104 | */ | 104 | */ |
105 | tmp = VGArSEQ (0x01, par); | 105 | tmp = VGArSEQ(0x01, par); |
106 | 106 | ||
107 | vgaHWSeqReset (par, 1); /* start synchronous reset */ | 107 | vgaHWSeqReset(par, 1); /* start synchronous reset */ |
108 | VGAwSEQ (0x01, tmp | 0x20, par);/* disable the display */ | 108 | VGAwSEQ(0x01, tmp | 0x20, par);/* disable the display */ |
109 | 109 | ||
110 | VGAenablePalette(par); | 110 | VGAenablePalette(par); |
111 | } else { | 111 | } else { |
@@ -113,46 +113,46 @@ static void vgaHWProtect (struct savagefb_par *par, int on) | |||
113 | * Reenable sequencer, then turn on screen. | 113 | * Reenable sequencer, then turn on screen. |
114 | */ | 114 | */ |
115 | 115 | ||
116 | tmp = VGArSEQ (0x01, par); | 116 | tmp = VGArSEQ(0x01, par); |
117 | 117 | ||
118 | VGAwSEQ (0x01, tmp & ~0x20, par);/* reenable display */ | 118 | VGAwSEQ(0x01, tmp & ~0x20, par);/* reenable display */ |
119 | vgaHWSeqReset (par, 0); /* clear synchronous reset */ | 119 | vgaHWSeqReset(par, 0); /* clear synchronous reset */ |
120 | 120 | ||
121 | VGAdisablePalette(par); | 121 | VGAdisablePalette(par); |
122 | } | 122 | } |
123 | } | 123 | } |
124 | 124 | ||
125 | static void vgaHWRestore (struct savagefb_par *par, struct savage_reg *reg) | 125 | static void vgaHWRestore(struct savagefb_par *par, struct savage_reg *reg) |
126 | { | 126 | { |
127 | int i; | 127 | int i; |
128 | 128 | ||
129 | VGAwMISC (reg->MiscOutReg, par); | 129 | VGAwMISC(reg->MiscOutReg, par); |
130 | 130 | ||
131 | for (i = 1; i < 5; i++) | 131 | for (i = 1; i < 5; i++) |
132 | VGAwSEQ (i, reg->Sequencer[i], par); | 132 | VGAwSEQ(i, reg->Sequencer[i], par); |
133 | 133 | ||
134 | /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or | 134 | /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or |
135 | CRTC[17] */ | 135 | CRTC[17] */ |
136 | VGAwCR (17, reg->CRTC[17] & ~0x80, par); | 136 | VGAwCR(17, reg->CRTC[17] & ~0x80, par); |
137 | 137 | ||
138 | for (i = 0; i < 25; i++) | 138 | for (i = 0; i < 25; i++) |
139 | VGAwCR (i, reg->CRTC[i], par); | 139 | VGAwCR(i, reg->CRTC[i], par); |
140 | 140 | ||
141 | for (i = 0; i < 9; i++) | 141 | for (i = 0; i < 9; i++) |
142 | VGAwGR (i, reg->Graphics[i], par); | 142 | VGAwGR(i, reg->Graphics[i], par); |
143 | 143 | ||
144 | VGAenablePalette(par); | 144 | VGAenablePalette(par); |
145 | 145 | ||
146 | for (i = 0; i < 21; i++) | 146 | for (i = 0; i < 21; i++) |
147 | VGAwATTR (i, reg->Attribute[i], par); | 147 | VGAwATTR(i, reg->Attribute[i], par); |
148 | 148 | ||
149 | VGAdisablePalette(par); | 149 | VGAdisablePalette(par); |
150 | } | 150 | } |
151 | 151 | ||
152 | static void vgaHWInit (struct fb_var_screeninfo *var, | 152 | static void vgaHWInit(struct fb_var_screeninfo *var, |
153 | struct savagefb_par *par, | 153 | struct savagefb_par *par, |
154 | struct xtimings *timings, | 154 | struct xtimings *timings, |
155 | struct savage_reg *reg) | 155 | struct savage_reg *reg) |
156 | { | 156 | { |
157 | reg->MiscOutReg = 0x23; | 157 | reg->MiscOutReg = 0x23; |
158 | 158 | ||
@@ -307,13 +307,13 @@ savage2000_waitidle(struct savagefb_par *par) | |||
307 | 307 | ||
308 | #ifdef CONFIG_FB_SAVAGE_ACCEL | 308 | #ifdef CONFIG_FB_SAVAGE_ACCEL |
309 | static void | 309 | static void |
310 | SavageSetup2DEngine (struct savagefb_par *par) | 310 | SavageSetup2DEngine(struct savagefb_par *par) |
311 | { | 311 | { |
312 | unsigned long GlobalBitmapDescriptor; | 312 | unsigned long GlobalBitmapDescriptor; |
313 | 313 | ||
314 | GlobalBitmapDescriptor = 1 | 8 | BCI_BD_BW_DISABLE; | 314 | GlobalBitmapDescriptor = 1 | 8 | BCI_BD_BW_DISABLE; |
315 | BCI_BD_SET_BPP (GlobalBitmapDescriptor, par->depth); | 315 | BCI_BD_SET_BPP(GlobalBitmapDescriptor, par->depth); |
316 | BCI_BD_SET_STRIDE (GlobalBitmapDescriptor, par->vwidth); | 316 | BCI_BD_SET_STRIDE(GlobalBitmapDescriptor, par->vwidth); |
317 | 317 | ||
318 | switch(par->chip) { | 318 | switch(par->chip) { |
319 | case S3_SAVAGE3D: | 319 | case S3_SAVAGE3D: |
@@ -362,30 +362,30 @@ SavageSetup2DEngine (struct savagefb_par *par) | |||
362 | vga_out8(0x3d5, 0x0c, par); | 362 | vga_out8(0x3d5, 0x0c, par); |
363 | 363 | ||
364 | /* Set stride to use GBD. */ | 364 | /* Set stride to use GBD. */ |
365 | vga_out8 (0x3d4, 0x50, par); | 365 | vga_out8(0x3d4, 0x50, par); |
366 | vga_out8 (0x3d5, vga_in8(0x3d5, par) | 0xC1, par); | 366 | vga_out8(0x3d5, vga_in8(0x3d5, par) | 0xC1, par); |
367 | 367 | ||
368 | /* Enable 2D engine. */ | 368 | /* Enable 2D engine. */ |
369 | vga_out8 (0x3d4, 0x40, par); | 369 | vga_out8(0x3d4, 0x40, par); |
370 | vga_out8 (0x3d5, 0x01, par); | 370 | vga_out8(0x3d5, 0x01, par); |
371 | 371 | ||
372 | savage_out32 (MONO_PAT_0, ~0, par); | 372 | savage_out32(MONO_PAT_0, ~0, par); |
373 | savage_out32 (MONO_PAT_1, ~0, par); | 373 | savage_out32(MONO_PAT_1, ~0, par); |
374 | 374 | ||
375 | /* Setup plane masks */ | 375 | /* Setup plane masks */ |
376 | savage_out32 (0x8128, ~0, par); /* enable all write planes */ | 376 | savage_out32(0x8128, ~0, par); /* enable all write planes */ |
377 | savage_out32 (0x812C, ~0, par); /* enable all read planes */ | 377 | savage_out32(0x812C, ~0, par); /* enable all read planes */ |
378 | savage_out16 (0x8134, 0x27, par); | 378 | savage_out16(0x8134, 0x27, par); |
379 | savage_out16 (0x8136, 0x07, par); | 379 | savage_out16(0x8136, 0x07, par); |
380 | 380 | ||
381 | /* Now set the GBD */ | 381 | /* Now set the GBD */ |
382 | par->bci_ptr = 0; | 382 | par->bci_ptr = 0; |
383 | par->SavageWaitFifo (par, 4); | 383 | par->SavageWaitFifo(par, 4); |
384 | 384 | ||
385 | BCI_SEND( BCI_CMD_SETREG | (1 << 16) | BCI_GBD1 ); | 385 | BCI_SEND(BCI_CMD_SETREG | (1 << 16) | BCI_GBD1); |
386 | BCI_SEND( 0 ); | 386 | BCI_SEND(0); |
387 | BCI_SEND( BCI_CMD_SETREG | (1 << 16) | BCI_GBD2 ); | 387 | BCI_SEND(BCI_CMD_SETREG | (1 << 16) | BCI_GBD2); |
388 | BCI_SEND( GlobalBitmapDescriptor ); | 388 | BCI_SEND(GlobalBitmapDescriptor); |
389 | } | 389 | } |
390 | 390 | ||
391 | static void savagefb_set_clip(struct fb_info *info) | 391 | static void savagefb_set_clip(struct fb_info *info) |
@@ -401,7 +401,7 @@ static void savagefb_set_clip(struct fb_info *info) | |||
401 | BCI_SEND(BCI_CLIP_BR(0xfff, 0xfff)); | 401 | BCI_SEND(BCI_CLIP_BR(0xfff, 0xfff)); |
402 | } | 402 | } |
403 | #else | 403 | #else |
404 | static void SavageSetup2DEngine (struct savagefb_par *par) {} | 404 | static void SavageSetup2DEngine(struct savagefb_par *par) {} |
405 | 405 | ||
406 | #endif | 406 | #endif |
407 | 407 | ||
@@ -415,11 +415,11 @@ static void SavageCalcClock(long freq, int min_m, int min_n1, int max_n1, | |||
415 | unsigned char n1, n2, best_n1=16+2, best_n2=2, best_m=125+2; | 415 | unsigned char n1, n2, best_n1=16+2, best_n2=2, best_m=125+2; |
416 | 416 | ||
417 | if (freq < freq_min / (1 << max_n2)) { | 417 | if (freq < freq_min / (1 << max_n2)) { |
418 | printk (KERN_ERR "invalid frequency %ld Khz\n", freq); | 418 | printk(KERN_ERR "invalid frequency %ld Khz\n", freq); |
419 | freq = freq_min / (1 << max_n2); | 419 | freq = freq_min / (1 << max_n2); |
420 | } | 420 | } |
421 | if (freq > freq_max / (1 << min_n2)) { | 421 | if (freq > freq_max / (1 << min_n2)) { |
422 | printk (KERN_ERR "invalid frequency %ld Khz\n", freq); | 422 | printk(KERN_ERR "invalid frequency %ld Khz\n", freq); |
423 | freq = freq_max / (1 << min_n2); | 423 | freq = freq_max / (1 << min_n2); |
424 | } | 424 | } |
425 | 425 | ||
@@ -470,12 +470,12 @@ static int common_calc_clock(long freq, int min_m, int min_n1, int max_n1, | |||
470 | BASE_FREQ; | 470 | BASE_FREQ; |
471 | if (m < min_m + 2 || m > 127+2) | 471 | if (m < min_m + 2 || m > 127+2) |
472 | continue; | 472 | continue; |
473 | if((m * BASE_FREQ >= freq_min * n1) && | 473 | if ((m * BASE_FREQ >= freq_min * n1) && |
474 | (m * BASE_FREQ <= freq_max * n1)) { | 474 | (m * BASE_FREQ <= freq_max * n1)) { |
475 | diff = freq * (1 << n2) * n1 - BASE_FREQ * m; | 475 | diff = freq * (1 << n2) * n1 - BASE_FREQ * m; |
476 | if(diff < 0) | 476 | if (diff < 0) |
477 | diff = -diff; | 477 | diff = -diff; |
478 | if(diff < best_diff) { | 478 | if (diff < best_diff) { |
479 | best_diff = diff; | 479 | best_diff = diff; |
480 | best_m = m; | 480 | best_m = m; |
481 | best_n1 = n1; | 481 | best_n1 = n1; |
@@ -485,7 +485,7 @@ static int common_calc_clock(long freq, int min_m, int min_n1, int max_n1, | |||
485 | } | 485 | } |
486 | } | 486 | } |
487 | 487 | ||
488 | if(max_n1 == 63) | 488 | if (max_n1 == 63) |
489 | *ndiv = (best_n1 - 2) | (best_n2 << 6); | 489 | *ndiv = (best_n1 - 2) | (best_n2 << 6); |
490 | else | 490 | else |
491 | *ndiv = (best_n1 - 2) | (best_n2 << 5); | 491 | *ndiv = (best_n1 - 2) | (best_n2 << 5); |
@@ -505,23 +505,23 @@ static void SavagePrintRegs(void) | |||
505 | int vgaCRReg = 0x3d5; | 505 | int vgaCRReg = 0x3d5; |
506 | 506 | ||
507 | printk(KERN_DEBUG "SR x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE " | 507 | printk(KERN_DEBUG "SR x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE " |
508 | "xF" ); | 508 | "xF"); |
509 | 509 | ||
510 | for( i = 0; i < 0x70; i++ ) { | 510 | for (i = 0; i < 0x70; i++) { |
511 | if( !(i % 16) ) | 511 | if (!(i % 16)) |
512 | printk(KERN_DEBUG "\nSR%xx ", i >> 4 ); | 512 | printk(KERN_DEBUG "\nSR%xx ", i >> 4); |
513 | vga_out8( 0x3c4, i, par); | 513 | vga_out8(0x3c4, i, par); |
514 | printk(KERN_DEBUG " %02x", vga_in8(0x3c5, par) ); | 514 | printk(KERN_DEBUG " %02x", vga_in8(0x3c5, par)); |
515 | } | 515 | } |
516 | 516 | ||
517 | printk(KERN_DEBUG "\n\nCR x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC " | 517 | printk(KERN_DEBUG "\n\nCR x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC " |
518 | "xD xE xF" ); | 518 | "xD xE xF"); |
519 | 519 | ||
520 | for( i = 0; i < 0xB7; i++ ) { | 520 | for (i = 0; i < 0xB7; i++) { |
521 | if( !(i % 16) ) | 521 | if (!(i % 16)) |
522 | printk(KERN_DEBUG "\nCR%xx ", i >> 4 ); | 522 | printk(KERN_DEBUG "\nCR%xx ", i >> 4); |
523 | vga_out8( vgaCRIndex, i, par); | 523 | vga_out8(vgaCRIndex, i, par); |
524 | printk(KERN_DEBUG " %02x", vga_in8(vgaCRReg, par) ); | 524 | printk(KERN_DEBUG " %02x", vga_in8(vgaCRReg, par)); |
525 | } | 525 | } |
526 | 526 | ||
527 | printk(KERN_DEBUG "\n\n"); | 527 | printk(KERN_DEBUG "\n\n"); |
@@ -534,139 +534,139 @@ static void savage_get_default_par(struct savagefb_par *par, struct savage_reg * | |||
534 | { | 534 | { |
535 | unsigned char cr3a, cr53, cr66; | 535 | unsigned char cr3a, cr53, cr66; |
536 | 536 | ||
537 | vga_out16 (0x3d4, 0x4838, par); | 537 | vga_out16(0x3d4, 0x4838, par); |
538 | vga_out16 (0x3d4, 0xa039, par); | 538 | vga_out16(0x3d4, 0xa039, par); |
539 | vga_out16 (0x3c4, 0x0608, par); | 539 | vga_out16(0x3c4, 0x0608, par); |
540 | 540 | ||
541 | vga_out8 (0x3d4, 0x66, par); | 541 | vga_out8(0x3d4, 0x66, par); |
542 | cr66 = vga_in8 (0x3d5, par); | 542 | cr66 = vga_in8(0x3d5, par); |
543 | vga_out8 (0x3d5, cr66 | 0x80, par); | 543 | vga_out8(0x3d5, cr66 | 0x80, par); |
544 | vga_out8 (0x3d4, 0x3a, par); | 544 | vga_out8(0x3d4, 0x3a, par); |
545 | cr3a = vga_in8 (0x3d5, par); | 545 | cr3a = vga_in8(0x3d5, par); |
546 | vga_out8 (0x3d5, cr3a | 0x80, par); | 546 | vga_out8(0x3d5, cr3a | 0x80, par); |
547 | vga_out8 (0x3d4, 0x53, par); | 547 | vga_out8(0x3d4, 0x53, par); |
548 | cr53 = vga_in8 (0x3d5, par); | 548 | cr53 = vga_in8(0x3d5, par); |
549 | vga_out8 (0x3d5, cr53 & 0x7f, par); | 549 | vga_out8(0x3d5, cr53 & 0x7f, par); |
550 | 550 | ||
551 | vga_out8 (0x3d4, 0x66, par); | 551 | vga_out8(0x3d4, 0x66, par); |
552 | vga_out8 (0x3d5, cr66, par); | 552 | vga_out8(0x3d5, cr66, par); |
553 | vga_out8 (0x3d4, 0x3a, par); | 553 | vga_out8(0x3d4, 0x3a, par); |
554 | vga_out8 (0x3d5, cr3a, par); | 554 | vga_out8(0x3d5, cr3a, par); |
555 | 555 | ||
556 | vga_out8 (0x3d4, 0x66, par); | 556 | vga_out8(0x3d4, 0x66, par); |
557 | vga_out8 (0x3d5, cr66, par); | 557 | vga_out8(0x3d5, cr66, par); |
558 | vga_out8 (0x3d4, 0x3a, par); | 558 | vga_out8(0x3d4, 0x3a, par); |
559 | vga_out8 (0x3d5, cr3a, par); | 559 | vga_out8(0x3d5, cr3a, par); |
560 | 560 | ||
561 | /* unlock extended seq regs */ | 561 | /* unlock extended seq regs */ |
562 | vga_out8 (0x3c4, 0x08, par); | 562 | vga_out8(0x3c4, 0x08, par); |
563 | reg->SR08 = vga_in8 (0x3c5, par); | 563 | reg->SR08 = vga_in8(0x3c5, par); |
564 | vga_out8 (0x3c5, 0x06, par); | 564 | vga_out8(0x3c5, 0x06, par); |
565 | 565 | ||
566 | /* now save all the extended regs we need */ | 566 | /* now save all the extended regs we need */ |
567 | vga_out8 (0x3d4, 0x31, par); | 567 | vga_out8(0x3d4, 0x31, par); |
568 | reg->CR31 = vga_in8 (0x3d5, par); | 568 | reg->CR31 = vga_in8(0x3d5, par); |
569 | vga_out8 (0x3d4, 0x32, par); | 569 | vga_out8(0x3d4, 0x32, par); |
570 | reg->CR32 = vga_in8 (0x3d5, par); | 570 | reg->CR32 = vga_in8(0x3d5, par); |
571 | vga_out8 (0x3d4, 0x34, par); | 571 | vga_out8(0x3d4, 0x34, par); |
572 | reg->CR34 = vga_in8 (0x3d5, par); | 572 | reg->CR34 = vga_in8(0x3d5, par); |
573 | vga_out8 (0x3d4, 0x36, par); | 573 | vga_out8(0x3d4, 0x36, par); |
574 | reg->CR36 = vga_in8 (0x3d5, par); | 574 | reg->CR36 = vga_in8(0x3d5, par); |
575 | vga_out8 (0x3d4, 0x3a, par); | 575 | vga_out8(0x3d4, 0x3a, par); |
576 | reg->CR3A = vga_in8 (0x3d5, par); | 576 | reg->CR3A = vga_in8(0x3d5, par); |
577 | vga_out8 (0x3d4, 0x40, par); | 577 | vga_out8(0x3d4, 0x40, par); |
578 | reg->CR40 = vga_in8 (0x3d5, par); | 578 | reg->CR40 = vga_in8(0x3d5, par); |
579 | vga_out8 (0x3d4, 0x42, par); | 579 | vga_out8(0x3d4, 0x42, par); |
580 | reg->CR42 = vga_in8 (0x3d5, par); | 580 | reg->CR42 = vga_in8(0x3d5, par); |
581 | vga_out8 (0x3d4, 0x45, par); | 581 | vga_out8(0x3d4, 0x45, par); |
582 | reg->CR45 = vga_in8 (0x3d5, par); | 582 | reg->CR45 = vga_in8(0x3d5, par); |
583 | vga_out8 (0x3d4, 0x50, par); | 583 | vga_out8(0x3d4, 0x50, par); |
584 | reg->CR50 = vga_in8 (0x3d5, par); | 584 | reg->CR50 = vga_in8(0x3d5, par); |
585 | vga_out8 (0x3d4, 0x51, par); | 585 | vga_out8(0x3d4, 0x51, par); |
586 | reg->CR51 = vga_in8 (0x3d5, par); | 586 | reg->CR51 = vga_in8(0x3d5, par); |
587 | vga_out8 (0x3d4, 0x53, par); | 587 | vga_out8(0x3d4, 0x53, par); |
588 | reg->CR53 = vga_in8 (0x3d5, par); | 588 | reg->CR53 = vga_in8(0x3d5, par); |
589 | vga_out8 (0x3d4, 0x58, par); | 589 | vga_out8(0x3d4, 0x58, par); |
590 | reg->CR58 = vga_in8 (0x3d5, par); | 590 | reg->CR58 = vga_in8(0x3d5, par); |
591 | vga_out8 (0x3d4, 0x60, par); | 591 | vga_out8(0x3d4, 0x60, par); |
592 | reg->CR60 = vga_in8 (0x3d5, par); | 592 | reg->CR60 = vga_in8(0x3d5, par); |
593 | vga_out8 (0x3d4, 0x66, par); | 593 | vga_out8(0x3d4, 0x66, par); |
594 | reg->CR66 = vga_in8 (0x3d5, par); | 594 | reg->CR66 = vga_in8(0x3d5, par); |
595 | vga_out8 (0x3d4, 0x67, par); | 595 | vga_out8(0x3d4, 0x67, par); |
596 | reg->CR67 = vga_in8 (0x3d5, par); | 596 | reg->CR67 = vga_in8(0x3d5, par); |
597 | vga_out8 (0x3d4, 0x68, par); | 597 | vga_out8(0x3d4, 0x68, par); |
598 | reg->CR68 = vga_in8 (0x3d5, par); | 598 | reg->CR68 = vga_in8(0x3d5, par); |
599 | vga_out8 (0x3d4, 0x69, par); | 599 | vga_out8(0x3d4, 0x69, par); |
600 | reg->CR69 = vga_in8 (0x3d5, par); | 600 | reg->CR69 = vga_in8(0x3d5, par); |
601 | vga_out8 (0x3d4, 0x6f, par); | 601 | vga_out8(0x3d4, 0x6f, par); |
602 | reg->CR6F = vga_in8 (0x3d5, par); | 602 | reg->CR6F = vga_in8(0x3d5, par); |
603 | 603 | ||
604 | vga_out8 (0x3d4, 0x33, par); | 604 | vga_out8(0x3d4, 0x33, par); |
605 | reg->CR33 = vga_in8 (0x3d5, par); | 605 | reg->CR33 = vga_in8(0x3d5, par); |
606 | vga_out8 (0x3d4, 0x86, par); | 606 | vga_out8(0x3d4, 0x86, par); |
607 | reg->CR86 = vga_in8 (0x3d5, par); | 607 | reg->CR86 = vga_in8(0x3d5, par); |
608 | vga_out8 (0x3d4, 0x88, par); | 608 | vga_out8(0x3d4, 0x88, par); |
609 | reg->CR88 = vga_in8 (0x3d5, par); | 609 | reg->CR88 = vga_in8(0x3d5, par); |
610 | vga_out8 (0x3d4, 0x90, par); | 610 | vga_out8(0x3d4, 0x90, par); |
611 | reg->CR90 = vga_in8 (0x3d5, par); | 611 | reg->CR90 = vga_in8(0x3d5, par); |
612 | vga_out8 (0x3d4, 0x91, par); | 612 | vga_out8(0x3d4, 0x91, par); |
613 | reg->CR91 = vga_in8 (0x3d5, par); | 613 | reg->CR91 = vga_in8(0x3d5, par); |
614 | vga_out8 (0x3d4, 0xb0, par); | 614 | vga_out8(0x3d4, 0xb0, par); |
615 | reg->CRB0 = vga_in8 (0x3d5, par) | 0x80; | 615 | reg->CRB0 = vga_in8(0x3d5, par) | 0x80; |
616 | 616 | ||
617 | /* extended mode timing regs */ | 617 | /* extended mode timing regs */ |
618 | vga_out8 (0x3d4, 0x3b, par); | 618 | vga_out8(0x3d4, 0x3b, par); |
619 | reg->CR3B = vga_in8 (0x3d5, par); | 619 | reg->CR3B = vga_in8(0x3d5, par); |
620 | vga_out8 (0x3d4, 0x3c, par); | 620 | vga_out8(0x3d4, 0x3c, par); |
621 | reg->CR3C = vga_in8 (0x3d5, par); | 621 | reg->CR3C = vga_in8(0x3d5, par); |
622 | vga_out8 (0x3d4, 0x43, par); | 622 | vga_out8(0x3d4, 0x43, par); |
623 | reg->CR43 = vga_in8 (0x3d5, par); | 623 | reg->CR43 = vga_in8(0x3d5, par); |
624 | vga_out8 (0x3d4, 0x5d, par); | 624 | vga_out8(0x3d4, 0x5d, par); |
625 | reg->CR5D = vga_in8 (0x3d5, par); | 625 | reg->CR5D = vga_in8(0x3d5, par); |
626 | vga_out8 (0x3d4, 0x5e, par); | 626 | vga_out8(0x3d4, 0x5e, par); |
627 | reg->CR5E = vga_in8 (0x3d5, par); | 627 | reg->CR5E = vga_in8(0x3d5, par); |
628 | vga_out8 (0x3d4, 0x65, par); | 628 | vga_out8(0x3d4, 0x65, par); |
629 | reg->CR65 = vga_in8 (0x3d5, par); | 629 | reg->CR65 = vga_in8(0x3d5, par); |
630 | 630 | ||
631 | /* save seq extended regs for DCLK PLL programming */ | 631 | /* save seq extended regs for DCLK PLL programming */ |
632 | vga_out8 (0x3c4, 0x0e, par); | 632 | vga_out8(0x3c4, 0x0e, par); |
633 | reg->SR0E = vga_in8 (0x3c5, par); | 633 | reg->SR0E = vga_in8(0x3c5, par); |
634 | vga_out8 (0x3c4, 0x0f, par); | 634 | vga_out8(0x3c4, 0x0f, par); |
635 | reg->SR0F = vga_in8 (0x3c5, par); | 635 | reg->SR0F = vga_in8(0x3c5, par); |
636 | vga_out8 (0x3c4, 0x10, par); | 636 | vga_out8(0x3c4, 0x10, par); |
637 | reg->SR10 = vga_in8 (0x3c5, par); | 637 | reg->SR10 = vga_in8(0x3c5, par); |
638 | vga_out8 (0x3c4, 0x11, par); | 638 | vga_out8(0x3c4, 0x11, par); |
639 | reg->SR11 = vga_in8 (0x3c5, par); | 639 | reg->SR11 = vga_in8(0x3c5, par); |
640 | vga_out8 (0x3c4, 0x12, par); | 640 | vga_out8(0x3c4, 0x12, par); |
641 | reg->SR12 = vga_in8 (0x3c5, par); | 641 | reg->SR12 = vga_in8(0x3c5, par); |
642 | vga_out8 (0x3c4, 0x13, par); | 642 | vga_out8(0x3c4, 0x13, par); |
643 | reg->SR13 = vga_in8 (0x3c5, par); | 643 | reg->SR13 = vga_in8(0x3c5, par); |
644 | vga_out8 (0x3c4, 0x29, par); | 644 | vga_out8(0x3c4, 0x29, par); |
645 | reg->SR29 = vga_in8 (0x3c5, par); | 645 | reg->SR29 = vga_in8(0x3c5, par); |
646 | 646 | ||
647 | vga_out8 (0x3c4, 0x15, par); | 647 | vga_out8(0x3c4, 0x15, par); |
648 | reg->SR15 = vga_in8 (0x3c5, par); | 648 | reg->SR15 = vga_in8(0x3c5, par); |
649 | vga_out8 (0x3c4, 0x30, par); | 649 | vga_out8(0x3c4, 0x30, par); |
650 | reg->SR30 = vga_in8 (0x3c5, par); | 650 | reg->SR30 = vga_in8(0x3c5, par); |
651 | vga_out8 (0x3c4, 0x18, par); | 651 | vga_out8(0x3c4, 0x18, par); |
652 | reg->SR18 = vga_in8 (0x3c5, par); | 652 | reg->SR18 = vga_in8(0x3c5, par); |
653 | 653 | ||
654 | /* Save flat panel expansion regsters. */ | 654 | /* Save flat panel expansion regsters. */ |
655 | if (par->chip == S3_SAVAGE_MX) { | 655 | if (par->chip == S3_SAVAGE_MX) { |
656 | int i; | 656 | int i; |
657 | 657 | ||
658 | for (i = 0; i < 8; i++) { | 658 | for (i = 0; i < 8; i++) { |
659 | vga_out8 (0x3c4, 0x54+i, par); | 659 | vga_out8(0x3c4, 0x54+i, par); |
660 | reg->SR54[i] = vga_in8 (0x3c5, par); | 660 | reg->SR54[i] = vga_in8(0x3c5, par); |
661 | } | 661 | } |
662 | } | 662 | } |
663 | 663 | ||
664 | vga_out8 (0x3d4, 0x66, par); | 664 | vga_out8(0x3d4, 0x66, par); |
665 | cr66 = vga_in8 (0x3d5, par); | 665 | cr66 = vga_in8(0x3d5, par); |
666 | vga_out8 (0x3d5, cr66 | 0x80, par); | 666 | vga_out8(0x3d5, cr66 | 0x80, par); |
667 | vga_out8 (0x3d4, 0x3a, par); | 667 | vga_out8(0x3d4, 0x3a, par); |
668 | cr3a = vga_in8 (0x3d5, par); | 668 | cr3a = vga_in8(0x3d5, par); |
669 | vga_out8 (0x3d5, cr3a | 0x80, par); | 669 | vga_out8(0x3d5, cr3a | 0x80, par); |
670 | 670 | ||
671 | /* now save MIU regs */ | 671 | /* now save MIU regs */ |
672 | if (par->chip != S3_SAVAGE_MX) { | 672 | if (par->chip != S3_SAVAGE_MX) { |
@@ -676,10 +676,10 @@ static void savage_get_default_par(struct savagefb_par *par, struct savage_reg * | |||
676 | reg->MMPR3 = savage_in32(MISC_TIMEOUT_REG, par); | 676 | reg->MMPR3 = savage_in32(MISC_TIMEOUT_REG, par); |
677 | } | 677 | } |
678 | 678 | ||
679 | vga_out8 (0x3d4, 0x3a, par); | 679 | vga_out8(0x3d4, 0x3a, par); |
680 | vga_out8 (0x3d5, cr3a, par); | 680 | vga_out8(0x3d5, cr3a, par); |
681 | vga_out8 (0x3d4, 0x66, par); | 681 | vga_out8(0x3d4, 0x66, par); |
682 | vga_out8 (0x3d5, cr66, par); | 682 | vga_out8(0x3d5, cr66, par); |
683 | } | 683 | } |
684 | 684 | ||
685 | static void savage_set_default_par(struct savagefb_par *par, | 685 | static void savage_set_default_par(struct savagefb_par *par, |
@@ -853,8 +853,8 @@ static void savage_update_var(struct fb_var_screeninfo *var, struct fb_videomode | |||
853 | var->vmode = modedb->vmode; | 853 | var->vmode = modedb->vmode; |
854 | } | 854 | } |
855 | 855 | ||
856 | static int savagefb_check_var (struct fb_var_screeninfo *var, | 856 | static int savagefb_check_var(struct fb_var_screeninfo *var, |
857 | struct fb_info *info) | 857 | struct fb_info *info) |
858 | { | 858 | { |
859 | struct savagefb_par *par = info->par; | 859 | struct savagefb_par *par = info->par; |
860 | int memlen, vramlen, mode_valid = 0; | 860 | int memlen, vramlen, mode_valid = 0; |
@@ -920,10 +920,10 @@ static int savagefb_check_var (struct fb_var_screeninfo *var, | |||
920 | if (par->SavagePanelWidth && | 920 | if (par->SavagePanelWidth && |
921 | (var->xres > par->SavagePanelWidth || | 921 | (var->xres > par->SavagePanelWidth || |
922 | var->yres > par->SavagePanelHeight)) { | 922 | var->yres > par->SavagePanelHeight)) { |
923 | printk (KERN_INFO "Mode (%dx%d) larger than the LCD panel " | 923 | printk(KERN_INFO "Mode (%dx%d) larger than the LCD panel " |
924 | "(%dx%d)\n", var->xres, var->yres, | 924 | "(%dx%d)\n", var->xres, var->yres, |
925 | par->SavagePanelWidth, | 925 | par->SavagePanelWidth, |
926 | par->SavagePanelHeight); | 926 | par->SavagePanelHeight); |
927 | return -1; | 927 | return -1; |
928 | } | 928 | } |
929 | 929 | ||
@@ -958,9 +958,9 @@ static int savagefb_check_var (struct fb_var_screeninfo *var, | |||
958 | } | 958 | } |
959 | 959 | ||
960 | 960 | ||
961 | static int savagefb_decode_var (struct fb_var_screeninfo *var, | 961 | static int savagefb_decode_var(struct fb_var_screeninfo *var, |
962 | struct savagefb_par *par, | 962 | struct savagefb_par *par, |
963 | struct savage_reg *reg) | 963 | struct savage_reg *reg) |
964 | { | 964 | { |
965 | struct xtimings timings; | 965 | struct xtimings timings; |
966 | int width, dclk, i, j; /*, refresh; */ | 966 | int width, dclk, i, j; /*, refresh; */ |
@@ -970,7 +970,7 @@ static int savagefb_decode_var (struct fb_var_screeninfo *var, | |||
970 | 970 | ||
971 | DBG("savagefb_decode_var"); | 971 | DBG("savagefb_decode_var"); |
972 | 972 | ||
973 | memset (&timings, 0, sizeof(timings)); | 973 | memset(&timings, 0, sizeof(timings)); |
974 | 974 | ||
975 | if (!pixclock) pixclock = 10000; /* 10ns = 100MHz */ | 975 | if (!pixclock) pixclock = 10000; /* 10ns = 100MHz */ |
976 | timings.Clock = 1000000000 / pixclock; | 976 | timings.Clock = 1000000000 / pixclock; |
@@ -1002,30 +1002,30 @@ static int savagefb_decode_var (struct fb_var_screeninfo *var, | |||
1002 | * This will allocate the datastructure and initialize all of the | 1002 | * This will allocate the datastructure and initialize all of the |
1003 | * generic VGA registers. | 1003 | * generic VGA registers. |
1004 | */ | 1004 | */ |
1005 | vgaHWInit (var, par, &timings, reg); | 1005 | vgaHWInit(var, par, &timings, reg); |
1006 | 1006 | ||
1007 | /* We need to set CR67 whether or not we use the BIOS. */ | 1007 | /* We need to set CR67 whether or not we use the BIOS. */ |
1008 | 1008 | ||
1009 | dclk = timings.Clock; | 1009 | dclk = timings.Clock; |
1010 | reg->CR67 = 0x00; | 1010 | reg->CR67 = 0x00; |
1011 | 1011 | ||
1012 | switch( var->bits_per_pixel ) { | 1012 | switch(var->bits_per_pixel) { |
1013 | case 8: | 1013 | case 8: |
1014 | if( (par->chip == S3_SAVAGE2000) && (dclk >= 230000) ) | 1014 | if ((par->chip == S3_SAVAGE2000) && (dclk >= 230000)) |
1015 | reg->CR67 = 0x10; /* 8bpp, 2 pixels/clock */ | 1015 | reg->CR67 = 0x10; /* 8bpp, 2 pixels/clock */ |
1016 | else | 1016 | else |
1017 | reg->CR67 = 0x00; /* 8bpp, 1 pixel/clock */ | 1017 | reg->CR67 = 0x00; /* 8bpp, 1 pixel/clock */ |
1018 | break; | 1018 | break; |
1019 | case 15: | 1019 | case 15: |
1020 | if ( S3_SAVAGE_MOBILE_SERIES(par->chip) || | 1020 | if (S3_SAVAGE_MOBILE_SERIES(par->chip) || |
1021 | ((par->chip == S3_SAVAGE2000) && (dclk >= 230000)) ) | 1021 | ((par->chip == S3_SAVAGE2000) && (dclk >= 230000))) |
1022 | reg->CR67 = 0x30; /* 15bpp, 2 pixel/clock */ | 1022 | reg->CR67 = 0x30; /* 15bpp, 2 pixel/clock */ |
1023 | else | 1023 | else |
1024 | reg->CR67 = 0x20; /* 15bpp, 1 pixels/clock */ | 1024 | reg->CR67 = 0x20; /* 15bpp, 1 pixels/clock */ |
1025 | break; | 1025 | break; |
1026 | case 16: | 1026 | case 16: |
1027 | if( S3_SAVAGE_MOBILE_SERIES(par->chip) || | 1027 | if (S3_SAVAGE_MOBILE_SERIES(par->chip) || |
1028 | ((par->chip == S3_SAVAGE2000) && (dclk >= 230000)) ) | 1028 | ((par->chip == S3_SAVAGE2000) && (dclk >= 230000))) |
1029 | reg->CR67 = 0x50; /* 16bpp, 2 pixel/clock */ | 1029 | reg->CR67 = 0x50; /* 16bpp, 2 pixel/clock */ |
1030 | else | 1030 | else |
1031 | reg->CR67 = 0x40; /* 16bpp, 1 pixels/clock */ | 1031 | reg->CR67 = 0x40; /* 16bpp, 1 pixels/clock */ |
@@ -1043,8 +1043,8 @@ static int savagefb_decode_var (struct fb_var_screeninfo *var, | |||
1043 | * match. Fall back to traditional register-crunching. | 1043 | * match. Fall back to traditional register-crunching. |
1044 | */ | 1044 | */ |
1045 | 1045 | ||
1046 | vga_out8 (0x3d4, 0x3a, par); | 1046 | vga_out8(0x3d4, 0x3a, par); |
1047 | tmp = vga_in8 (0x3d5, par); | 1047 | tmp = vga_in8(0x3d5, par); |
1048 | if (1 /*FIXME:psav->pci_burst*/) | 1048 | if (1 /*FIXME:psav->pci_burst*/) |
1049 | reg->CR3A = (tmp & 0x7f) | 0x15; | 1049 | reg->CR3A = (tmp & 0x7f) | 0x15; |
1050 | else | 1050 | else |
@@ -1054,30 +1054,30 @@ static int savagefb_decode_var (struct fb_var_screeninfo *var, | |||
1054 | reg->CR31 = 0x8c; | 1054 | reg->CR31 = 0x8c; |
1055 | reg->CR66 = 0x89; | 1055 | reg->CR66 = 0x89; |
1056 | 1056 | ||
1057 | vga_out8 (0x3d4, 0x58, par); | 1057 | vga_out8(0x3d4, 0x58, par); |
1058 | reg->CR58 = vga_in8 (0x3d5, par) & 0x80; | 1058 | reg->CR58 = vga_in8(0x3d5, par) & 0x80; |
1059 | reg->CR58 |= 0x13; | 1059 | reg->CR58 |= 0x13; |
1060 | 1060 | ||
1061 | reg->SR15 = 0x03 | 0x80; | 1061 | reg->SR15 = 0x03 | 0x80; |
1062 | reg->SR18 = 0x00; | 1062 | reg->SR18 = 0x00; |
1063 | reg->CR43 = reg->CR45 = reg->CR65 = 0x00; | 1063 | reg->CR43 = reg->CR45 = reg->CR65 = 0x00; |
1064 | 1064 | ||
1065 | vga_out8 (0x3d4, 0x40, par); | 1065 | vga_out8(0x3d4, 0x40, par); |
1066 | reg->CR40 = vga_in8 (0x3d5, par) & ~0x01; | 1066 | reg->CR40 = vga_in8(0x3d5, par) & ~0x01; |
1067 | 1067 | ||
1068 | reg->MMPR0 = 0x010400; | 1068 | reg->MMPR0 = 0x010400; |
1069 | reg->MMPR1 = 0x00; | 1069 | reg->MMPR1 = 0x00; |
1070 | reg->MMPR2 = 0x0808; | 1070 | reg->MMPR2 = 0x0808; |
1071 | reg->MMPR3 = 0x08080810; | 1071 | reg->MMPR3 = 0x08080810; |
1072 | 1072 | ||
1073 | SavageCalcClock (dclk, 1, 1, 127, 0, 4, 180000, 360000, &m, &n, &r); | 1073 | SavageCalcClock(dclk, 1, 1, 127, 0, 4, 180000, 360000, &m, &n, &r); |
1074 | /* m = 107; n = 4; r = 2; */ | 1074 | /* m = 107; n = 4; r = 2; */ |
1075 | 1075 | ||
1076 | if (par->MCLK <= 0) { | 1076 | if (par->MCLK <= 0) { |
1077 | reg->SR10 = 255; | 1077 | reg->SR10 = 255; |
1078 | reg->SR11 = 255; | 1078 | reg->SR11 = 255; |
1079 | } else { | 1079 | } else { |
1080 | common_calc_clock (par->MCLK, 1, 1, 31, 0, 3, 135000, 270000, | 1080 | common_calc_clock(par->MCLK, 1, 1, 31, 0, 3, 135000, 270000, |
1081 | ®->SR11, ®->SR10); | 1081 | ®->SR11, ®->SR10); |
1082 | /* reg->SR10 = 80; // MCLK == 286000 */ | 1082 | /* reg->SR10 = 80; // MCLK == 286000 */ |
1083 | /* reg->SR11 = 125; */ | 1083 | /* reg->SR11 = 125; */ |
@@ -1158,7 +1158,7 @@ static int savagefb_decode_var (struct fb_var_screeninfo *var, | |||
1158 | else | 1158 | else |
1159 | reg->CR50 |= 0xc1; /* Use GBD */ | 1159 | reg->CR50 |= 0xc1; /* Use GBD */ |
1160 | 1160 | ||
1161 | if( par->chip == S3_SAVAGE2000 ) | 1161 | if (par->chip == S3_SAVAGE2000) |
1162 | reg->CR33 = 0x08; | 1162 | reg->CR33 = 0x08; |
1163 | else | 1163 | else |
1164 | reg->CR33 = 0x20; | 1164 | reg->CR33 = 0x20; |
@@ -1168,18 +1168,18 @@ static int savagefb_decode_var (struct fb_var_screeninfo *var, | |||
1168 | reg->CR67 |= 1; | 1168 | reg->CR67 |= 1; |
1169 | 1169 | ||
1170 | vga_out8(0x3d4, 0x36, par); | 1170 | vga_out8(0x3d4, 0x36, par); |
1171 | reg->CR36 = vga_in8 (0x3d5, par); | 1171 | reg->CR36 = vga_in8(0x3d5, par); |
1172 | vga_out8 (0x3d4, 0x68, par); | 1172 | vga_out8(0x3d4, 0x68, par); |
1173 | reg->CR68 = vga_in8 (0x3d5, par); | 1173 | reg->CR68 = vga_in8(0x3d5, par); |
1174 | reg->CR69 = 0; | 1174 | reg->CR69 = 0; |
1175 | vga_out8 (0x3d4, 0x6f, par); | 1175 | vga_out8(0x3d4, 0x6f, par); |
1176 | reg->CR6F = vga_in8 (0x3d5, par); | 1176 | reg->CR6F = vga_in8(0x3d5, par); |
1177 | vga_out8 (0x3d4, 0x86, par); | 1177 | vga_out8(0x3d4, 0x86, par); |
1178 | reg->CR86 = vga_in8 (0x3d5, par); | 1178 | reg->CR86 = vga_in8(0x3d5, par); |
1179 | vga_out8 (0x3d4, 0x88, par); | 1179 | vga_out8(0x3d4, 0x88, par); |
1180 | reg->CR88 = vga_in8 (0x3d5, par) | 0x08; | 1180 | reg->CR88 = vga_in8(0x3d5, par) | 0x08; |
1181 | vga_out8 (0x3d4, 0xb0, par); | 1181 | vga_out8(0x3d4, 0xb0, par); |
1182 | reg->CRB0 = vga_in8 (0x3d5, par) | 0x80; | 1182 | reg->CRB0 = vga_in8(0x3d5, par) | 0x80; |
1183 | 1183 | ||
1184 | return 0; | 1184 | return 0; |
1185 | } | 1185 | } |
@@ -1208,11 +1208,11 @@ static int savagefb_setcolreg(unsigned regno, | |||
1208 | 1208 | ||
1209 | switch (info->var.bits_per_pixel) { | 1209 | switch (info->var.bits_per_pixel) { |
1210 | case 8: | 1210 | case 8: |
1211 | vga_out8 (0x3c8, regno, par); | 1211 | vga_out8(0x3c8, regno, par); |
1212 | 1212 | ||
1213 | vga_out8 (0x3c9, red >> 10, par); | 1213 | vga_out8(0x3c9, red >> 10, par); |
1214 | vga_out8 (0x3c9, green >> 10, par); | 1214 | vga_out8(0x3c9, green >> 10, par); |
1215 | vga_out8 (0x3c9, blue >> 10, par); | 1215 | vga_out8(0x3c9, blue >> 10, par); |
1216 | break; | 1216 | break; |
1217 | 1217 | ||
1218 | case 16: | 1218 | case 16: |
@@ -1246,21 +1246,21 @@ static int savagefb_setcolreg(unsigned regno, | |||
1246 | return 0; | 1246 | return 0; |
1247 | } | 1247 | } |
1248 | 1248 | ||
1249 | static void savagefb_set_par_int (struct savagefb_par *par, struct savage_reg *reg) | 1249 | static void savagefb_set_par_int(struct savagefb_par *par, struct savage_reg *reg) |
1250 | { | 1250 | { |
1251 | unsigned char tmp, cr3a, cr66, cr67; | 1251 | unsigned char tmp, cr3a, cr66, cr67; |
1252 | 1252 | ||
1253 | DBG ("savagefb_set_par_int"); | 1253 | DBG("savagefb_set_par_int"); |
1254 | 1254 | ||
1255 | par->SavageWaitIdle (par); | 1255 | par->SavageWaitIdle(par); |
1256 | 1256 | ||
1257 | vga_out8 (0x3c2, 0x23, par); | 1257 | vga_out8(0x3c2, 0x23, par); |
1258 | 1258 | ||
1259 | vga_out16 (0x3d4, 0x4838, par); | 1259 | vga_out16(0x3d4, 0x4838, par); |
1260 | vga_out16 (0x3d4, 0xa539, par); | 1260 | vga_out16(0x3d4, 0xa539, par); |
1261 | vga_out16 (0x3c4, 0x0608, par); | 1261 | vga_out16(0x3c4, 0x0608, par); |
1262 | 1262 | ||
1263 | vgaHWProtect (par, 1); | 1263 | vgaHWProtect(par, 1); |
1264 | 1264 | ||
1265 | /* | 1265 | /* |
1266 | * Some Savage/MX and /IX systems go nuts when trying to exit the | 1266 | * Some Savage/MX and /IX systems go nuts when trying to exit the |
@@ -1270,203 +1270,202 @@ static void savagefb_set_par_int (struct savagefb_par *par, struct savage_reg * | |||
1270 | */ | 1270 | */ |
1271 | 1271 | ||
1272 | VerticalRetraceWait(par); | 1272 | VerticalRetraceWait(par); |
1273 | vga_out8 (0x3d4, 0x67, par); | 1273 | vga_out8(0x3d4, 0x67, par); |
1274 | cr67 = vga_in8 (0x3d5, par); | 1274 | cr67 = vga_in8(0x3d5, par); |
1275 | vga_out8 (0x3d5, cr67/*par->CR67*/ & ~0x0c, par); /* no STREAMS yet */ | 1275 | vga_out8(0x3d5, cr67/*par->CR67*/ & ~0x0c, par); /* no STREAMS yet */ |
1276 | 1276 | ||
1277 | vga_out8 (0x3d4, 0x23, par); | 1277 | vga_out8(0x3d4, 0x23, par); |
1278 | vga_out8 (0x3d5, 0x00, par); | 1278 | vga_out8(0x3d5, 0x00, par); |
1279 | vga_out8 (0x3d4, 0x26, par); | 1279 | vga_out8(0x3d4, 0x26, par); |
1280 | vga_out8 (0x3d5, 0x00, par); | 1280 | vga_out8(0x3d5, 0x00, par); |
1281 | 1281 | ||
1282 | /* restore extended regs */ | 1282 | /* restore extended regs */ |
1283 | vga_out8 (0x3d4, 0x66, par); | 1283 | vga_out8(0x3d4, 0x66, par); |
1284 | vga_out8 (0x3d5, reg->CR66, par); | 1284 | vga_out8(0x3d5, reg->CR66, par); |
1285 | vga_out8 (0x3d4, 0x3a, par); | 1285 | vga_out8(0x3d4, 0x3a, par); |
1286 | vga_out8 (0x3d5, reg->CR3A, par); | 1286 | vga_out8(0x3d5, reg->CR3A, par); |
1287 | vga_out8 (0x3d4, 0x31, par); | 1287 | vga_out8(0x3d4, 0x31, par); |
1288 | vga_out8 (0x3d5, reg->CR31, par); | 1288 | vga_out8(0x3d5, reg->CR31, par); |
1289 | vga_out8 (0x3d4, 0x32, par); | 1289 | vga_out8(0x3d4, 0x32, par); |
1290 | vga_out8 (0x3d5, reg->CR32, par); | 1290 | vga_out8(0x3d5, reg->CR32, par); |
1291 | vga_out8 (0x3d4, 0x58, par); | 1291 | vga_out8(0x3d4, 0x58, par); |
1292 | vga_out8 (0x3d5, reg->CR58, par); | 1292 | vga_out8(0x3d5, reg->CR58, par); |
1293 | vga_out8 (0x3d4, 0x53, par); | 1293 | vga_out8(0x3d4, 0x53, par); |
1294 | vga_out8 (0x3d5, reg->CR53 & 0x7f, par); | 1294 | vga_out8(0x3d5, reg->CR53 & 0x7f, par); |
1295 | 1295 | ||
1296 | vga_out16 (0x3c4, 0x0608, par); | 1296 | vga_out16(0x3c4, 0x0608, par); |
1297 | 1297 | ||
1298 | /* Restore DCLK registers. */ | 1298 | /* Restore DCLK registers. */ |
1299 | 1299 | ||
1300 | vga_out8 (0x3c4, 0x0e, par); | 1300 | vga_out8(0x3c4, 0x0e, par); |
1301 | vga_out8 (0x3c5, reg->SR0E, par); | 1301 | vga_out8(0x3c5, reg->SR0E, par); |
1302 | vga_out8 (0x3c4, 0x0f, par); | 1302 | vga_out8(0x3c4, 0x0f, par); |
1303 | vga_out8 (0x3c5, reg->SR0F, par); | 1303 | vga_out8(0x3c5, reg->SR0F, par); |
1304 | vga_out8 (0x3c4, 0x29, par); | 1304 | vga_out8(0x3c4, 0x29, par); |
1305 | vga_out8 (0x3c5, reg->SR29, par); | 1305 | vga_out8(0x3c5, reg->SR29, par); |
1306 | vga_out8 (0x3c4, 0x15, par); | 1306 | vga_out8(0x3c4, 0x15, par); |
1307 | vga_out8 (0x3c5, reg->SR15, par); | 1307 | vga_out8(0x3c5, reg->SR15, par); |
1308 | 1308 | ||
1309 | /* Restore flat panel expansion regsters. */ | 1309 | /* Restore flat panel expansion regsters. */ |
1310 | if( par->chip == S3_SAVAGE_MX ) { | 1310 | if (par->chip == S3_SAVAGE_MX) { |
1311 | int i; | 1311 | int i; |
1312 | 1312 | ||
1313 | for( i = 0; i < 8; i++ ) { | 1313 | for (i = 0; i < 8; i++) { |
1314 | vga_out8 (0x3c4, 0x54+i, par); | 1314 | vga_out8(0x3c4, 0x54+i, par); |
1315 | vga_out8 (0x3c5, reg->SR54[i], par); | 1315 | vga_out8(0x3c5, reg->SR54[i], par); |
1316 | } | 1316 | } |
1317 | } | 1317 | } |
1318 | 1318 | ||
1319 | vgaHWRestore (par, reg); | 1319 | vgaHWRestore (par, reg); |
1320 | 1320 | ||
1321 | /* extended mode timing registers */ | 1321 | /* extended mode timing registers */ |
1322 | vga_out8 (0x3d4, 0x53, par); | 1322 | vga_out8(0x3d4, 0x53, par); |
1323 | vga_out8 (0x3d5, reg->CR53, par); | 1323 | vga_out8(0x3d5, reg->CR53, par); |
1324 | vga_out8 (0x3d4, 0x5d, par); | 1324 | vga_out8(0x3d4, 0x5d, par); |
1325 | vga_out8 (0x3d5, reg->CR5D, par); | 1325 | vga_out8(0x3d5, reg->CR5D, par); |
1326 | vga_out8 (0x3d4, 0x5e, par); | 1326 | vga_out8(0x3d4, 0x5e, par); |
1327 | vga_out8 (0x3d5, reg->CR5E, par); | 1327 | vga_out8(0x3d5, reg->CR5E, par); |
1328 | vga_out8 (0x3d4, 0x3b, par); | 1328 | vga_out8(0x3d4, 0x3b, par); |
1329 | vga_out8 (0x3d5, reg->CR3B, par); | 1329 | vga_out8(0x3d5, reg->CR3B, par); |
1330 | vga_out8 (0x3d4, 0x3c, par); | 1330 | vga_out8(0x3d4, 0x3c, par); |
1331 | vga_out8 (0x3d5, reg->CR3C, par); | 1331 | vga_out8(0x3d5, reg->CR3C, par); |
1332 | vga_out8 (0x3d4, 0x43, par); | 1332 | vga_out8(0x3d4, 0x43, par); |
1333 | vga_out8 (0x3d5, reg->CR43, par); | 1333 | vga_out8(0x3d5, reg->CR43, par); |
1334 | vga_out8 (0x3d4, 0x65, par); | 1334 | vga_out8(0x3d4, 0x65, par); |
1335 | vga_out8 (0x3d5, reg->CR65, par); | 1335 | vga_out8(0x3d5, reg->CR65, par); |
1336 | 1336 | ||
1337 | /* restore the desired video mode with cr67 */ | 1337 | /* restore the desired video mode with cr67 */ |
1338 | vga_out8 (0x3d4, 0x67, par); | 1338 | vga_out8(0x3d4, 0x67, par); |
1339 | /* following part not present in X11 driver */ | 1339 | /* following part not present in X11 driver */ |
1340 | cr67 = vga_in8 (0x3d5, par) & 0xf; | 1340 | cr67 = vga_in8(0x3d5, par) & 0xf; |
1341 | vga_out8 (0x3d5, 0x50 | cr67, par); | 1341 | vga_out8(0x3d5, 0x50 | cr67, par); |
1342 | udelay (10000); | 1342 | udelay(10000); |
1343 | vga_out8 (0x3d4, 0x67, par); | 1343 | vga_out8(0x3d4, 0x67, par); |
1344 | /* end of part */ | 1344 | /* end of part */ |
1345 | vga_out8 (0x3d5, reg->CR67 & ~0x0c, par); | 1345 | vga_out8(0x3d5, reg->CR67 & ~0x0c, par); |
1346 | 1346 | ||
1347 | /* other mode timing and extended regs */ | 1347 | /* other mode timing and extended regs */ |
1348 | vga_out8 (0x3d4, 0x34, par); | 1348 | vga_out8(0x3d4, 0x34, par); |
1349 | vga_out8 (0x3d5, reg->CR34, par); | 1349 | vga_out8(0x3d5, reg->CR34, par); |
1350 | vga_out8 (0x3d4, 0x40, par); | 1350 | vga_out8(0x3d4, 0x40, par); |
1351 | vga_out8 (0x3d5, reg->CR40, par); | 1351 | vga_out8(0x3d5, reg->CR40, par); |
1352 | vga_out8 (0x3d4, 0x42, par); | 1352 | vga_out8(0x3d4, 0x42, par); |
1353 | vga_out8 (0x3d5, reg->CR42, par); | 1353 | vga_out8(0x3d5, reg->CR42, par); |
1354 | vga_out8 (0x3d4, 0x45, par); | 1354 | vga_out8(0x3d4, 0x45, par); |
1355 | vga_out8 (0x3d5, reg->CR45, par); | 1355 | vga_out8(0x3d5, reg->CR45, par); |
1356 | vga_out8 (0x3d4, 0x50, par); | 1356 | vga_out8(0x3d4, 0x50, par); |
1357 | vga_out8 (0x3d5, reg->CR50, par); | 1357 | vga_out8(0x3d5, reg->CR50, par); |
1358 | vga_out8 (0x3d4, 0x51, par); | 1358 | vga_out8(0x3d4, 0x51, par); |
1359 | vga_out8 (0x3d5, reg->CR51, par); | 1359 | vga_out8(0x3d5, reg->CR51, par); |
1360 | 1360 | ||
1361 | /* memory timings */ | 1361 | /* memory timings */ |
1362 | vga_out8 (0x3d4, 0x36, par); | 1362 | vga_out8(0x3d4, 0x36, par); |
1363 | vga_out8 (0x3d5, reg->CR36, par); | 1363 | vga_out8(0x3d5, reg->CR36, par); |
1364 | vga_out8 (0x3d4, 0x60, par); | 1364 | vga_out8(0x3d4, 0x60, par); |
1365 | vga_out8 (0x3d5, reg->CR60, par); | 1365 | vga_out8(0x3d5, reg->CR60, par); |
1366 | vga_out8 (0x3d4, 0x68, par); | 1366 | vga_out8(0x3d4, 0x68, par); |
1367 | vga_out8 (0x3d5, reg->CR68, par); | 1367 | vga_out8(0x3d5, reg->CR68, par); |
1368 | vga_out8 (0x3d4, 0x69, par); | 1368 | vga_out8(0x3d4, 0x69, par); |
1369 | vga_out8 (0x3d5, reg->CR69, par); | 1369 | vga_out8(0x3d5, reg->CR69, par); |
1370 | vga_out8 (0x3d4, 0x6f, par); | 1370 | vga_out8(0x3d4, 0x6f, par); |
1371 | vga_out8 (0x3d5, reg->CR6F, par); | 1371 | vga_out8(0x3d5, reg->CR6F, par); |
1372 | 1372 | ||
1373 | vga_out8 (0x3d4, 0x33, par); | 1373 | vga_out8(0x3d4, 0x33, par); |
1374 | vga_out8 (0x3d5, reg->CR33, par); | 1374 | vga_out8(0x3d5, reg->CR33, par); |
1375 | vga_out8 (0x3d4, 0x86, par); | 1375 | vga_out8(0x3d4, 0x86, par); |
1376 | vga_out8 (0x3d5, reg->CR86, par); | 1376 | vga_out8(0x3d5, reg->CR86, par); |
1377 | vga_out8 (0x3d4, 0x88, par); | 1377 | vga_out8(0x3d4, 0x88, par); |
1378 | vga_out8 (0x3d5, reg->CR88, par); | 1378 | vga_out8(0x3d5, reg->CR88, par); |
1379 | vga_out8 (0x3d4, 0x90, par); | 1379 | vga_out8(0x3d4, 0x90, par); |
1380 | vga_out8 (0x3d5, reg->CR90, par); | 1380 | vga_out8(0x3d5, reg->CR90, par); |
1381 | vga_out8 (0x3d4, 0x91, par); | 1381 | vga_out8(0x3d4, 0x91, par); |
1382 | vga_out8 (0x3d5, reg->CR91, par); | 1382 | vga_out8(0x3d5, reg->CR91, par); |
1383 | 1383 | ||
1384 | if (par->chip == S3_SAVAGE4) { | 1384 | if (par->chip == S3_SAVAGE4) { |
1385 | vga_out8 (0x3d4, 0xb0, par); | 1385 | vga_out8(0x3d4, 0xb0, par); |
1386 | vga_out8 (0x3d5, reg->CRB0, par); | 1386 | vga_out8(0x3d5, reg->CRB0, par); |
1387 | } | 1387 | } |
1388 | 1388 | ||
1389 | vga_out8 (0x3d4, 0x32, par); | 1389 | vga_out8(0x3d4, 0x32, par); |
1390 | vga_out8 (0x3d5, reg->CR32, par); | 1390 | vga_out8(0x3d5, reg->CR32, par); |
1391 | 1391 | ||
1392 | /* unlock extended seq regs */ | 1392 | /* unlock extended seq regs */ |
1393 | vga_out8 (0x3c4, 0x08, par); | 1393 | vga_out8(0x3c4, 0x08, par); |
1394 | vga_out8 (0x3c5, 0x06, par); | 1394 | vga_out8(0x3c5, 0x06, par); |
1395 | 1395 | ||
1396 | /* Restore extended sequencer regs for MCLK. SR10 == 255 indicates | 1396 | /* Restore extended sequencer regs for MCLK. SR10 == 255 indicates |
1397 | * that we should leave the default SR10 and SR11 values there. | 1397 | * that we should leave the default SR10 and SR11 values there. |
1398 | */ | 1398 | */ |
1399 | if (reg->SR10 != 255) { | 1399 | if (reg->SR10 != 255) { |
1400 | vga_out8 (0x3c4, 0x10, par); | 1400 | vga_out8(0x3c4, 0x10, par); |
1401 | vga_out8 (0x3c5, reg->SR10, par); | 1401 | vga_out8(0x3c5, reg->SR10, par); |
1402 | vga_out8 (0x3c4, 0x11, par); | 1402 | vga_out8(0x3c4, 0x11, par); |
1403 | vga_out8 (0x3c5, reg->SR11, par); | 1403 | vga_out8(0x3c5, reg->SR11, par); |
1404 | } | 1404 | } |
1405 | 1405 | ||
1406 | /* restore extended seq regs for dclk */ | 1406 | /* restore extended seq regs for dclk */ |
1407 | vga_out8 (0x3c4, 0x0e, par); | 1407 | vga_out8(0x3c4, 0x0e, par); |
1408 | vga_out8 (0x3c5, reg->SR0E, par); | 1408 | vga_out8(0x3c5, reg->SR0E, par); |
1409 | vga_out8 (0x3c4, 0x0f, par); | 1409 | vga_out8(0x3c4, 0x0f, par); |
1410 | vga_out8 (0x3c5, reg->SR0F, par); | 1410 | vga_out8(0x3c5, reg->SR0F, par); |
1411 | vga_out8 (0x3c4, 0x12, par); | 1411 | vga_out8(0x3c4, 0x12, par); |
1412 | vga_out8 (0x3c5, reg->SR12, par); | 1412 | vga_out8(0x3c5, reg->SR12, par); |
1413 | vga_out8 (0x3c4, 0x13, par); | 1413 | vga_out8(0x3c4, 0x13, par); |
1414 | vga_out8 (0x3c5, reg->SR13, par); | 1414 | vga_out8(0x3c5, reg->SR13, par); |
1415 | vga_out8 (0x3c4, 0x29, par); | 1415 | vga_out8(0x3c4, 0x29, par); |
1416 | vga_out8 (0x3c5, reg->SR29, par); | 1416 | vga_out8(0x3c5, reg->SR29, par); |
1417 | 1417 | vga_out8(0x3c4, 0x18, par); | |
1418 | vga_out8 (0x3c4, 0x18, par); | 1418 | vga_out8(0x3c5, reg->SR18, par); |
1419 | vga_out8 (0x3c5, reg->SR18, par); | ||
1420 | 1419 | ||
1421 | /* load new m, n pll values for dclk & mclk */ | 1420 | /* load new m, n pll values for dclk & mclk */ |
1422 | vga_out8 (0x3c4, 0x15, par); | 1421 | vga_out8(0x3c4, 0x15, par); |
1423 | tmp = vga_in8 (0x3c5, par) & ~0x21; | 1422 | tmp = vga_in8(0x3c5, par) & ~0x21; |
1424 | 1423 | ||
1425 | vga_out8 (0x3c5, tmp | 0x03, par); | 1424 | vga_out8(0x3c5, tmp | 0x03, par); |
1426 | vga_out8 (0x3c5, tmp | 0x23, par); | 1425 | vga_out8(0x3c5, tmp | 0x23, par); |
1427 | vga_out8 (0x3c5, tmp | 0x03, par); | 1426 | vga_out8(0x3c5, tmp | 0x03, par); |
1428 | vga_out8 (0x3c5, reg->SR15, par); | 1427 | vga_out8(0x3c5, reg->SR15, par); |
1429 | udelay (100); | 1428 | udelay(100); |
1430 | 1429 | ||
1431 | vga_out8 (0x3c4, 0x30, par); | 1430 | vga_out8(0x3c4, 0x30, par); |
1432 | vga_out8 (0x3c5, reg->SR30, par); | 1431 | vga_out8(0x3c5, reg->SR30, par); |
1433 | vga_out8 (0x3c4, 0x08, par); | 1432 | vga_out8(0x3c4, 0x08, par); |
1434 | vga_out8 (0x3c5, reg->SR08, par); | 1433 | vga_out8(0x3c5, reg->SR08, par); |
1435 | 1434 | ||
1436 | /* now write out cr67 in full, possibly starting STREAMS */ | 1435 | /* now write out cr67 in full, possibly starting STREAMS */ |
1437 | VerticalRetraceWait(par); | 1436 | VerticalRetraceWait(par); |
1438 | vga_out8 (0x3d4, 0x67, par); | 1437 | vga_out8(0x3d4, 0x67, par); |
1439 | vga_out8 (0x3d5, reg->CR67, par); | 1438 | vga_out8(0x3d5, reg->CR67, par); |
1440 | 1439 | ||
1441 | vga_out8 (0x3d4, 0x66, par); | 1440 | vga_out8(0x3d4, 0x66, par); |
1442 | cr66 = vga_in8 (0x3d5, par); | 1441 | cr66 = vga_in8(0x3d5, par); |
1443 | vga_out8 (0x3d5, cr66 | 0x80, par); | 1442 | vga_out8(0x3d5, cr66 | 0x80, par); |
1444 | vga_out8 (0x3d4, 0x3a, par); | 1443 | vga_out8(0x3d4, 0x3a, par); |
1445 | cr3a = vga_in8 (0x3d5, par); | 1444 | cr3a = vga_in8(0x3d5, par); |
1446 | vga_out8 (0x3d5, cr3a | 0x80, par); | 1445 | vga_out8(0x3d5, cr3a | 0x80, par); |
1447 | 1446 | ||
1448 | if (par->chip != S3_SAVAGE_MX) { | 1447 | if (par->chip != S3_SAVAGE_MX) { |
1449 | VerticalRetraceWait(par); | 1448 | VerticalRetraceWait(par); |
1450 | savage_out32 (FIFO_CONTROL_REG, reg->MMPR0, par); | 1449 | savage_out32(FIFO_CONTROL_REG, reg->MMPR0, par); |
1451 | par->SavageWaitIdle (par); | 1450 | par->SavageWaitIdle(par); |
1452 | savage_out32 (MIU_CONTROL_REG, reg->MMPR1, par); | 1451 | savage_out32(MIU_CONTROL_REG, reg->MMPR1, par); |
1453 | par->SavageWaitIdle (par); | 1452 | par->SavageWaitIdle(par); |
1454 | savage_out32 (STREAMS_TIMEOUT_REG, reg->MMPR2, par); | 1453 | savage_out32(STREAMS_TIMEOUT_REG, reg->MMPR2, par); |
1455 | par->SavageWaitIdle (par); | 1454 | par->SavageWaitIdle(par); |
1456 | savage_out32 (MISC_TIMEOUT_REG, reg->MMPR3, par); | 1455 | savage_out32(MISC_TIMEOUT_REG, reg->MMPR3, par); |
1457 | } | 1456 | } |
1458 | 1457 | ||
1459 | vga_out8 (0x3d4, 0x66, par); | 1458 | vga_out8(0x3d4, 0x66, par); |
1460 | vga_out8 (0x3d5, cr66, par); | 1459 | vga_out8(0x3d5, cr66, par); |
1461 | vga_out8 (0x3d4, 0x3a, par); | 1460 | vga_out8(0x3d4, 0x3a, par); |
1462 | vga_out8 (0x3d5, cr3a, par); | 1461 | vga_out8(0x3d5, cr3a, par); |
1463 | 1462 | ||
1464 | SavageSetup2DEngine (par); | 1463 | SavageSetup2DEngine(par); |
1465 | vgaHWProtect (par, 0); | 1464 | vgaHWProtect(par, 0); |
1466 | } | 1465 | } |
1467 | 1466 | ||
1468 | static void savagefb_update_start (struct savagefb_par *par, | 1467 | static void savagefb_update_start(struct savagefb_par *par, |
1469 | struct fb_var_screeninfo *var) | 1468 | struct fb_var_screeninfo *var) |
1470 | { | 1469 | { |
1471 | int base; | 1470 | int base; |
1472 | 1471 | ||
@@ -1476,8 +1475,8 @@ static void savagefb_update_start (struct savagefb_par *par, | |||
1476 | /* now program the start address registers */ | 1475 | /* now program the start address registers */ |
1477 | vga_out16(0x3d4, (base & 0x00ff00) | 0x0c, par); | 1476 | vga_out16(0x3d4, (base & 0x00ff00) | 0x0c, par); |
1478 | vga_out16(0x3d4, ((base & 0x00ff) << 8) | 0x0d, par); | 1477 | vga_out16(0x3d4, ((base & 0x00ff) << 8) | 0x0d, par); |
1479 | vga_out8 (0x3d4, 0x69, par); | 1478 | vga_out8(0x3d4, 0x69, par); |
1480 | vga_out8 (0x3d5, (base & 0x7f0000) >> 16, par); | 1479 | vga_out8(0x3d5, (base & 0x7f0000) >> 16, par); |
1481 | } | 1480 | } |
1482 | 1481 | ||
1483 | 1482 | ||
@@ -1496,14 +1495,14 @@ static void savagefb_set_fix(struct fb_info *info) | |||
1496 | 1495 | ||
1497 | } | 1496 | } |
1498 | 1497 | ||
1499 | static int savagefb_set_par (struct fb_info *info) | 1498 | static int savagefb_set_par(struct fb_info *info) |
1500 | { | 1499 | { |
1501 | struct savagefb_par *par = info->par; | 1500 | struct savagefb_par *par = info->par; |
1502 | struct fb_var_screeninfo *var = &info->var; | 1501 | struct fb_var_screeninfo *var = &info->var; |
1503 | int err; | 1502 | int err; |
1504 | 1503 | ||
1505 | DBG("savagefb_set_par"); | 1504 | DBG("savagefb_set_par"); |
1506 | err = savagefb_decode_var (var, par, &par->state); | 1505 | err = savagefb_decode_var(var, par, &par->state); |
1507 | if (err) | 1506 | if (err) |
1508 | return err; | 1507 | return err; |
1509 | 1508 | ||
@@ -1522,8 +1521,8 @@ static int savagefb_set_par (struct fb_info *info) | |||
1522 | par->maxClock = par->dacSpeedBpp; | 1521 | par->maxClock = par->dacSpeedBpp; |
1523 | par->minClock = 10000; | 1522 | par->minClock = 10000; |
1524 | 1523 | ||
1525 | savagefb_set_par_int (par, &par->state); | 1524 | savagefb_set_par_int(par, &par->state); |
1526 | fb_set_cmap (&info->cmap, info); | 1525 | fb_set_cmap(&info->cmap, info); |
1527 | savagefb_set_fix(info); | 1526 | savagefb_set_fix(info); |
1528 | savagefb_set_clip(info); | 1527 | savagefb_set_clip(info); |
1529 | 1528 | ||
@@ -1534,12 +1533,12 @@ static int savagefb_set_par (struct fb_info *info) | |||
1534 | /* | 1533 | /* |
1535 | * Pan or Wrap the Display | 1534 | * Pan or Wrap the Display |
1536 | */ | 1535 | */ |
1537 | static int savagefb_pan_display (struct fb_var_screeninfo *var, | 1536 | static int savagefb_pan_display(struct fb_var_screeninfo *var, |
1538 | struct fb_info *info) | 1537 | struct fb_info *info) |
1539 | { | 1538 | { |
1540 | struct savagefb_par *par = info->par; | 1539 | struct savagefb_par *par = info->par; |
1541 | 1540 | ||
1542 | savagefb_update_start (par, var); | 1541 | savagefb_update_start(par, var); |
1543 | return 0; | 1542 | return 0; |
1544 | } | 1543 | } |
1545 | 1544 | ||
@@ -1653,59 +1652,59 @@ static struct fb_var_screeninfo __devinitdata savagefb_var800x600x8 = { | |||
1653 | .vmode = FB_VMODE_NONINTERLACED | 1652 | .vmode = FB_VMODE_NONINTERLACED |
1654 | }; | 1653 | }; |
1655 | 1654 | ||
1656 | static void savage_enable_mmio (struct savagefb_par *par) | 1655 | static void savage_enable_mmio(struct savagefb_par *par) |
1657 | { | 1656 | { |
1658 | unsigned char val; | 1657 | unsigned char val; |
1659 | 1658 | ||
1660 | DBG ("savage_enable_mmio\n"); | 1659 | DBG("savage_enable_mmio\n"); |
1661 | 1660 | ||
1662 | val = vga_in8 (0x3c3, par); | 1661 | val = vga_in8(0x3c3, par); |
1663 | vga_out8 (0x3c3, val | 0x01, par); | 1662 | vga_out8(0x3c3, val | 0x01, par); |
1664 | val = vga_in8 (0x3cc, par); | 1663 | val = vga_in8(0x3cc, par); |
1665 | vga_out8 (0x3c2, val | 0x01, par); | 1664 | vga_out8(0x3c2, val | 0x01, par); |
1666 | 1665 | ||
1667 | if (par->chip >= S3_SAVAGE4) { | 1666 | if (par->chip >= S3_SAVAGE4) { |
1668 | vga_out8 (0x3d4, 0x40, par); | 1667 | vga_out8(0x3d4, 0x40, par); |
1669 | val = vga_in8 (0x3d5, par); | 1668 | val = vga_in8(0x3d5, par); |
1670 | vga_out8 (0x3d5, val | 1, par); | 1669 | vga_out8(0x3d5, val | 1, par); |
1671 | } | 1670 | } |
1672 | } | 1671 | } |
1673 | 1672 | ||
1674 | 1673 | ||
1675 | static void savage_disable_mmio (struct savagefb_par *par) | 1674 | static void savage_disable_mmio(struct savagefb_par *par) |
1676 | { | 1675 | { |
1677 | unsigned char val; | 1676 | unsigned char val; |
1678 | 1677 | ||
1679 | DBG ("savage_disable_mmio\n"); | 1678 | DBG("savage_disable_mmio\n"); |
1680 | 1679 | ||
1681 | if(par->chip >= S3_SAVAGE4 ) { | 1680 | if (par->chip >= S3_SAVAGE4) { |
1682 | vga_out8 (0x3d4, 0x40, par); | 1681 | vga_out8(0x3d4, 0x40, par); |
1683 | val = vga_in8 (0x3d5, par); | 1682 | val = vga_in8(0x3d5, par); |
1684 | vga_out8 (0x3d5, val | 1, par); | 1683 | vga_out8(0x3d5, val | 1, par); |
1685 | } | 1684 | } |
1686 | } | 1685 | } |
1687 | 1686 | ||
1688 | 1687 | ||
1689 | static int __devinit savage_map_mmio (struct fb_info *info) | 1688 | static int __devinit savage_map_mmio(struct fb_info *info) |
1690 | { | 1689 | { |
1691 | struct savagefb_par *par = info->par; | 1690 | struct savagefb_par *par = info->par; |
1692 | DBG ("savage_map_mmio"); | 1691 | DBG("savage_map_mmio"); |
1693 | 1692 | ||
1694 | if (S3_SAVAGE3D_SERIES (par->chip)) | 1693 | if (S3_SAVAGE3D_SERIES(par->chip)) |
1695 | par->mmio.pbase = pci_resource_start (par->pcidev, 0) + | 1694 | par->mmio.pbase = pci_resource_start(par->pcidev, 0) + |
1696 | SAVAGE_NEWMMIO_REGBASE_S3; | 1695 | SAVAGE_NEWMMIO_REGBASE_S3; |
1697 | else | 1696 | else |
1698 | par->mmio.pbase = pci_resource_start (par->pcidev, 0) + | 1697 | par->mmio.pbase = pci_resource_start(par->pcidev, 0) + |
1699 | SAVAGE_NEWMMIO_REGBASE_S4; | 1698 | SAVAGE_NEWMMIO_REGBASE_S4; |
1700 | 1699 | ||
1701 | par->mmio.len = SAVAGE_NEWMMIO_REGSIZE; | 1700 | par->mmio.len = SAVAGE_NEWMMIO_REGSIZE; |
1702 | 1701 | ||
1703 | par->mmio.vbase = ioremap (par->mmio.pbase, par->mmio.len); | 1702 | par->mmio.vbase = ioremap(par->mmio.pbase, par->mmio.len); |
1704 | if (!par->mmio.vbase) { | 1703 | if (!par->mmio.vbase) { |
1705 | printk ("savagefb: unable to map memory mapped IO\n"); | 1704 | printk("savagefb: unable to map memory mapped IO\n"); |
1706 | return -ENOMEM; | 1705 | return -ENOMEM; |
1707 | } else | 1706 | } else |
1708 | printk (KERN_INFO "savagefb: mapped io at %p\n", | 1707 | printk(KERN_INFO "savagefb: mapped io at %p\n", |
1709 | par->mmio.vbase); | 1708 | par->mmio.vbase); |
1710 | 1709 | ||
1711 | info->fix.mmio_start = par->mmio.pbase; | 1710 | info->fix.mmio_start = par->mmio.pbase; |
@@ -1714,15 +1713,15 @@ static int __devinit savage_map_mmio (struct fb_info *info) | |||
1714 | par->bci_base = (u32 __iomem *)(par->mmio.vbase + BCI_BUFFER_OFFSET); | 1713 | par->bci_base = (u32 __iomem *)(par->mmio.vbase + BCI_BUFFER_OFFSET); |
1715 | par->bci_ptr = 0; | 1714 | par->bci_ptr = 0; |
1716 | 1715 | ||
1717 | savage_enable_mmio (par); | 1716 | savage_enable_mmio(par); |
1718 | 1717 | ||
1719 | return 0; | 1718 | return 0; |
1720 | } | 1719 | } |
1721 | 1720 | ||
1722 | static void savage_unmap_mmio (struct fb_info *info) | 1721 | static void savage_unmap_mmio(struct fb_info *info) |
1723 | { | 1722 | { |
1724 | struct savagefb_par *par = info->par; | 1723 | struct savagefb_par *par = info->par; |
1725 | DBG ("savage_unmap_mmio"); | 1724 | DBG("savage_unmap_mmio"); |
1726 | 1725 | ||
1727 | savage_disable_mmio(par); | 1726 | savage_disable_mmio(par); |
1728 | 1727 | ||
@@ -1732,46 +1731,46 @@ static void savage_unmap_mmio (struct fb_info *info) | |||
1732 | } | 1731 | } |
1733 | } | 1732 | } |
1734 | 1733 | ||
1735 | static int __devinit savage_map_video (struct fb_info *info, | 1734 | static int __devinit savage_map_video(struct fb_info *info, |
1736 | int video_len) | 1735 | int video_len) |
1737 | { | 1736 | { |
1738 | struct savagefb_par *par = info->par; | 1737 | struct savagefb_par *par = info->par; |
1739 | int resource; | 1738 | int resource; |
1740 | 1739 | ||
1741 | DBG("savage_map_video"); | 1740 | DBG("savage_map_video"); |
1742 | 1741 | ||
1743 | if (S3_SAVAGE3D_SERIES (par->chip)) | 1742 | if (S3_SAVAGE3D_SERIES(par->chip)) |
1744 | resource = 0; | 1743 | resource = 0; |
1745 | else | 1744 | else |
1746 | resource = 1; | 1745 | resource = 1; |
1747 | 1746 | ||
1748 | par->video.pbase = pci_resource_start (par->pcidev, resource); | 1747 | par->video.pbase = pci_resource_start(par->pcidev, resource); |
1749 | par->video.len = video_len; | 1748 | par->video.len = video_len; |
1750 | par->video.vbase = ioremap (par->video.pbase, par->video.len); | 1749 | par->video.vbase = ioremap(par->video.pbase, par->video.len); |
1751 | 1750 | ||
1752 | if (!par->video.vbase) { | 1751 | if (!par->video.vbase) { |
1753 | printk ("savagefb: unable to map screen memory\n"); | 1752 | printk("savagefb: unable to map screen memory\n"); |
1754 | return -ENOMEM; | 1753 | return -ENOMEM; |
1755 | } else | 1754 | } else |
1756 | printk (KERN_INFO "savagefb: mapped framebuffer at %p, " | 1755 | printk(KERN_INFO "savagefb: mapped framebuffer at %p, " |
1757 | "pbase == %x\n", par->video.vbase, par->video.pbase); | 1756 | "pbase == %x\n", par->video.vbase, par->video.pbase); |
1758 | 1757 | ||
1759 | info->fix.smem_start = par->video.pbase; | 1758 | info->fix.smem_start = par->video.pbase; |
1760 | info->fix.smem_len = par->video.len - par->cob_size; | 1759 | info->fix.smem_len = par->video.len - par->cob_size; |
1761 | info->screen_base = par->video.vbase; | 1760 | info->screen_base = par->video.vbase; |
1762 | 1761 | ||
1763 | #ifdef CONFIG_MTRR | 1762 | #ifdef CONFIG_MTRR |
1764 | par->video.mtrr = mtrr_add (par->video.pbase, video_len, | 1763 | par->video.mtrr = mtrr_add(par->video.pbase, video_len, |
1765 | MTRR_TYPE_WRCOMB, 1); | 1764 | MTRR_TYPE_WRCOMB, 1); |
1766 | #endif | 1765 | #endif |
1767 | 1766 | ||
1768 | /* Clear framebuffer, it's all white in memory after boot */ | 1767 | /* Clear framebuffer, it's all white in memory after boot */ |
1769 | memset_io (par->video.vbase, 0, par->video.len); | 1768 | memset_io(par->video.vbase, 0, par->video.len); |
1770 | 1769 | ||
1771 | return 0; | 1770 | return 0; |
1772 | } | 1771 | } |
1773 | 1772 | ||
1774 | static void savage_unmap_video (struct fb_info *info) | 1773 | static void savage_unmap_video(struct fb_info *info) |
1775 | { | 1774 | { |
1776 | struct savagefb_par *par = info->par; | 1775 | struct savagefb_par *par = info->par; |
1777 | 1776 | ||
@@ -1779,16 +1778,16 @@ static void savage_unmap_video (struct fb_info *info) | |||
1779 | 1778 | ||
1780 | if (par->video.vbase) { | 1779 | if (par->video.vbase) { |
1781 | #ifdef CONFIG_MTRR | 1780 | #ifdef CONFIG_MTRR |
1782 | mtrr_del (par->video.mtrr, par->video.pbase, par->video.len); | 1781 | mtrr_del(par->video.mtrr, par->video.pbase, par->video.len); |
1783 | #endif | 1782 | #endif |
1784 | 1783 | ||
1785 | iounmap (par->video.vbase); | 1784 | iounmap(par->video.vbase); |
1786 | par->video.vbase = NULL; | 1785 | par->video.vbase = NULL; |
1787 | info->screen_base = NULL; | 1786 | info->screen_base = NULL; |
1788 | } | 1787 | } |
1789 | } | 1788 | } |
1790 | 1789 | ||
1791 | static int savage_init_hw (struct savagefb_par *par) | 1790 | static int savage_init_hw(struct savagefb_par *par) |
1792 | { | 1791 | { |
1793 | unsigned char config1, m, n, n1, n2, sr8, cr3f, cr66 = 0, tmp; | 1792 | unsigned char config1, m, n, n1, n2, sr8, cr3f, cr66 = 0, tmp; |
1794 | 1793 | ||
@@ -1830,7 +1829,7 @@ static int savage_init_hw (struct savagefb_par *par) | |||
1830 | 1829 | ||
1831 | switch (par->chip) { | 1830 | switch (par->chip) { |
1832 | case S3_SAVAGE3D: | 1831 | case S3_SAVAGE3D: |
1833 | videoRam = RamSavage3D[ (config1 & 0xC0) >> 6 ] * 1024; | 1832 | videoRam = RamSavage3D[(config1 & 0xC0) >> 6 ] * 1024; |
1834 | break; | 1833 | break; |
1835 | 1834 | ||
1836 | case S3_SAVAGE4: | 1835 | case S3_SAVAGE4: |
@@ -1841,22 +1840,22 @@ static int savage_init_hw (struct savagefb_par *par) | |||
1841 | * can do it different... | 1840 | * can do it different... |
1842 | */ | 1841 | */ |
1843 | vga_out8(0x3d4, 0x68, par); /* memory control 1 */ | 1842 | vga_out8(0x3d4, 0x68, par); /* memory control 1 */ |
1844 | if( (vga_in8(0x3d5, par) & 0xC0) == (0x01 << 6) ) | 1843 | if ((vga_in8(0x3d5, par) & 0xC0) == (0x01 << 6)) |
1845 | RamSavage4[1] = 8; | 1844 | RamSavage4[1] = 8; |
1846 | 1845 | ||
1847 | /*FALLTHROUGH*/ | 1846 | /*FALLTHROUGH*/ |
1848 | 1847 | ||
1849 | case S3_SAVAGE2000: | 1848 | case S3_SAVAGE2000: |
1850 | videoRam = RamSavage4[ (config1 & 0xE0) >> 5 ] * 1024; | 1849 | videoRam = RamSavage4[(config1 & 0xE0) >> 5] * 1024; |
1851 | break; | 1850 | break; |
1852 | 1851 | ||
1853 | case S3_SAVAGE_MX: | 1852 | case S3_SAVAGE_MX: |
1854 | case S3_SUPERSAVAGE: | 1853 | case S3_SUPERSAVAGE: |
1855 | videoRam = RamSavageMX[ (config1 & 0x0E) >> 1 ] * 1024; | 1854 | videoRam = RamSavageMX[(config1 & 0x0E) >> 1] * 1024; |
1856 | break; | 1855 | break; |
1857 | 1856 | ||
1858 | case S3_PROSAVAGE: | 1857 | case S3_PROSAVAGE: |
1859 | videoRam = RamSavageNB[ (config1 & 0xE0) >> 5 ] * 1024; | 1858 | videoRam = RamSavageNB[(config1 & 0xE0) >> 5] * 1024; |
1860 | break; | 1859 | break; |
1861 | 1860 | ||
1862 | default: | 1861 | default: |
@@ -1867,31 +1866,31 @@ static int savage_init_hw (struct savagefb_par *par) | |||
1867 | 1866 | ||
1868 | videoRambytes = videoRam * 1024; | 1867 | videoRambytes = videoRam * 1024; |
1869 | 1868 | ||
1870 | printk (KERN_INFO "savagefb: probed videoram: %dk\n", videoRam); | 1869 | printk(KERN_INFO "savagefb: probed videoram: %dk\n", videoRam); |
1871 | 1870 | ||
1872 | /* reset graphics engine to avoid memory corruption */ | 1871 | /* reset graphics engine to avoid memory corruption */ |
1873 | vga_out8 (0x3d4, 0x66, par); | 1872 | vga_out8(0x3d4, 0x66, par); |
1874 | cr66 = vga_in8 (0x3d5, par); | 1873 | cr66 = vga_in8(0x3d5, par); |
1875 | vga_out8 (0x3d5, cr66 | 0x02, par); | 1874 | vga_out8(0x3d5, cr66 | 0x02, par); |
1876 | udelay (10000); | 1875 | udelay(10000); |
1877 | 1876 | ||
1878 | vga_out8 (0x3d4, 0x66, par); | 1877 | vga_out8(0x3d4, 0x66, par); |
1879 | vga_out8 (0x3d5, cr66 & ~0x02, par); /* clear reset flag */ | 1878 | vga_out8(0x3d5, cr66 & ~0x02, par); /* clear reset flag */ |
1880 | udelay (10000); | 1879 | udelay(10000); |
1881 | 1880 | ||
1882 | 1881 | ||
1883 | /* | 1882 | /* |
1884 | * reset memory interface, 3D engine, AGP master, PCI master, | 1883 | * reset memory interface, 3D engine, AGP master, PCI master, |
1885 | * master engine unit, motion compensation/LPB | 1884 | * master engine unit, motion compensation/LPB |
1886 | */ | 1885 | */ |
1887 | vga_out8 (0x3d4, 0x3f, par); | 1886 | vga_out8(0x3d4, 0x3f, par); |
1888 | cr3f = vga_in8 (0x3d5, par); | 1887 | cr3f = vga_in8(0x3d5, par); |
1889 | vga_out8 (0x3d5, cr3f | 0x08, par); | 1888 | vga_out8(0x3d5, cr3f | 0x08, par); |
1890 | udelay (10000); | 1889 | udelay(10000); |
1891 | 1890 | ||
1892 | vga_out8 (0x3d4, 0x3f, par); | 1891 | vga_out8(0x3d4, 0x3f, par); |
1893 | vga_out8 (0x3d5, cr3f & ~0x08, par); /* clear reset flags */ | 1892 | vga_out8(0x3d5, cr3f & ~0x08, par); /* clear reset flags */ |
1894 | udelay (10000); | 1893 | udelay(10000); |
1895 | 1894 | ||
1896 | /* Savage ramdac speeds */ | 1895 | /* Savage ramdac speeds */ |
1897 | par->numClocks = 4; | 1896 | par->numClocks = 4; |
@@ -1914,7 +1913,7 @@ static int savage_init_hw (struct savagefb_par *par) | |||
1914 | n1 = n & 0x1f; | 1913 | n1 = n & 0x1f; |
1915 | n2 = (n >> 5) & 0x03; | 1914 | n2 = (n >> 5) & 0x03; |
1916 | par->MCLK = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100; | 1915 | par->MCLK = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100; |
1917 | printk (KERN_INFO "savagefb: Detected current MCLK value of %d kHz\n", | 1916 | printk(KERN_INFO "savagefb: Detected current MCLK value of %d kHz\n", |
1918 | par->MCLK); | 1917 | par->MCLK); |
1919 | 1918 | ||
1920 | /* check for DVI/flat panel */ | 1919 | /* check for DVI/flat panel */ |
@@ -1943,12 +1942,12 @@ static int savage_init_hw (struct savagefb_par *par) | |||
1943 | /* Check LCD panel parrmation */ | 1942 | /* Check LCD panel parrmation */ |
1944 | 1943 | ||
1945 | if (par->display_type == DISP_LCD) { | 1944 | if (par->display_type == DISP_LCD) { |
1946 | unsigned char cr6b = VGArCR( 0x6b, par); | 1945 | unsigned char cr6b = VGArCR(0x6b, par); |
1947 | 1946 | ||
1948 | int panelX = (VGArSEQ (0x61, par) + | 1947 | int panelX = (VGArSEQ(0x61, par) + |
1949 | ((VGArSEQ (0x66, par) & 0x02) << 7) + 1) * 8; | 1948 | ((VGArSEQ(0x66, par) & 0x02) << 7) + 1) * 8; |
1950 | int panelY = (VGArSEQ (0x69, par) + | 1949 | int panelY = (VGArSEQ(0x69, par) + |
1951 | ((VGArSEQ (0x6e, par) & 0x70) << 4) + 1); | 1950 | ((VGArSEQ(0x6e, par) & 0x70) << 4) + 1); |
1952 | 1951 | ||
1953 | char * sTechnology = "Unknown"; | 1952 | char * sTechnology = "Unknown"; |
1954 | 1953 | ||
@@ -1970,26 +1969,26 @@ static int savage_init_hw (struct savagefb_par *par) | |||
1970 | ActiveDUO = 0x80 | 1969 | ActiveDUO = 0x80 |
1971 | }; | 1970 | }; |
1972 | 1971 | ||
1973 | if ((VGArSEQ (0x39, par) & 0x03) == 0) { | 1972 | if ((VGArSEQ(0x39, par) & 0x03) == 0) { |
1974 | sTechnology = "TFT"; | 1973 | sTechnology = "TFT"; |
1975 | } else if ((VGArSEQ (0x30, par) & 0x01) == 0) { | 1974 | } else if ((VGArSEQ(0x30, par) & 0x01) == 0) { |
1976 | sTechnology = "DSTN"; | 1975 | sTechnology = "DSTN"; |
1977 | } else { | 1976 | } else { |
1978 | sTechnology = "STN"; | 1977 | sTechnology = "STN"; |
1979 | } | 1978 | } |
1980 | 1979 | ||
1981 | printk (KERN_INFO "savagefb: %dx%d %s LCD panel detected %s\n", | 1980 | printk(KERN_INFO "savagefb: %dx%d %s LCD panel detected %s\n", |
1982 | panelX, panelY, sTechnology, | 1981 | panelX, panelY, sTechnology, |
1983 | cr6b & ActiveLCD ? "and active" : "but not active"); | 1982 | cr6b & ActiveLCD ? "and active" : "but not active"); |
1984 | 1983 | ||
1985 | if( cr6b & ActiveLCD ) { | 1984 | if (cr6b & ActiveLCD) { |
1986 | /* | 1985 | /* |
1987 | * If the LCD is active and panel expansion is enabled, | 1986 | * If the LCD is active and panel expansion is enabled, |
1988 | * we probably want to kill the HW cursor. | 1987 | * we probably want to kill the HW cursor. |
1989 | */ | 1988 | */ |
1990 | 1989 | ||
1991 | printk (KERN_INFO "savagefb: Limiting video mode to " | 1990 | printk(KERN_INFO "savagefb: Limiting video mode to " |
1992 | "%dx%d\n", panelX, panelY ); | 1991 | "%dx%d\n", panelX, panelY); |
1993 | 1992 | ||
1994 | par->SavagePanelWidth = panelX; | 1993 | par->SavagePanelWidth = panelX; |
1995 | par->SavagePanelHeight = panelY; | 1994 | par->SavagePanelHeight = panelY; |
@@ -1998,10 +1997,10 @@ static int savage_init_hw (struct savagefb_par *par) | |||
1998 | par->display_type = DISP_CRT; | 1997 | par->display_type = DISP_CRT; |
1999 | } | 1998 | } |
2000 | 1999 | ||
2001 | savage_get_default_par (par, &par->state); | 2000 | savage_get_default_par(par, &par->state); |
2002 | par->save = par->state; | 2001 | par->save = par->state; |
2003 | 2002 | ||
2004 | if( S3_SAVAGE4_SERIES(par->chip) ) { | 2003 | if (S3_SAVAGE4_SERIES(par->chip)) { |
2005 | /* | 2004 | /* |
2006 | * The Savage4 and ProSavage have COB coherency bugs which | 2005 | * The Savage4 and ProSavage have COB coherency bugs which |
2007 | * render the buffer useless. We disable it. | 2006 | * render the buffer useless. We disable it. |
@@ -2020,9 +2019,9 @@ static int savage_init_hw (struct savagefb_par *par) | |||
2020 | return videoRambytes; | 2019 | return videoRambytes; |
2021 | } | 2020 | } |
2022 | 2021 | ||
2023 | static int __devinit savage_init_fb_info (struct fb_info *info, | 2022 | static int __devinit savage_init_fb_info(struct fb_info *info, |
2024 | struct pci_dev *dev, | 2023 | struct pci_dev *dev, |
2025 | const struct pci_device_id *id) | 2024 | const struct pci_device_id *id) |
2026 | { | 2025 | { |
2027 | struct savagefb_par *par = info->par; | 2026 | struct savagefb_par *par = info->par; |
2028 | int err = 0; | 2027 | int err = 0; |
@@ -2038,63 +2037,63 @@ static int __devinit savage_init_fb_info (struct fb_info *info, | |||
2038 | switch (info->fix.accel) { | 2037 | switch (info->fix.accel) { |
2039 | case FB_ACCEL_SUPERSAVAGE: | 2038 | case FB_ACCEL_SUPERSAVAGE: |
2040 | par->chip = S3_SUPERSAVAGE; | 2039 | par->chip = S3_SUPERSAVAGE; |
2041 | snprintf (info->fix.id, 16, "SuperSavage"); | 2040 | snprintf(info->fix.id, 16, "SuperSavage"); |
2042 | break; | 2041 | break; |
2043 | case FB_ACCEL_SAVAGE4: | 2042 | case FB_ACCEL_SAVAGE4: |
2044 | par->chip = S3_SAVAGE4; | 2043 | par->chip = S3_SAVAGE4; |
2045 | snprintf (info->fix.id, 16, "Savage4"); | 2044 | snprintf(info->fix.id, 16, "Savage4"); |
2046 | break; | 2045 | break; |
2047 | case FB_ACCEL_SAVAGE3D: | 2046 | case FB_ACCEL_SAVAGE3D: |
2048 | par->chip = S3_SAVAGE3D; | 2047 | par->chip = S3_SAVAGE3D; |
2049 | snprintf (info->fix.id, 16, "Savage3D"); | 2048 | snprintf(info->fix.id, 16, "Savage3D"); |
2050 | break; | 2049 | break; |
2051 | case FB_ACCEL_SAVAGE3D_MV: | 2050 | case FB_ACCEL_SAVAGE3D_MV: |
2052 | par->chip = S3_SAVAGE3D; | 2051 | par->chip = S3_SAVAGE3D; |
2053 | snprintf (info->fix.id, 16, "Savage3D-MV"); | 2052 | snprintf(info->fix.id, 16, "Savage3D-MV"); |
2054 | break; | 2053 | break; |
2055 | case FB_ACCEL_SAVAGE2000: | 2054 | case FB_ACCEL_SAVAGE2000: |
2056 | par->chip = S3_SAVAGE2000; | 2055 | par->chip = S3_SAVAGE2000; |
2057 | snprintf (info->fix.id, 16, "Savage2000"); | 2056 | snprintf(info->fix.id, 16, "Savage2000"); |
2058 | break; | 2057 | break; |
2059 | case FB_ACCEL_SAVAGE_MX_MV: | 2058 | case FB_ACCEL_SAVAGE_MX_MV: |
2060 | par->chip = S3_SAVAGE_MX; | 2059 | par->chip = S3_SAVAGE_MX; |
2061 | snprintf (info->fix.id, 16, "Savage/MX-MV"); | 2060 | snprintf(info->fix.id, 16, "Savage/MX-MV"); |
2062 | break; | 2061 | break; |
2063 | case FB_ACCEL_SAVAGE_MX: | 2062 | case FB_ACCEL_SAVAGE_MX: |
2064 | par->chip = S3_SAVAGE_MX; | 2063 | par->chip = S3_SAVAGE_MX; |
2065 | snprintf (info->fix.id, 16, "Savage/MX"); | 2064 | snprintf(info->fix.id, 16, "Savage/MX"); |
2066 | break; | 2065 | break; |
2067 | case FB_ACCEL_SAVAGE_IX_MV: | 2066 | case FB_ACCEL_SAVAGE_IX_MV: |
2068 | par->chip = S3_SAVAGE_MX; | 2067 | par->chip = S3_SAVAGE_MX; |
2069 | snprintf (info->fix.id, 16, "Savage/IX-MV"); | 2068 | snprintf(info->fix.id, 16, "Savage/IX-MV"); |
2070 | break; | 2069 | break; |
2071 | case FB_ACCEL_SAVAGE_IX: | 2070 | case FB_ACCEL_SAVAGE_IX: |
2072 | par->chip = S3_SAVAGE_MX; | 2071 | par->chip = S3_SAVAGE_MX; |
2073 | snprintf (info->fix.id, 16, "Savage/IX"); | 2072 | snprintf(info->fix.id, 16, "Savage/IX"); |
2074 | break; | 2073 | break; |
2075 | case FB_ACCEL_PROSAVAGE_PM: | 2074 | case FB_ACCEL_PROSAVAGE_PM: |
2076 | par->chip = S3_PROSAVAGE; | 2075 | par->chip = S3_PROSAVAGE; |
2077 | snprintf (info->fix.id, 16, "ProSavagePM"); | 2076 | snprintf(info->fix.id, 16, "ProSavagePM"); |
2078 | break; | 2077 | break; |
2079 | case FB_ACCEL_PROSAVAGE_KM: | 2078 | case FB_ACCEL_PROSAVAGE_KM: |
2080 | par->chip = S3_PROSAVAGE; | 2079 | par->chip = S3_PROSAVAGE; |
2081 | snprintf (info->fix.id, 16, "ProSavageKM"); | 2080 | snprintf(info->fix.id, 16, "ProSavageKM"); |
2082 | break; | 2081 | break; |
2083 | case FB_ACCEL_S3TWISTER_P: | 2082 | case FB_ACCEL_S3TWISTER_P: |
2084 | par->chip = S3_PROSAVAGE; | 2083 | par->chip = S3_PROSAVAGE; |
2085 | snprintf (info->fix.id, 16, "TwisterP"); | 2084 | snprintf(info->fix.id, 16, "TwisterP"); |
2086 | break; | 2085 | break; |
2087 | case FB_ACCEL_S3TWISTER_K: | 2086 | case FB_ACCEL_S3TWISTER_K: |
2088 | par->chip = S3_PROSAVAGE; | 2087 | par->chip = S3_PROSAVAGE; |
2089 | snprintf (info->fix.id, 16, "TwisterK"); | 2088 | snprintf(info->fix.id, 16, "TwisterK"); |
2090 | break; | 2089 | break; |
2091 | case FB_ACCEL_PROSAVAGE_DDR: | 2090 | case FB_ACCEL_PROSAVAGE_DDR: |
2092 | par->chip = S3_PROSAVAGE; | 2091 | par->chip = S3_PROSAVAGE; |
2093 | snprintf (info->fix.id, 16, "ProSavageDDR"); | 2092 | snprintf(info->fix.id, 16, "ProSavageDDR"); |
2094 | break; | 2093 | break; |
2095 | case FB_ACCEL_PROSAVAGE_DDRK: | 2094 | case FB_ACCEL_PROSAVAGE_DDRK: |
2096 | par->chip = S3_PROSAVAGE; | 2095 | par->chip = S3_PROSAVAGE; |
2097 | snprintf (info->fix.id, 16, "ProSavage8"); | 2096 | snprintf(info->fix.id, 16, "ProSavage8"); |
2098 | break; | 2097 | break; |
2099 | } | 2098 | } |
2100 | 2099 | ||
@@ -2135,7 +2134,7 @@ static int __devinit savage_init_fb_info (struct fb_info *info, | |||
2135 | info->pixmap.buf_align = 4; | 2134 | info->pixmap.buf_align = 4; |
2136 | info->pixmap.access_align = 32; | 2135 | info->pixmap.access_align = 32; |
2137 | 2136 | ||
2138 | err = fb_alloc_cmap (&info->cmap, NR_PALETTE, 0); | 2137 | err = fb_alloc_cmap(&info->cmap, NR_PALETTE, 0); |
2139 | if (!err) | 2138 | if (!err) |
2140 | info->flags |= FBINFO_HWACCEL_COPYAREA | | 2139 | info->flags |= FBINFO_HWACCEL_COPYAREA | |
2141 | FBINFO_HWACCEL_FILLRECT | | 2140 | FBINFO_HWACCEL_FILLRECT | |
@@ -2147,8 +2146,8 @@ static int __devinit savage_init_fb_info (struct fb_info *info, | |||
2147 | 2146 | ||
2148 | /* --------------------------------------------------------------------- */ | 2147 | /* --------------------------------------------------------------------- */ |
2149 | 2148 | ||
2150 | static int __devinit savagefb_probe (struct pci_dev* dev, | 2149 | static int __devinit savagefb_probe(struct pci_dev* dev, |
2151 | const struct pci_device_id* id) | 2150 | const struct pci_device_id* id) |
2152 | { | 2151 | { |
2153 | struct fb_info *info; | 2152 | struct fb_info *info; |
2154 | struct savagefb_par *par; | 2153 | struct savagefb_par *par; |
@@ -2260,12 +2259,12 @@ static int __devinit savagefb_probe (struct pci_dev* dev, | |||
2260 | fb_destroy_modedb(info->monspecs.modedb); | 2259 | fb_destroy_modedb(info->monspecs.modedb); |
2261 | info->monspecs.modedb = NULL; | 2260 | info->monspecs.modedb = NULL; |
2262 | 2261 | ||
2263 | err = register_framebuffer (info); | 2262 | err = register_framebuffer(info); |
2264 | if (err < 0) | 2263 | if (err < 0) |
2265 | goto failed; | 2264 | goto failed; |
2266 | 2265 | ||
2267 | printk (KERN_INFO "fb: S3 %s frame buffer device\n", | 2266 | printk(KERN_INFO "fb: S3 %s frame buffer device\n", |
2268 | info->fix.id); | 2267 | info->fix.id); |
2269 | 2268 | ||
2270 | /* | 2269 | /* |
2271 | * Our driver data | 2270 | * Our driver data |
@@ -2278,10 +2277,10 @@ static int __devinit savagefb_probe (struct pci_dev* dev, | |||
2278 | #ifdef CONFIG_FB_SAVAGE_I2C | 2277 | #ifdef CONFIG_FB_SAVAGE_I2C |
2279 | savagefb_delete_i2c_busses(info); | 2278 | savagefb_delete_i2c_busses(info); |
2280 | #endif | 2279 | #endif |
2281 | fb_alloc_cmap (&info->cmap, 0, 0); | 2280 | fb_alloc_cmap(&info->cmap, 0, 0); |
2282 | savage_unmap_video(info); | 2281 | savage_unmap_video(info); |
2283 | failed_video: | 2282 | failed_video: |
2284 | savage_unmap_mmio (info); | 2283 | savage_unmap_mmio(info); |
2285 | failed_mmio: | 2284 | failed_mmio: |
2286 | kfree(info->pixmap.addr); | 2285 | kfree(info->pixmap.addr); |
2287 | failed_init: | 2286 | failed_init: |
@@ -2292,7 +2291,7 @@ static int __devinit savagefb_probe (struct pci_dev* dev, | |||
2292 | return err; | 2291 | return err; |
2293 | } | 2292 | } |
2294 | 2293 | ||
2295 | static void __devexit savagefb_remove (struct pci_dev *dev) | 2294 | static void __devexit savagefb_remove(struct pci_dev *dev) |
2296 | { | 2295 | { |
2297 | struct fb_info *info = pci_get_drvdata(dev); | 2296 | struct fb_info *info = pci_get_drvdata(dev); |
2298 | 2297 | ||
@@ -2304,16 +2303,16 @@ static void __devexit savagefb_remove (struct pci_dev *dev) | |||
2304 | * we will be leaving hooks that could cause | 2303 | * we will be leaving hooks that could cause |
2305 | * oopsen laying around. | 2304 | * oopsen laying around. |
2306 | */ | 2305 | */ |
2307 | if (unregister_framebuffer (info)) | 2306 | if (unregister_framebuffer(info)) |
2308 | printk (KERN_WARNING "savagefb: danger danger! " | 2307 | printk(KERN_WARNING "savagefb: danger danger! " |
2309 | "Oopsen imminent!\n"); | 2308 | "Oopsen imminent!\n"); |
2310 | 2309 | ||
2311 | #ifdef CONFIG_FB_SAVAGE_I2C | 2310 | #ifdef CONFIG_FB_SAVAGE_I2C |
2312 | savagefb_delete_i2c_busses(info); | 2311 | savagefb_delete_i2c_busses(info); |
2313 | #endif | 2312 | #endif |
2314 | fb_alloc_cmap (&info->cmap, 0, 0); | 2313 | fb_alloc_cmap(&info->cmap, 0, 0); |
2315 | savage_unmap_video (info); | 2314 | savage_unmap_video(info); |
2316 | savage_unmap_mmio (info); | 2315 | savage_unmap_mmio(info); |
2317 | kfree(info->pixmap.addr); | 2316 | kfree(info->pixmap.addr); |
2318 | pci_release_regions(dev); | 2317 | pci_release_regions(dev); |
2319 | framebuffer_release(info); | 2318 | framebuffer_release(info); |
@@ -2326,7 +2325,7 @@ static void __devexit savagefb_remove (struct pci_dev *dev) | |||
2326 | } | 2325 | } |
2327 | } | 2326 | } |
2328 | 2327 | ||
2329 | static int savagefb_suspend (struct pci_dev* dev, pm_message_t state) | 2328 | static int savagefb_suspend(struct pci_dev* dev, pm_message_t state) |
2330 | { | 2329 | { |
2331 | struct fb_info *info = pci_get_drvdata(dev); | 2330 | struct fb_info *info = pci_get_drvdata(dev); |
2332 | struct savagefb_par *par = info->par; | 2331 | struct savagefb_par *par = info->par; |
@@ -2362,7 +2361,7 @@ static int savagefb_suspend (struct pci_dev* dev, pm_message_t state) | |||
2362 | return 0; | 2361 | return 0; |
2363 | } | 2362 | } |
2364 | 2363 | ||
2365 | static int savagefb_resume (struct pci_dev* dev) | 2364 | static int savagefb_resume(struct pci_dev* dev) |
2366 | { | 2365 | { |
2367 | struct fb_info *info = pci_get_drvdata(dev); | 2366 | struct fb_info *info = pci_get_drvdata(dev); |
2368 | struct savagefb_par *par = info->par; | 2367 | struct savagefb_par *par = info->par; |
@@ -2386,14 +2385,14 @@ static int savagefb_resume (struct pci_dev* dev) | |||
2386 | pci_set_power_state(dev, PCI_D0); | 2385 | pci_set_power_state(dev, PCI_D0); |
2387 | pci_restore_state(dev); | 2386 | pci_restore_state(dev); |
2388 | 2387 | ||
2389 | if(pci_enable_device(dev)) | 2388 | if (pci_enable_device(dev)) |
2390 | DBG("err"); | 2389 | DBG("err"); |
2391 | 2390 | ||
2392 | pci_set_master(dev); | 2391 | pci_set_master(dev); |
2393 | savage_enable_mmio(par); | 2392 | savage_enable_mmio(par); |
2394 | savage_init_hw(par); | 2393 | savage_init_hw(par); |
2395 | savagefb_set_par(info); | 2394 | savagefb_set_par(info); |
2396 | fb_set_suspend (info, 0); | 2395 | fb_set_suspend(info, 0); |
2397 | savagefb_blank(FB_BLANK_UNBLANK, info); | 2396 | savagefb_blank(FB_BLANK_UNBLANK, info); |
2398 | release_console_sem(); | 2397 | release_console_sem(); |
2399 | 2398 | ||
@@ -2487,10 +2486,10 @@ static struct pci_driver savagefb_driver = { | |||
2487 | 2486 | ||
2488 | /* **************************** exit-time only **************************** */ | 2487 | /* **************************** exit-time only **************************** */ |
2489 | 2488 | ||
2490 | static void __exit savage_done (void) | 2489 | static void __exit savage_done(void) |
2491 | { | 2490 | { |
2492 | DBG("savage_done"); | 2491 | DBG("savage_done"); |
2493 | pci_unregister_driver (&savagefb_driver); | 2492 | pci_unregister_driver(&savagefb_driver); |
2494 | } | 2493 | } |
2495 | 2494 | ||
2496 | 2495 | ||
@@ -2521,7 +2520,7 @@ static int __init savagefb_init(void) | |||
2521 | return -ENODEV; | 2520 | return -ENODEV; |
2522 | 2521 | ||
2523 | savagefb_setup(option); | 2522 | savagefb_setup(option); |
2524 | return pci_register_driver (&savagefb_driver); | 2523 | return pci_register_driver(&savagefb_driver); |
2525 | 2524 | ||
2526 | } | 2525 | } |
2527 | 2526 | ||