diff options
author | Antonino A. Daplas <adaplas@gmail.com> | 2006-06-26 03:26:23 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 12:58:28 -0400 |
commit | 2356614b08bf8769790c4f1f55c83d95f802bc51 (patch) | |
tree | b91aaa653189fabe3cb09fc9ed015fa384b22b01 /drivers/video/savage/savagefb.h | |
parent | 1ba70a019599b4fa3e091c6dbc4a04e2c607eea3 (diff) |
[PATCH] savagefb: Allocate space for current and saved register states
Allocate space for 2 register states: 'current' for the current state of
the hardware, and 'saved', to be used for restoring the hardware to a sane
state. This is in preparation for the addition of state save and restore
hooks to make savagefb work together with the latest Xorg savage driver.
Signed-off-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/video/savage/savagefb.h')
-rw-r--r-- | drivers/video/savage/savagefb.h | 45 |
1 files changed, 23 insertions, 22 deletions
diff --git a/drivers/video/savage/savagefb.h b/drivers/video/savage/savagefb.h index 58cfdfb41833..e648a6c0f6d9 100644 --- a/drivers/video/savage/savagefb.h +++ b/drivers/video/savage/savagefb.h | |||
@@ -147,7 +147,27 @@ struct xtimings { | |||
147 | int interlaced; | 147 | int interlaced; |
148 | }; | 148 | }; |
149 | 149 | ||
150 | struct savage_reg { | ||
151 | unsigned char MiscOutReg; /* Misc */ | ||
152 | unsigned char CRTC[25]; /* Crtc Controller */ | ||
153 | unsigned char Sequencer[5]; /* Video Sequencer */ | ||
154 | unsigned char Graphics[9]; /* Video Graphics */ | ||
155 | unsigned char Attribute[21]; /* Video Atribute */ | ||
150 | 156 | ||
157 | unsigned int mode, refresh; | ||
158 | unsigned char SR08, SR0E, SR0F; | ||
159 | unsigned char SR10, SR11, SR12, SR13, SR15, SR18, SR29, SR30; | ||
160 | unsigned char SR54[8]; | ||
161 | unsigned char Clock; | ||
162 | unsigned char CR31, CR32, CR33, CR34, CR36, CR3A, CR3B, CR3C; | ||
163 | unsigned char CR40, CR41, CR42, CR43, CR45; | ||
164 | unsigned char CR50, CR51, CR53, CR55, CR58, CR5B, CR5D, CR5E; | ||
165 | unsigned char CR60, CR63, CR65, CR66, CR67, CR68, CR69, CR6D, CR6F; | ||
166 | unsigned char CR86, CR88; | ||
167 | unsigned char CR90, CR91, CRB0; | ||
168 | unsigned int STREAMS[22]; /* yuck, streams regs */ | ||
169 | unsigned int MMPR0, MMPR1, MMPR2, MMPR3; | ||
170 | }; | ||
151 | /* --------------------------------------------------------------------- */ | 171 | /* --------------------------------------------------------------------- */ |
152 | 172 | ||
153 | #define NR_PALETTE 256 | 173 | #define NR_PALETTE 256 |
@@ -167,6 +187,8 @@ struct savagefb_par { | |||
167 | struct pci_dev *pcidev; | 187 | struct pci_dev *pcidev; |
168 | savage_chipset chip; | 188 | savage_chipset chip; |
169 | struct savagefb_i2c_chan chan; | 189 | struct savagefb_i2c_chan chan; |
190 | struct savage_reg state; | ||
191 | struct savage_reg save; | ||
170 | unsigned char *edid; | 192 | unsigned char *edid; |
171 | u32 pseudo_palette[16]; | 193 | u32 pseudo_palette[16]; |
172 | int paletteEnabled; | 194 | int paletteEnabled; |
@@ -179,6 +201,7 @@ struct savagefb_par { | |||
179 | int minClock; | 201 | int minClock; |
180 | int numClocks; | 202 | int numClocks; |
181 | int clock[4]; | 203 | int clock[4]; |
204 | int MCLK, REFCLK, LCDclk; | ||
182 | struct { | 205 | struct { |
183 | u8 __iomem *vbase; | 206 | u8 __iomem *vbase; |
184 | u32 pbase; | 207 | u32 pbase; |
@@ -196,7 +219,6 @@ struct savagefb_par { | |||
196 | 219 | ||
197 | volatile u32 __iomem *bci_base; | 220 | volatile u32 __iomem *bci_base; |
198 | unsigned int bci_ptr; | 221 | unsigned int bci_ptr; |
199 | |||
200 | u32 cob_offset; | 222 | u32 cob_offset; |
201 | u32 cob_size; | 223 | u32 cob_size; |
202 | int cob_index; | 224 | int cob_index; |
@@ -204,7 +226,6 @@ struct savagefb_par { | |||
204 | void (*SavageWaitIdle) (struct savagefb_par *par); | 226 | void (*SavageWaitIdle) (struct savagefb_par *par); |
205 | void (*SavageWaitFifo) (struct savagefb_par *par, int space); | 227 | void (*SavageWaitFifo) (struct savagefb_par *par, int space); |
206 | 228 | ||
207 | int MCLK, REFCLK, LCDclk; | ||
208 | int HorizScaleFactor; | 229 | int HorizScaleFactor; |
209 | 230 | ||
210 | /* Panels size */ | 231 | /* Panels size */ |
@@ -217,26 +238,6 @@ struct savagefb_par { | |||
217 | 238 | ||
218 | int depth; | 239 | int depth; |
219 | int vwidth; | 240 | int vwidth; |
220 | |||
221 | unsigned char MiscOutReg; /* Misc */ | ||
222 | unsigned char CRTC[25]; /* Crtc Controller */ | ||
223 | unsigned char Sequencer[5]; /* Video Sequencer */ | ||
224 | unsigned char Graphics[9]; /* Video Graphics */ | ||
225 | unsigned char Attribute[21]; /* Video Atribute */ | ||
226 | |||
227 | unsigned int mode, refresh; | ||
228 | unsigned char SR08, SR0E, SR0F; | ||
229 | unsigned char SR10, SR11, SR12, SR13, SR15, SR18, SR29, SR30; | ||
230 | unsigned char SR54[8]; | ||
231 | unsigned char Clock; | ||
232 | unsigned char CR31, CR32, CR33, CR34, CR36, CR3A, CR3B, CR3C; | ||
233 | unsigned char CR40, CR41, CR42, CR43, CR45; | ||
234 | unsigned char CR50, CR51, CR53, CR55, CR58, CR5B, CR5D, CR5E; | ||
235 | unsigned char CR60, CR63, CR65, CR66, CR67, CR68, CR69, CR6D, CR6F; | ||
236 | unsigned char CR86, CR88; | ||
237 | unsigned char CR90, CR91, CRB0; | ||
238 | unsigned int STREAMS[22]; /* yuck, streams regs */ | ||
239 | unsigned int MMPR0, MMPR1, MMPR2, MMPR3; | ||
240 | }; | 241 | }; |
241 | 242 | ||
242 | #define BCI_BD_BW_DISABLE 0x10000000 | 243 | #define BCI_BD_BW_DISABLE 0x10000000 |