diff options
author | Ricardo Neri <ricardo.neri@ti.com> | 2012-03-15 12:39:00 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-05-11 08:15:21 -0400 |
commit | 199e7fd6219cac2065a0e7e09d9d505e1f03f29e (patch) | |
tree | 51a342a17921556f6951184197553c7fa4c0263a /drivers/video/omap2 | |
parent | 7c3291f06b4e025c4bd373adbb3f6354080f5097 (diff) |
OMAPDSS: HDMI: OMAP4: Remove CEA-861 audio infoframe and IEC-60958 enums
Instead of having its own definitions for CEA-861 and IEC-60958, the HDMI
driver should use those provided by ALSA. This patch removes the definitions
that are already provided by ALSA.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Diffstat (limited to 'drivers/video/omap2')
-rw-r--r-- | drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 34 | ||||
-rw-r--r-- | drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h | 81 |
2 files changed, 20 insertions, 95 deletions
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c index bc499bf30266..e9e8b0d4bddc 100644 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c +++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | |||
@@ -29,6 +29,10 @@ | |||
29 | #include <linux/string.h> | 29 | #include <linux/string.h> |
30 | #include <linux/seq_file.h> | 30 | #include <linux/seq_file.h> |
31 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
32 | #if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ | ||
33 | defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) | ||
34 | #include <sound/asound.h> | ||
35 | #endif | ||
32 | 36 | ||
33 | #include "ti_hdmi_4xxx_ip.h" | 37 | #include "ti_hdmi_4xxx_ip.h" |
34 | #include "dss.h" | 38 | #include "dss.h" |
@@ -1145,9 +1149,8 @@ void hdmi_core_audio_config(struct hdmi_ip_data *ip_data, | |||
1145 | } | 1149 | } |
1146 | 1150 | ||
1147 | void hdmi_core_audio_infoframe_config(struct hdmi_ip_data *ip_data, | 1151 | void hdmi_core_audio_infoframe_config(struct hdmi_ip_data *ip_data, |
1148 | struct hdmi_core_infoframe_audio *info_aud) | 1152 | struct snd_cea_861_aud_if *info_aud) |
1149 | { | 1153 | { |
1150 | u8 val; | ||
1151 | u8 sum = 0, checksum = 0; | 1154 | u8 sum = 0, checksum = 0; |
1152 | void __iomem *av_base = hdmi_av_base(ip_data); | 1155 | void __iomem *av_base = hdmi_av_base(ip_data); |
1153 | 1156 | ||
@@ -1161,24 +1164,23 @@ void hdmi_core_audio_infoframe_config(struct hdmi_ip_data *ip_data, | |||
1161 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUDIO_LEN, 0x0a); | 1164 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUDIO_LEN, 0x0a); |
1162 | sum += 0x84 + 0x001 + 0x00a; | 1165 | sum += 0x84 + 0x001 + 0x00a; |
1163 | 1166 | ||
1164 | val = (info_aud->db1_coding_type << 4) | 1167 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(0), |
1165 | | (info_aud->db1_channel_count - 1); | 1168 | info_aud->db1_ct_cc); |
1166 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(0), val); | 1169 | sum += info_aud->db1_ct_cc; |
1167 | sum += val; | ||
1168 | 1170 | ||
1169 | val = (info_aud->db2_sample_freq << 2) | info_aud->db2_sample_size; | 1171 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(1), |
1170 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(1), val); | 1172 | info_aud->db2_sf_ss); |
1171 | sum += val; | 1173 | sum += info_aud->db2_sf_ss; |
1172 | 1174 | ||
1173 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(2), 0x00); | 1175 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(2), info_aud->db3); |
1176 | sum += info_aud->db3; | ||
1174 | 1177 | ||
1175 | val = info_aud->db4_channel_alloc; | 1178 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(3), info_aud->db4_ca); |
1176 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(3), val); | 1179 | sum += info_aud->db4_ca; |
1177 | sum += val; | ||
1178 | 1180 | ||
1179 | val = (info_aud->db5_downmix_inh << 7) | (info_aud->db5_lsv << 3); | 1181 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(4), |
1180 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(4), val); | 1182 | info_aud->db5_dminh_lsv); |
1181 | sum += val; | 1183 | sum += info_aud->db5_dminh_lsv; |
1182 | 1184 | ||
1183 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(5), 0x00); | 1185 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(5), 0x00); |
1184 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(6), 0x00); | 1186 | hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(6), 0x00); |
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h index bc221435a984..9a08fbfdd1c7 100644 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h +++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h | |||
@@ -274,35 +274,6 @@ enum hdmi_core_infoframe { | |||
274 | HDMI_INFOFRAME_AVI_DB5PR_8 = 7, | 274 | HDMI_INFOFRAME_AVI_DB5PR_8 = 7, |
275 | HDMI_INFOFRAME_AVI_DB5PR_9 = 8, | 275 | HDMI_INFOFRAME_AVI_DB5PR_9 = 8, |
276 | HDMI_INFOFRAME_AVI_DB5PR_10 = 9, | 276 | HDMI_INFOFRAME_AVI_DB5PR_10 = 9, |
277 | HDMI_INFOFRAME_AUDIO_DB1CT_FROM_STREAM = 0, | ||
278 | HDMI_INFOFRAME_AUDIO_DB1CT_IEC60958 = 1, | ||
279 | HDMI_INFOFRAME_AUDIO_DB1CT_AC3 = 2, | ||
280 | HDMI_INFOFRAME_AUDIO_DB1CT_MPEG1 = 3, | ||
281 | HDMI_INFOFRAME_AUDIO_DB1CT_MP3 = 4, | ||
282 | HDMI_INFOFRAME_AUDIO_DB1CT_MPEG2_MULTICH = 5, | ||
283 | HDMI_INFOFRAME_AUDIO_DB1CT_AAC = 6, | ||
284 | HDMI_INFOFRAME_AUDIO_DB1CT_DTS = 7, | ||
285 | HDMI_INFOFRAME_AUDIO_DB1CT_ATRAC = 8, | ||
286 | HDMI_INFOFRAME_AUDIO_DB1CT_ONEBIT = 9, | ||
287 | HDMI_INFOFRAME_AUDIO_DB1CT_DOLBY_DIGITAL_PLUS = 10, | ||
288 | HDMI_INFOFRAME_AUDIO_DB1CT_DTS_HD = 11, | ||
289 | HDMI_INFOFRAME_AUDIO_DB1CT_MAT = 12, | ||
290 | HDMI_INFOFRAME_AUDIO_DB1CT_DST = 13, | ||
291 | HDMI_INFOFRAME_AUDIO_DB1CT_WMA_PRO = 14, | ||
292 | HDMI_INFOFRAME_AUDIO_DB2SF_FROM_STREAM = 0, | ||
293 | HDMI_INFOFRAME_AUDIO_DB2SF_32000 = 1, | ||
294 | HDMI_INFOFRAME_AUDIO_DB2SF_44100 = 2, | ||
295 | HDMI_INFOFRAME_AUDIO_DB2SF_48000 = 3, | ||
296 | HDMI_INFOFRAME_AUDIO_DB2SF_88200 = 4, | ||
297 | HDMI_INFOFRAME_AUDIO_DB2SF_96000 = 5, | ||
298 | HDMI_INFOFRAME_AUDIO_DB2SF_176400 = 6, | ||
299 | HDMI_INFOFRAME_AUDIO_DB2SF_192000 = 7, | ||
300 | HDMI_INFOFRAME_AUDIO_DB2SS_FROM_STREAM = 0, | ||
301 | HDMI_INFOFRAME_AUDIO_DB2SS_16BIT = 1, | ||
302 | HDMI_INFOFRAME_AUDIO_DB2SS_20BIT = 2, | ||
303 | HDMI_INFOFRAME_AUDIO_DB2SS_24BIT = 3, | ||
304 | HDMI_INFOFRAME_AUDIO_DB5_DM_INH_PERMITTED = 0, | ||
305 | HDMI_INFOFRAME_AUDIO_DB5_DM_INH_PROHIBITED = 1 | ||
306 | }; | 277 | }; |
307 | 278 | ||
308 | enum hdmi_packing_mode { | 279 | enum hdmi_packing_mode { |
@@ -312,17 +283,6 @@ enum hdmi_packing_mode { | |||
312 | HDMI_PACK_ALREADYPACKED = 7 | 283 | HDMI_PACK_ALREADYPACKED = 7 |
313 | }; | 284 | }; |
314 | 285 | ||
315 | enum hdmi_core_audio_sample_freq { | ||
316 | HDMI_AUDIO_FS_32000 = 0x3, | ||
317 | HDMI_AUDIO_FS_44100 = 0x0, | ||
318 | HDMI_AUDIO_FS_48000 = 0x2, | ||
319 | HDMI_AUDIO_FS_88200 = 0x8, | ||
320 | HDMI_AUDIO_FS_96000 = 0xA, | ||
321 | HDMI_AUDIO_FS_176400 = 0xC, | ||
322 | HDMI_AUDIO_FS_192000 = 0xE, | ||
323 | HDMI_AUDIO_FS_NOT_INDICATED = 0x1 | ||
324 | }; | ||
325 | |||
326 | enum hdmi_core_audio_layout { | 286 | enum hdmi_core_audio_layout { |
327 | HDMI_AUDIO_LAYOUT_2CH = 0, | 287 | HDMI_AUDIO_LAYOUT_2CH = 0, |
328 | HDMI_AUDIO_LAYOUT_8CH = 1 | 288 | HDMI_AUDIO_LAYOUT_8CH = 1 |
@@ -381,33 +341,10 @@ enum hdmi_audio_i2s_config { | |||
381 | HDMI_AUDIO_I2S_WS_POLARIT_YLOW_IS_RIGHT = 1, | 341 | HDMI_AUDIO_I2S_WS_POLARIT_YLOW_IS_RIGHT = 1, |
382 | HDMI_AUDIO_I2S_MSB_SHIFTED_FIRST = 0, | 342 | HDMI_AUDIO_I2S_MSB_SHIFTED_FIRST = 0, |
383 | HDMI_AUDIO_I2S_LSB_SHIFTED_FIRST = 1, | 343 | HDMI_AUDIO_I2S_LSB_SHIFTED_FIRST = 1, |
384 | HDMI_AUDIO_I2S_MAX_WORD_20BITS = 0, | ||
385 | HDMI_AUDIO_I2S_MAX_WORD_24BITS = 1, | ||
386 | HDMI_AUDIO_I2S_CHST_WORD_NOT_SPECIFIED = 0, | ||
387 | HDMI_AUDIO_I2S_CHST_WORD_16_BITS = 1, | ||
388 | HDMI_AUDIO_I2S_CHST_WORD_17_BITS = 6, | ||
389 | HDMI_AUDIO_I2S_CHST_WORD_18_BITS = 2, | ||
390 | HDMI_AUDIO_I2S_CHST_WORD_19_BITS = 4, | ||
391 | HDMI_AUDIO_I2S_CHST_WORD_20_BITS_20MAX = 5, | ||
392 | HDMI_AUDIO_I2S_CHST_WORD_20_BITS_24MAX = 1, | ||
393 | HDMI_AUDIO_I2S_CHST_WORD_21_BITS = 6, | ||
394 | HDMI_AUDIO_I2S_CHST_WORD_22_BITS = 2, | ||
395 | HDMI_AUDIO_I2S_CHST_WORD_23_BITS = 4, | ||
396 | HDMI_AUDIO_I2S_CHST_WORD_24_BITS = 5, | ||
397 | HDMI_AUDIO_I2S_SCK_EDGE_FALLING = 0, | 344 | HDMI_AUDIO_I2S_SCK_EDGE_FALLING = 0, |
398 | HDMI_AUDIO_I2S_SCK_EDGE_RISING = 1, | 345 | HDMI_AUDIO_I2S_SCK_EDGE_RISING = 1, |
399 | HDMI_AUDIO_I2S_VBIT_FOR_PCM = 0, | 346 | HDMI_AUDIO_I2S_VBIT_FOR_PCM = 0, |
400 | HDMI_AUDIO_I2S_VBIT_FOR_COMPRESSED = 1, | 347 | HDMI_AUDIO_I2S_VBIT_FOR_COMPRESSED = 1, |
401 | HDMI_AUDIO_I2S_INPUT_LENGTH_NA = 0, | ||
402 | HDMI_AUDIO_I2S_INPUT_LENGTH_16 = 2, | ||
403 | HDMI_AUDIO_I2S_INPUT_LENGTH_17 = 12, | ||
404 | HDMI_AUDIO_I2S_INPUT_LENGTH_18 = 4, | ||
405 | HDMI_AUDIO_I2S_INPUT_LENGTH_19 = 8, | ||
406 | HDMI_AUDIO_I2S_INPUT_LENGTH_20 = 10, | ||
407 | HDMI_AUDIO_I2S_INPUT_LENGTH_21 = 13, | ||
408 | HDMI_AUDIO_I2S_INPUT_LENGTH_22 = 5, | ||
409 | HDMI_AUDIO_I2S_INPUT_LENGTH_23 = 9, | ||
410 | HDMI_AUDIO_I2S_INPUT_LENGTH_24 = 11, | ||
411 | HDMI_AUDIO_I2S_FIRST_BIT_SHIFT = 0, | 348 | HDMI_AUDIO_I2S_FIRST_BIT_SHIFT = 0, |
412 | HDMI_AUDIO_I2S_FIRST_BIT_NO_SHIFT = 1, | 349 | HDMI_AUDIO_I2S_FIRST_BIT_NO_SHIFT = 1, |
413 | HDMI_AUDIO_I2S_SD0_EN = 1, | 350 | HDMI_AUDIO_I2S_SD0_EN = 1, |
@@ -436,20 +373,6 @@ struct hdmi_core_video_config { | |||
436 | enum hdmi_core_tclkselclkmult tclk_sel_clkmult; | 373 | enum hdmi_core_tclkselclkmult tclk_sel_clkmult; |
437 | }; | 374 | }; |
438 | 375 | ||
439 | /* | ||
440 | * Refer to section 8.2 in HDMI 1.3 specification for | ||
441 | * details about infoframe databytes | ||
442 | */ | ||
443 | struct hdmi_core_infoframe_audio { | ||
444 | u8 db1_coding_type; | ||
445 | u8 db1_channel_count; | ||
446 | u8 db2_sample_freq; | ||
447 | u8 db2_sample_size; | ||
448 | u8 db4_channel_alloc; | ||
449 | bool db5_downmix_inh; | ||
450 | u8 db5_lsv; /* Level shift values for downmix */ | ||
451 | }; | ||
452 | |||
453 | struct hdmi_core_packet_enable_repeat { | 376 | struct hdmi_core_packet_enable_repeat { |
454 | u32 audio_pkt; | 377 | u32 audio_pkt; |
455 | u32 audio_pkt_repeat; | 378 | u32 audio_pkt_repeat; |
@@ -502,7 +425,7 @@ struct hdmi_core_audio_i2s_config { | |||
502 | 425 | ||
503 | struct hdmi_core_audio_config { | 426 | struct hdmi_core_audio_config { |
504 | struct hdmi_core_audio_i2s_config i2s_cfg; | 427 | struct hdmi_core_audio_i2s_config i2s_cfg; |
505 | enum hdmi_core_audio_sample_freq freq_sample; | 428 | u32 freq_sample; |
506 | bool fs_override; | 429 | bool fs_override; |
507 | u32 n; | 430 | u32 n; |
508 | u32 cts; | 431 | u32 cts; |
@@ -522,7 +445,7 @@ struct hdmi_core_audio_config { | |||
522 | int hdmi_config_audio_acr(struct hdmi_ip_data *ip_data, | 445 | int hdmi_config_audio_acr(struct hdmi_ip_data *ip_data, |
523 | u32 sample_freq, u32 *n, u32 *cts); | 446 | u32 sample_freq, u32 *n, u32 *cts); |
524 | void hdmi_core_audio_infoframe_config(struct hdmi_ip_data *ip_data, | 447 | void hdmi_core_audio_infoframe_config(struct hdmi_ip_data *ip_data, |
525 | struct hdmi_core_infoframe_audio *info_aud); | 448 | struct snd_cea_861_aud_if *info_aud); |
526 | void hdmi_core_audio_config(struct hdmi_ip_data *ip_data, | 449 | void hdmi_core_audio_config(struct hdmi_ip_data *ip_data, |
527 | struct hdmi_core_audio_config *cfg); | 450 | struct hdmi_core_audio_config *cfg); |
528 | void hdmi_wp_audio_config_dma(struct hdmi_ip_data *ip_data, | 451 | void hdmi_wp_audio_config_dma(struct hdmi_ip_data *ip_data, |