diff options
author | Ville Syrjälä <ville.syrjala@nokia.com> | 2010-03-04 18:13:11 -0500 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@nokia.com> | 2010-08-03 08:18:45 -0400 |
commit | 75c7d59daf502a4eb040e181120fb83b4a8c0719 (patch) | |
tree | b60717bd00b95a8ac2cad41866cea2f0be47d8d9 /drivers/video/omap2/dss | |
parent | a74b260502c0911d14bafb76a20f699b6caa2e91 (diff) |
OMAP: DSS2: clear spurious SYNC_LOST_DIGIT interrupts
When DSS transitions from off mode to on VENC may generate a spurious
SYNC_LOST_DIGIT error. Just ack it when restoring the context. Also
restore IRQENABLE last to avoid triggering interrupts before the
context is fully restored.
Signed-off-by: Ville Syrjälä <ville.syrjala@nokia.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Diffstat (limited to 'drivers/video/omap2/dss')
-rw-r--r-- | drivers/video/omap2/dss/dispc.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index e777e352dbcd..b8c16034f1ea 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c | |||
@@ -335,7 +335,7 @@ void dispc_save_context(void) | |||
335 | void dispc_restore_context(void) | 335 | void dispc_restore_context(void) |
336 | { | 336 | { |
337 | RR(SYSCONFIG); | 337 | RR(SYSCONFIG); |
338 | RR(IRQENABLE); | 338 | /*RR(IRQENABLE);*/ |
339 | /*RR(CONTROL);*/ | 339 | /*RR(CONTROL);*/ |
340 | RR(CONFIG); | 340 | RR(CONFIG); |
341 | RR(DEFAULT_COLOR0); | 341 | RR(DEFAULT_COLOR0); |
@@ -472,6 +472,15 @@ void dispc_restore_context(void) | |||
472 | 472 | ||
473 | /* enable last, because LCD & DIGIT enable are here */ | 473 | /* enable last, because LCD & DIGIT enable are here */ |
474 | RR(CONTROL); | 474 | RR(CONTROL); |
475 | |||
476 | /* clear spurious SYNC_LOST_DIGIT interrupts */ | ||
477 | dispc_write_reg(DISPC_IRQSTATUS, DISPC_IRQ_SYNC_LOST_DIGIT); | ||
478 | |||
479 | /* | ||
480 | * enable last so IRQs won't trigger before | ||
481 | * the context is fully restored | ||
482 | */ | ||
483 | RR(IRQENABLE); | ||
475 | } | 484 | } |
476 | 485 | ||
477 | #undef SR | 486 | #undef SR |