diff options
author | Ricardo Neri <ricardo.neri@ti.com> | 2011-03-23 05:04:55 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-05-19 08:18:00 -0400 |
commit | 5d8dbe4aa986526f9096bcdb27679c37f5c7b194 (patch) | |
tree | 89784bd55c435ad685475ad9422d35803b461b88 /drivers/video/omap2/dss/hdmi.h | |
parent | 72e91ace30d0bdfe3140011f65cdcd6e46215f71 (diff) |
OMAP4: DSS2: HDMI: Add enums and structures for audio
Add enurations and structures for audio configuration. This includes
enumerations for the Audio InfoFrame, I2S, audio FIFO and audio core.
Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/hdmi.h')
-rw-r--r-- | drivers/video/omap2/dss/hdmi.h | 220 |
1 files changed, 218 insertions, 2 deletions
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h index 4d385f67ca43..c885f9cb0659 100644 --- a/drivers/video/omap2/dss/hdmi.h +++ b/drivers/video/omap2/dss/hdmi.h | |||
@@ -48,6 +48,10 @@ struct hdmi_reg { u16 idx; }; | |||
48 | #define HDMI_WP_VIDEO_TIMING_H HDMI_WP_REG(0x68) | 48 | #define HDMI_WP_VIDEO_TIMING_H HDMI_WP_REG(0x68) |
49 | #define HDMI_WP_VIDEO_TIMING_V HDMI_WP_REG(0x6C) | 49 | #define HDMI_WP_VIDEO_TIMING_V HDMI_WP_REG(0x6C) |
50 | #define HDMI_WP_WP_CLK HDMI_WP_REG(0x70) | 50 | #define HDMI_WP_WP_CLK HDMI_WP_REG(0x70) |
51 | #define HDMI_WP_AUDIO_CFG HDMI_WP_REG(0x80) | ||
52 | #define HDMI_WP_AUDIO_CFG2 HDMI_WP_REG(0x84) | ||
53 | #define HDMI_WP_AUDIO_CTRL HDMI_WP_REG(0x88) | ||
54 | #define HDMI_WP_AUDIO_DATA HDMI_WP_REG(0x8C) | ||
51 | 55 | ||
52 | /* HDMI IP Core System */ | 56 | /* HDMI IP Core System */ |
53 | #define HDMI_CORE_SYS_REG(idx) HDMI_REG(HDMI_CORE_SYS + idx) | 57 | #define HDMI_CORE_SYS_REG(idx) HDMI_REG(HDMI_CORE_SYS + idx) |
@@ -105,6 +109,8 @@ struct hdmi_reg { u16 idx; }; | |||
105 | #define HDMI_CORE_AV_AVI_DBYTE_NELEMS HDMI_CORE_AV_REG(15) | 109 | #define HDMI_CORE_AV_AVI_DBYTE_NELEMS HDMI_CORE_AV_REG(15) |
106 | #define HDMI_CORE_AV_SPD_DBYTE HDMI_CORE_AV_REG(0x190) | 110 | #define HDMI_CORE_AV_SPD_DBYTE HDMI_CORE_AV_REG(0x190) |
107 | #define HDMI_CORE_AV_SPD_DBYTE_NELEMS HDMI_CORE_AV_REG(27) | 111 | #define HDMI_CORE_AV_SPD_DBYTE_NELEMS HDMI_CORE_AV_REG(27) |
112 | #define HDMI_CORE_AV_AUD_DBYTE(n) HDMI_CORE_AV_REG(n * 4 + 0x210) | ||
113 | #define HDMI_CORE_AV_AUD_DBYTE_NELEMS HDMI_CORE_AV_REG(10) | ||
108 | #define HDMI_CORE_AV_MPEG_DBYTE HDMI_CORE_AV_REG(0x290) | 114 | #define HDMI_CORE_AV_MPEG_DBYTE HDMI_CORE_AV_REG(0x290) |
109 | #define HDMI_CORE_AV_MPEG_DBYTE_NELEMS HDMI_CORE_AV_REG(27) | 115 | #define HDMI_CORE_AV_MPEG_DBYTE_NELEMS HDMI_CORE_AV_REG(27) |
110 | #define HDMI_CORE_AV_GEN_DBYTE HDMI_CORE_AV_REG(0x300) | 116 | #define HDMI_CORE_AV_GEN_DBYTE HDMI_CORE_AV_REG(0x300) |
@@ -153,6 +159,10 @@ struct hdmi_reg { u16 idx; }; | |||
153 | #define HDMI_CORE_AV_SPD_VERS HDMI_CORE_AV_REG(0x184) | 159 | #define HDMI_CORE_AV_SPD_VERS HDMI_CORE_AV_REG(0x184) |
154 | #define HDMI_CORE_AV_SPD_LEN HDMI_CORE_AV_REG(0x188) | 160 | #define HDMI_CORE_AV_SPD_LEN HDMI_CORE_AV_REG(0x188) |
155 | #define HDMI_CORE_AV_SPD_CHSUM HDMI_CORE_AV_REG(0x18C) | 161 | #define HDMI_CORE_AV_SPD_CHSUM HDMI_CORE_AV_REG(0x18C) |
162 | #define HDMI_CORE_AV_AUDIO_TYPE HDMI_CORE_AV_REG(0x200) | ||
163 | #define HDMI_CORE_AV_AUDIO_VERS HDMI_CORE_AV_REG(0x204) | ||
164 | #define HDMI_CORE_AV_AUDIO_LEN HDMI_CORE_AV_REG(0x208) | ||
165 | #define HDMI_CORE_AV_AUDIO_CHSUM HDMI_CORE_AV_REG(0x20C) | ||
156 | #define HDMI_CORE_AV_MPEG_TYPE HDMI_CORE_AV_REG(0x280) | 166 | #define HDMI_CORE_AV_MPEG_TYPE HDMI_CORE_AV_REG(0x280) |
157 | #define HDMI_CORE_AV_MPEG_VERS HDMI_CORE_AV_REG(0x284) | 167 | #define HDMI_CORE_AV_MPEG_VERS HDMI_CORE_AV_REG(0x284) |
158 | #define HDMI_CORE_AV_MPEG_LEN HDMI_CORE_AV_REG(0x288) | 168 | #define HDMI_CORE_AV_MPEG_LEN HDMI_CORE_AV_REG(0x288) |
@@ -272,7 +282,7 @@ enum hdmi_core_packet_ctrl { | |||
272 | HDMI_PACKETREPEATOFF = 0 | 282 | HDMI_PACKETREPEATOFF = 0 |
273 | }; | 283 | }; |
274 | 284 | ||
275 | /* INFOFRAME_AVI_ definitions */ | 285 | /* INFOFRAME_AVI_ and INFOFRAME_AUDIO_ definitions */ |
276 | enum hdmi_core_infoframe { | 286 | enum hdmi_core_infoframe { |
277 | HDMI_INFOFRAME_AVI_DB1Y_RGB = 0, | 287 | HDMI_INFOFRAME_AVI_DB1Y_RGB = 0, |
278 | HDMI_INFOFRAME_AVI_DB1Y_YUV422 = 1, | 288 | HDMI_INFOFRAME_AVI_DB1Y_YUV422 = 1, |
@@ -317,7 +327,36 @@ enum hdmi_core_infoframe { | |||
317 | HDMI_INFOFRAME_AVI_DB5PR_7 = 6, | 327 | HDMI_INFOFRAME_AVI_DB5PR_7 = 6, |
318 | HDMI_INFOFRAME_AVI_DB5PR_8 = 7, | 328 | HDMI_INFOFRAME_AVI_DB5PR_8 = 7, |
319 | HDMI_INFOFRAME_AVI_DB5PR_9 = 8, | 329 | HDMI_INFOFRAME_AVI_DB5PR_9 = 8, |
320 | HDMI_INFOFRAME_AVI_DB5PR_10 = 9 | 330 | HDMI_INFOFRAME_AVI_DB5PR_10 = 9, |
331 | HDMI_INFOFRAME_AUDIO_DB1CT_FROM_STREAM = 0, | ||
332 | HDMI_INFOFRAME_AUDIO_DB1CT_IEC60958 = 1, | ||
333 | HDMI_INFOFRAME_AUDIO_DB1CT_AC3 = 2, | ||
334 | HDMI_INFOFRAME_AUDIO_DB1CT_MPEG1 = 3, | ||
335 | HDMI_INFOFRAME_AUDIO_DB1CT_MP3 = 4, | ||
336 | HDMI_INFOFRAME_AUDIO_DB1CT_MPEG2_MULTICH = 5, | ||
337 | HDMI_INFOFRAME_AUDIO_DB1CT_AAC = 6, | ||
338 | HDMI_INFOFRAME_AUDIO_DB1CT_DTS = 7, | ||
339 | HDMI_INFOFRAME_AUDIO_DB1CT_ATRAC = 8, | ||
340 | HDMI_INFOFRAME_AUDIO_DB1CT_ONEBIT = 9, | ||
341 | HDMI_INFOFRAME_AUDIO_DB1CT_DOLBY_DIGITAL_PLUS = 10, | ||
342 | HDMI_INFOFRAME_AUDIO_DB1CT_DTS_HD = 11, | ||
343 | HDMI_INFOFRAME_AUDIO_DB1CT_MAT = 12, | ||
344 | HDMI_INFOFRAME_AUDIO_DB1CT_DST = 13, | ||
345 | HDMI_INFOFRAME_AUDIO_DB1CT_WMA_PRO = 14, | ||
346 | HDMI_INFOFRAME_AUDIO_DB2SF_FROM_STREAM = 0, | ||
347 | HDMI_INFOFRAME_AUDIO_DB2SF_32000 = 1, | ||
348 | HDMI_INFOFRAME_AUDIO_DB2SF_44100 = 2, | ||
349 | HDMI_INFOFRAME_AUDIO_DB2SF_48000 = 3, | ||
350 | HDMI_INFOFRAME_AUDIO_DB2SF_88200 = 4, | ||
351 | HDMI_INFOFRAME_AUDIO_DB2SF_96000 = 5, | ||
352 | HDMI_INFOFRAME_AUDIO_DB2SF_176400 = 6, | ||
353 | HDMI_INFOFRAME_AUDIO_DB2SF_192000 = 7, | ||
354 | HDMI_INFOFRAME_AUDIO_DB2SS_FROM_STREAM = 0, | ||
355 | HDMI_INFOFRAME_AUDIO_DB2SS_16BIT = 1, | ||
356 | HDMI_INFOFRAME_AUDIO_DB2SS_20BIT = 2, | ||
357 | HDMI_INFOFRAME_AUDIO_DB2SS_24BIT = 3, | ||
358 | HDMI_INFOFRAME_AUDIO_DB5_DM_INH_PERMITTED = 0, | ||
359 | HDMI_INFOFRAME_AUDIO_DB5_DM_INH_PROHIBITED = 1 | ||
321 | }; | 360 | }; |
322 | 361 | ||
323 | enum hdmi_packing_mode { | 362 | enum hdmi_packing_mode { |
@@ -327,6 +366,121 @@ enum hdmi_packing_mode { | |||
327 | HDMI_PACK_ALREADYPACKED = 7 | 366 | HDMI_PACK_ALREADYPACKED = 7 |
328 | }; | 367 | }; |
329 | 368 | ||
369 | enum hdmi_core_audio_sample_freq { | ||
370 | HDMI_AUDIO_FS_32000 = 0x3, | ||
371 | HDMI_AUDIO_FS_44100 = 0x0, | ||
372 | HDMI_AUDIO_FS_48000 = 0x2, | ||
373 | HDMI_AUDIO_FS_88200 = 0x8, | ||
374 | HDMI_AUDIO_FS_96000 = 0xA, | ||
375 | HDMI_AUDIO_FS_176400 = 0xC, | ||
376 | HDMI_AUDIO_FS_192000 = 0xE, | ||
377 | HDMI_AUDIO_FS_NOT_INDICATED = 0x1 | ||
378 | }; | ||
379 | |||
380 | enum hdmi_core_audio_layout { | ||
381 | HDMI_AUDIO_LAYOUT_2CH = 0, | ||
382 | HDMI_AUDIO_LAYOUT_8CH = 1 | ||
383 | }; | ||
384 | |||
385 | enum hdmi_core_cts_mode { | ||
386 | HDMI_AUDIO_CTS_MODE_HW = 0, | ||
387 | HDMI_AUDIO_CTS_MODE_SW = 1 | ||
388 | }; | ||
389 | |||
390 | enum hdmi_stereo_channels { | ||
391 | HDMI_AUDIO_STEREO_NOCHANNELS = 0, | ||
392 | HDMI_AUDIO_STEREO_ONECHANNEL = 1, | ||
393 | HDMI_AUDIO_STEREO_TWOCHANNELS = 2, | ||
394 | HDMI_AUDIO_STEREO_THREECHANNELS = 3, | ||
395 | HDMI_AUDIO_STEREO_FOURCHANNELS = 4 | ||
396 | }; | ||
397 | |||
398 | enum hdmi_audio_type { | ||
399 | HDMI_AUDIO_TYPE_LPCM = 0, | ||
400 | HDMI_AUDIO_TYPE_IEC = 1 | ||
401 | }; | ||
402 | |||
403 | enum hdmi_audio_justify { | ||
404 | HDMI_AUDIO_JUSTIFY_LEFT = 0, | ||
405 | HDMI_AUDIO_JUSTIFY_RIGHT = 1 | ||
406 | }; | ||
407 | |||
408 | enum hdmi_audio_sample_order { | ||
409 | HDMI_AUDIO_SAMPLE_RIGHT_FIRST = 0, | ||
410 | HDMI_AUDIO_SAMPLE_LEFT_FIRST = 1 | ||
411 | }; | ||
412 | |||
413 | enum hdmi_audio_samples_perword { | ||
414 | HDMI_AUDIO_ONEWORD_ONESAMPLE = 0, | ||
415 | HDMI_AUDIO_ONEWORD_TWOSAMPLES = 1 | ||
416 | }; | ||
417 | |||
418 | enum hdmi_audio_sample_size { | ||
419 | HDMI_AUDIO_SAMPLE_16BITS = 0, | ||
420 | HDMI_AUDIO_SAMPLE_24BITS = 1 | ||
421 | }; | ||
422 | |||
423 | enum hdmi_audio_transf_mode { | ||
424 | HDMI_AUDIO_TRANSF_DMA = 0, | ||
425 | HDMI_AUDIO_TRANSF_IRQ = 1 | ||
426 | }; | ||
427 | |||
428 | enum hdmi_audio_blk_strt_end_sig { | ||
429 | HDMI_AUDIO_BLOCK_SIG_STARTEND_ON = 0, | ||
430 | HDMI_AUDIO_BLOCK_SIG_STARTEND_OFF = 1 | ||
431 | }; | ||
432 | |||
433 | enum hdmi_audio_i2s_config { | ||
434 | HDMI_AUDIO_I2S_WS_POLARITY_LOW_IS_LEFT = 0, | ||
435 | HDMI_AUDIO_I2S_WS_POLARIT_YLOW_IS_RIGHT = 1, | ||
436 | HDMI_AUDIO_I2S_MSB_SHIFTED_FIRST = 0, | ||
437 | HDMI_AUDIO_I2S_LSB_SHIFTED_FIRST = 1, | ||
438 | HDMI_AUDIO_I2S_MAX_WORD_20BITS = 0, | ||
439 | HDMI_AUDIO_I2S_MAX_WORD_24BITS = 1, | ||
440 | HDMI_AUDIO_I2S_CHST_WORD_NOT_SPECIFIED = 0, | ||
441 | HDMI_AUDIO_I2S_CHST_WORD_16_BITS = 1, | ||
442 | HDMI_AUDIO_I2S_CHST_WORD_17_BITS = 6, | ||
443 | HDMI_AUDIO_I2S_CHST_WORD_18_BITS = 2, | ||
444 | HDMI_AUDIO_I2S_CHST_WORD_19_BITS = 4, | ||
445 | HDMI_AUDIO_I2S_CHST_WORD_20_BITS_20MAX = 5, | ||
446 | HDMI_AUDIO_I2S_CHST_WORD_20_BITS_24MAX = 1, | ||
447 | HDMI_AUDIO_I2S_CHST_WORD_21_BITS = 6, | ||
448 | HDMI_AUDIO_I2S_CHST_WORD_22_BITS = 2, | ||
449 | HDMI_AUDIO_I2S_CHST_WORD_23_BITS = 4, | ||
450 | HDMI_AUDIO_I2S_CHST_WORD_24_BITS = 5, | ||
451 | HDMI_AUDIO_I2S_SCK_EDGE_FALLING = 0, | ||
452 | HDMI_AUDIO_I2S_SCK_EDGE_RISING = 1, | ||
453 | HDMI_AUDIO_I2S_VBIT_FOR_PCM = 0, | ||
454 | HDMI_AUDIO_I2S_VBIT_FOR_COMPRESSED = 1, | ||
455 | HDMI_AUDIO_I2S_INPUT_LENGTH_NA = 0, | ||
456 | HDMI_AUDIO_I2S_INPUT_LENGTH_16 = 2, | ||
457 | HDMI_AUDIO_I2S_INPUT_LENGTH_17 = 12, | ||
458 | HDMI_AUDIO_I2S_INPUT_LENGTH_18 = 4, | ||
459 | HDMI_AUDIO_I2S_INPUT_LENGTH_19 = 8, | ||
460 | HDMI_AUDIO_I2S_INPUT_LENGTH_20 = 10, | ||
461 | HDMI_AUDIO_I2S_INPUT_LENGTH_21 = 13, | ||
462 | HDMI_AUDIO_I2S_INPUT_LENGTH_22 = 5, | ||
463 | HDMI_AUDIO_I2S_INPUT_LENGTH_23 = 9, | ||
464 | HDMI_AUDIO_I2S_INPUT_LENGTH_24 = 11, | ||
465 | HDMI_AUDIO_I2S_FIRST_BIT_SHIFT = 0, | ||
466 | HDMI_AUDIO_I2S_FIRST_BIT_NO_SHIFT = 1, | ||
467 | HDMI_AUDIO_I2S_SD0_EN = 1, | ||
468 | HDMI_AUDIO_I2S_SD1_EN = 1 << 1, | ||
469 | HDMI_AUDIO_I2S_SD2_EN = 1 << 2, | ||
470 | HDMI_AUDIO_I2S_SD3_EN = 1 << 3, | ||
471 | }; | ||
472 | |||
473 | enum hdmi_audio_mclk_mode { | ||
474 | HDMI_AUDIO_MCLK_128FS = 0, | ||
475 | HDMI_AUDIO_MCLK_256FS = 1, | ||
476 | HDMI_AUDIO_MCLK_384FS = 2, | ||
477 | HDMI_AUDIO_MCLK_512FS = 3, | ||
478 | HDMI_AUDIO_MCLK_768FS = 4, | ||
479 | HDMI_AUDIO_MCLK_1024FS = 5, | ||
480 | HDMI_AUDIO_MCLK_1152FS = 6, | ||
481 | HDMI_AUDIO_MCLK_192FS = 7 | ||
482 | }; | ||
483 | |||
330 | struct hdmi_core_video_config { | 484 | struct hdmi_core_video_config { |
331 | enum hdmi_core_inputbus_width ip_bus_width; | 485 | enum hdmi_core_inputbus_width ip_bus_width; |
332 | enum hdmi_core_dither_trunc op_dither_truc; | 486 | enum hdmi_core_dither_trunc op_dither_truc; |
@@ -376,6 +530,19 @@ struct hdmi_core_infoframe_avi { | |||
376 | u16 db12_13_pixel_sofright; | 530 | u16 db12_13_pixel_sofright; |
377 | /* Pixel number start of right bar */ | 531 | /* Pixel number start of right bar */ |
378 | }; | 532 | }; |
533 | /* | ||
534 | * Refer to section 8.2 in HDMI 1.3 specification for | ||
535 | * details about infoframe databytes | ||
536 | */ | ||
537 | struct hdmi_core_infoframe_audio { | ||
538 | u8 db1_coding_type; | ||
539 | u8 db1_channel_count; | ||
540 | u8 db2_sample_freq; | ||
541 | u8 db2_sample_size; | ||
542 | u8 db4_channel_alloc; | ||
543 | bool db5_downmix_inh; | ||
544 | u8 db5_lsv; /* Level shift values for downmix */ | ||
545 | }; | ||
379 | 546 | ||
380 | struct hdmi_core_packet_enable_repeat { | 547 | struct hdmi_core_packet_enable_repeat { |
381 | u32 audio_pkt; | 548 | u32 audio_pkt; |
@@ -412,4 +579,53 @@ struct hdmi_config { | |||
412 | struct hdmi_cm cm; | 579 | struct hdmi_cm cm; |
413 | }; | 580 | }; |
414 | 581 | ||
582 | struct hdmi_audio_format { | ||
583 | enum hdmi_stereo_channels stereo_channels; | ||
584 | u8 active_chnnls_msk; | ||
585 | enum hdmi_audio_type type; | ||
586 | enum hdmi_audio_justify justification; | ||
587 | enum hdmi_audio_sample_order sample_order; | ||
588 | enum hdmi_audio_samples_perword samples_per_word; | ||
589 | enum hdmi_audio_sample_size sample_size; | ||
590 | enum hdmi_audio_blk_strt_end_sig en_sig_blk_strt_end; | ||
591 | }; | ||
592 | |||
593 | struct hdmi_audio_dma { | ||
594 | u8 transfer_size; | ||
595 | u8 block_size; | ||
596 | enum hdmi_audio_transf_mode mode; | ||
597 | u16 fifo_threshold; | ||
598 | }; | ||
599 | |||
600 | struct hdmi_core_audio_i2s_config { | ||
601 | u8 word_max_length; | ||
602 | u8 word_length; | ||
603 | u8 in_length_bits; | ||
604 | u8 justification; | ||
605 | u8 en_high_bitrate_aud; | ||
606 | u8 sck_edge_mode; | ||
607 | u8 cbit_order; | ||
608 | u8 vbit; | ||
609 | u8 ws_polarity; | ||
610 | u8 direction; | ||
611 | u8 shift; | ||
612 | u8 active_sds; | ||
613 | }; | ||
614 | |||
615 | struct hdmi_core_audio_config { | ||
616 | struct hdmi_core_audio_i2s_config i2s_cfg; | ||
617 | enum hdmi_core_audio_sample_freq freq_sample; | ||
618 | bool fs_override; | ||
619 | u32 n; | ||
620 | u32 cts; | ||
621 | u32 aud_par_busclk; | ||
622 | enum hdmi_core_audio_layout layout; | ||
623 | enum hdmi_core_cts_mode cts_mode; | ||
624 | bool use_mclk; | ||
625 | enum hdmi_audio_mclk_mode mclk_mode; | ||
626 | bool en_acr_pkt; | ||
627 | bool en_dsd_audio; | ||
628 | bool en_parallel_aud_input; | ||
629 | bool en_spdif; | ||
630 | }; | ||
415 | #endif | 631 | #endif |