diff options
author | Tomi Valkeinen <tomi.valkeinen@nokia.com> | 2009-12-17 07:35:21 -0500 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@nokia.com> | 2010-01-08 08:32:18 -0500 |
commit | dfc0fd8d8850ef11951ba6c251e06096d1b5a0bd (patch) | |
tree | b80a85226218abbb562c93b7777de8bbda2c5db2 /drivers/video/omap2/dss/dsi.c | |
parent | ff90a3488d98a63bf24bff37f77a9a37b00e7a54 (diff) |
OMAP: DSS2: Collect interrupt statistics
Collect interrupt statistics, printable via debugfs:
debugfs/omapdss/dispc_irq
debugfs/omapdss/dsi_irq
The counters are reset when printed.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Diffstat (limited to 'drivers/video/omap2/dss/dsi.c')
-rw-r--r-- | drivers/video/omap2/dss/dsi.c | 125 |
1 files changed, 125 insertions, 0 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index e65056317a28..03f85df70749 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
@@ -204,6 +204,14 @@ struct dsi_update_region { | |||
204 | struct omap_dss_device *device; | 204 | struct omap_dss_device *device; |
205 | }; | 205 | }; |
206 | 206 | ||
207 | struct dsi_irq_stats { | ||
208 | unsigned long last_reset; | ||
209 | unsigned irq_count; | ||
210 | unsigned dsi_irqs[32]; | ||
211 | unsigned vc_irqs[4][32]; | ||
212 | unsigned cio_irqs[32]; | ||
213 | }; | ||
214 | |||
207 | static struct | 215 | static struct |
208 | { | 216 | { |
209 | void __iomem *base; | 217 | void __iomem *base; |
@@ -258,6 +266,11 @@ static struct | |||
258 | #endif | 266 | #endif |
259 | int debug_read; | 267 | int debug_read; |
260 | int debug_write; | 268 | int debug_write; |
269 | |||
270 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS | ||
271 | spinlock_t irq_stats_lock; | ||
272 | struct dsi_irq_stats irq_stats; | ||
273 | #endif | ||
261 | } dsi; | 274 | } dsi; |
262 | 275 | ||
263 | #ifdef DEBUG | 276 | #ifdef DEBUG |
@@ -528,6 +541,12 @@ void dsi_irq_handler(void) | |||
528 | 541 | ||
529 | irqstatus = dsi_read_reg(DSI_IRQSTATUS); | 542 | irqstatus = dsi_read_reg(DSI_IRQSTATUS); |
530 | 543 | ||
544 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS | ||
545 | spin_lock(&dsi.irq_stats_lock); | ||
546 | dsi.irq_stats.irq_count++; | ||
547 | dss_collect_irq_stats(irqstatus, dsi.irq_stats.dsi_irqs); | ||
548 | #endif | ||
549 | |||
531 | if (irqstatus & DSI_IRQ_ERROR_MASK) { | 550 | if (irqstatus & DSI_IRQ_ERROR_MASK) { |
532 | DSSERR("DSI error, irqstatus %x\n", irqstatus); | 551 | DSSERR("DSI error, irqstatus %x\n", irqstatus); |
533 | print_irq_status(irqstatus); | 552 | print_irq_status(irqstatus); |
@@ -549,6 +568,10 @@ void dsi_irq_handler(void) | |||
549 | 568 | ||
550 | vcstatus = dsi_read_reg(DSI_VC_IRQSTATUS(i)); | 569 | vcstatus = dsi_read_reg(DSI_VC_IRQSTATUS(i)); |
551 | 570 | ||
571 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS | ||
572 | dss_collect_irq_stats(vcstatus, dsi.irq_stats.vc_irqs[i]); | ||
573 | #endif | ||
574 | |||
552 | if (vcstatus & DSI_VC_IRQ_BTA) | 575 | if (vcstatus & DSI_VC_IRQ_BTA) |
553 | complete(&dsi.bta_completion); | 576 | complete(&dsi.bta_completion); |
554 | 577 | ||
@@ -568,6 +591,10 @@ void dsi_irq_handler(void) | |||
568 | if (irqstatus & DSI_IRQ_COMPLEXIO_ERR) { | 591 | if (irqstatus & DSI_IRQ_COMPLEXIO_ERR) { |
569 | ciostatus = dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS); | 592 | ciostatus = dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS); |
570 | 593 | ||
594 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS | ||
595 | dss_collect_irq_stats(ciostatus, dsi.irq_stats.cio_irqs); | ||
596 | #endif | ||
597 | |||
571 | dsi_write_reg(DSI_COMPLEXIO_IRQ_STATUS, ciostatus); | 598 | dsi_write_reg(DSI_COMPLEXIO_IRQ_STATUS, ciostatus); |
572 | /* flush posted write */ | 599 | /* flush posted write */ |
573 | dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS); | 600 | dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS); |
@@ -579,6 +606,10 @@ void dsi_irq_handler(void) | |||
579 | dsi_write_reg(DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); | 606 | dsi_write_reg(DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); |
580 | /* flush posted write */ | 607 | /* flush posted write */ |
581 | dsi_read_reg(DSI_IRQSTATUS); | 608 | dsi_read_reg(DSI_IRQSTATUS); |
609 | |||
610 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS | ||
611 | spin_unlock(&dsi.irq_stats_lock); | ||
612 | #endif | ||
582 | } | 613 | } |
583 | 614 | ||
584 | 615 | ||
@@ -1226,6 +1257,95 @@ void dsi_dump_clocks(struct seq_file *s) | |||
1226 | enable_clocks(0); | 1257 | enable_clocks(0); |
1227 | } | 1258 | } |
1228 | 1259 | ||
1260 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS | ||
1261 | void dsi_dump_irqs(struct seq_file *s) | ||
1262 | { | ||
1263 | unsigned long flags; | ||
1264 | struct dsi_irq_stats stats; | ||
1265 | |||
1266 | spin_lock_irqsave(&dsi.irq_stats_lock, flags); | ||
1267 | |||
1268 | stats = dsi.irq_stats; | ||
1269 | memset(&dsi.irq_stats, 0, sizeof(dsi.irq_stats)); | ||
1270 | dsi.irq_stats.last_reset = jiffies; | ||
1271 | |||
1272 | spin_unlock_irqrestore(&dsi.irq_stats_lock, flags); | ||
1273 | |||
1274 | seq_printf(s, "period %u ms\n", | ||
1275 | jiffies_to_msecs(jiffies - stats.last_reset)); | ||
1276 | |||
1277 | seq_printf(s, "irqs %d\n", stats.irq_count); | ||
1278 | #define PIS(x) \ | ||
1279 | seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]); | ||
1280 | |||
1281 | seq_printf(s, "-- DSI interrupts --\n"); | ||
1282 | PIS(VC0); | ||
1283 | PIS(VC1); | ||
1284 | PIS(VC2); | ||
1285 | PIS(VC3); | ||
1286 | PIS(WAKEUP); | ||
1287 | PIS(RESYNC); | ||
1288 | PIS(PLL_LOCK); | ||
1289 | PIS(PLL_UNLOCK); | ||
1290 | PIS(PLL_RECALL); | ||
1291 | PIS(COMPLEXIO_ERR); | ||
1292 | PIS(HS_TX_TIMEOUT); | ||
1293 | PIS(LP_RX_TIMEOUT); | ||
1294 | PIS(TE_TRIGGER); | ||
1295 | PIS(ACK_TRIGGER); | ||
1296 | PIS(SYNC_LOST); | ||
1297 | PIS(LDO_POWER_GOOD); | ||
1298 | PIS(TA_TIMEOUT); | ||
1299 | #undef PIS | ||
1300 | |||
1301 | #define PIS(x) \ | ||
1302 | seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \ | ||
1303 | stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \ | ||
1304 | stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \ | ||
1305 | stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \ | ||
1306 | stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]); | ||
1307 | |||
1308 | seq_printf(s, "-- VC interrupts --\n"); | ||
1309 | PIS(CS); | ||
1310 | PIS(ECC_CORR); | ||
1311 | PIS(PACKET_SENT); | ||
1312 | PIS(FIFO_TX_OVF); | ||
1313 | PIS(FIFO_RX_OVF); | ||
1314 | PIS(BTA); | ||
1315 | PIS(ECC_NO_CORR); | ||
1316 | PIS(FIFO_TX_UDF); | ||
1317 | PIS(PP_BUSY_CHANGE); | ||
1318 | #undef PIS | ||
1319 | |||
1320 | #define PIS(x) \ | ||
1321 | seq_printf(s, "%-20s %10d\n", #x, \ | ||
1322 | stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]); | ||
1323 | |||
1324 | seq_printf(s, "-- CIO interrupts --\n"); | ||
1325 | PIS(ERRSYNCESC1); | ||
1326 | PIS(ERRSYNCESC2); | ||
1327 | PIS(ERRSYNCESC3); | ||
1328 | PIS(ERRESC1); | ||
1329 | PIS(ERRESC2); | ||
1330 | PIS(ERRESC3); | ||
1331 | PIS(ERRCONTROL1); | ||
1332 | PIS(ERRCONTROL2); | ||
1333 | PIS(ERRCONTROL3); | ||
1334 | PIS(STATEULPS1); | ||
1335 | PIS(STATEULPS2); | ||
1336 | PIS(STATEULPS3); | ||
1337 | PIS(ERRCONTENTIONLP0_1); | ||
1338 | PIS(ERRCONTENTIONLP1_1); | ||
1339 | PIS(ERRCONTENTIONLP0_2); | ||
1340 | PIS(ERRCONTENTIONLP1_2); | ||
1341 | PIS(ERRCONTENTIONLP0_3); | ||
1342 | PIS(ERRCONTENTIONLP1_3); | ||
1343 | PIS(ULPSACTIVENOT_ALL0); | ||
1344 | PIS(ULPSACTIVENOT_ALL1); | ||
1345 | #undef PIS | ||
1346 | } | ||
1347 | #endif | ||
1348 | |||
1229 | void dsi_dump_regs(struct seq_file *s) | 1349 | void dsi_dump_regs(struct seq_file *s) |
1230 | { | 1350 | { |
1231 | #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(r)) | 1351 | #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(r)) |
@@ -3637,6 +3757,11 @@ int dsi_init(struct platform_device *pdev) | |||
3637 | spin_lock_init(&dsi.errors_lock); | 3757 | spin_lock_init(&dsi.errors_lock); |
3638 | dsi.errors = 0; | 3758 | dsi.errors = 0; |
3639 | 3759 | ||
3760 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS | ||
3761 | spin_lock_init(&dsi.irq_stats_lock); | ||
3762 | dsi.irq_stats.last_reset = jiffies; | ||
3763 | #endif | ||
3764 | |||
3640 | init_completion(&dsi.bta_completion); | 3765 | init_completion(&dsi.bta_completion); |
3641 | init_completion(&dsi.update_completion); | 3766 | init_completion(&dsi.update_completion); |
3642 | 3767 | ||