aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video/omap2/dss/dispc.c
diff options
context:
space:
mode:
authorArchit Taneja <archit@ti.com>2011-05-12 07:56:29 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-05-12 12:30:27 -0400
commit5a8b572d832772722c3b3b7578e7fb968560fcf3 (patch)
tree1d99897d89fcc0f5743cf7503a28a2f6793eed03 /drivers/video/omap2/dss/dispc.c
parent2e868dbe1d24a908fcb4dee0733500fd0aab0bce (diff)
OMAP4: DSS2: DSI: Changes for DSI2 on OMAP4
Introduce DSI2 PLL clock sources needed by LCD2 channel and DSI2 Protocol engine and DISPC Functional clock. Do the following: - Modify dss_get_dsi_clk_source() and dss_select_dsi_clk_source() to take the dsi module number as an argument. - Create debugfs files for dsi2, split the corresponding debugfs functions. - Allow DPI to use these new clock sources. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dispc.c')
-rw-r--r--drivers/video/omap2/dss/dispc.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index df8c9921763b..1a2d835000f8 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -2250,6 +2250,10 @@ unsigned long dispc_fclk_rate(void)
2250 dsidev = dsi_get_dsidev_from_id(0); 2250 dsidev = dsi_get_dsidev_from_id(0);
2251 r = dsi_get_pll_hsdiv_dispc_rate(dsidev); 2251 r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
2252 break; 2252 break;
2253 case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
2254 dsidev = dsi_get_dsidev_from_id(1);
2255 r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
2256 break;
2253 default: 2257 default:
2254 BUG(); 2258 BUG();
2255 } 2259 }
@@ -2276,6 +2280,10 @@ unsigned long dispc_lclk_rate(enum omap_channel channel)
2276 dsidev = dsi_get_dsidev_from_id(0); 2280 dsidev = dsi_get_dsidev_from_id(0);
2277 r = dsi_get_pll_hsdiv_dispc_rate(dsidev); 2281 r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
2278 break; 2282 break;
2283 case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
2284 dsidev = dsi_get_dsidev_from_id(1);
2285 r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
2286 break;
2279 default: 2287 default:
2280 BUG(); 2288 BUG();
2281 } 2289 }