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authorGrazvydas Ignotas <notasas@gmail.com>2009-12-11 14:30:14 -0500
committerTomi Valkeinen <tomi.valkeinen@nokia.com>2010-02-12 05:46:06 -0500
commit9ce4ad0a7b2e21363ce1d1d4c8eb4c2ae213cb59 (patch)
tree08d2e0bec85369348a0a65185cb7e480193897d6 /drivers/video/omap2/displays/panel-tpo-td043mtea1.c
parent751ef159c5600e7ee53e64c3d04f3e2d78908ce5 (diff)
OMAP: DSS: add TPO TD043MTEA1 panel
Add support of TPO TD043MTEA1 TFT LCD panel to DSS2 driver. This panel is used by OMAP3 Pandora device. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Diffstat (limited to 'drivers/video/omap2/displays/panel-tpo-td043mtea1.c')
-rw-r--r--drivers/video/omap2/displays/panel-tpo-td043mtea1.c489
1 files changed, 489 insertions, 0 deletions
diff --git a/drivers/video/omap2/displays/panel-tpo-td043mtea1.c b/drivers/video/omap2/displays/panel-tpo-td043mtea1.c
new file mode 100644
index 000000000000..f297a46f2b1a
--- /dev/null
+++ b/drivers/video/omap2/displays/panel-tpo-td043mtea1.c
@@ -0,0 +1,489 @@
1/*
2 * LCD panel driver for TPO TD043MTEA1
3 *
4 * Author: Gražvydas Ignotas <notasas@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/delay.h>
14#include <linux/spi/spi.h>
15#include <linux/regulator/consumer.h>
16#include <linux/gpio.h>
17#include <linux/err.h>
18
19#include <plat/display.h>
20
21#define TPO_R02_MODE(x) ((x) & 7)
22#define TPO_R02_MODE_800x480 7
23#define TPO_R02_NCLK_RISING BIT(3)
24#define TPO_R02_HSYNC_HIGH BIT(4)
25#define TPO_R02_VSYNC_HIGH BIT(5)
26
27#define TPO_R03_NSTANDBY BIT(0)
28#define TPO_R03_EN_CP_CLK BIT(1)
29#define TPO_R03_EN_VGL_PUMP BIT(2)
30#define TPO_R03_EN_PWM BIT(3)
31#define TPO_R03_DRIVING_CAP_100 BIT(4)
32#define TPO_R03_EN_PRE_CHARGE BIT(6)
33#define TPO_R03_SOFTWARE_CTL BIT(7)
34
35#define TPO_R04_NFLIP_H BIT(0)
36#define TPO_R04_NFLIP_V BIT(1)
37#define TPO_R04_CP_CLK_FREQ_1H BIT(2)
38#define TPO_R04_VGL_FREQ_1H BIT(4)
39
40#define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
41 TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
42 TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
43 TPO_R03_SOFTWARE_CTL)
44
45#define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
46 TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
47
48static const u16 tpo_td043_def_gamma[12] = {
49 106, 200, 289, 375, 460, 543, 625, 705, 785, 864, 942, 1020
50};
51
52struct tpo_td043_device {
53 struct spi_device *spi;
54 struct regulator *vcc_reg;
55 u16 gamma[12];
56 u32 mode;
57 u32 hmirror:1;
58 u32 vmirror:1;
59};
60
61static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
62{
63 struct spi_message m;
64 struct spi_transfer xfer;
65 u16 w;
66 int r;
67
68 spi_message_init(&m);
69
70 memset(&xfer, 0, sizeof(xfer));
71
72 w = ((u16)addr << 10) | (1 << 8) | data;
73 xfer.tx_buf = &w;
74 xfer.bits_per_word = 16;
75 xfer.len = 2;
76 spi_message_add_tail(&xfer, &m);
77
78 r = spi_sync(spi, &m);
79 if (r < 0)
80 dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
81 return r;
82}
83
84static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
85{
86 u8 i, val;
87
88 /* gamma bits [9:8] */
89 for (val = i = 0; i < 4; i++)
90 val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
91 tpo_td043_write(spi, 0x11, val);
92
93 for (val = i = 0; i < 4; i++)
94 val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
95 tpo_td043_write(spi, 0x12, val);
96
97 for (val = i = 0; i < 4; i++)
98 val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
99 tpo_td043_write(spi, 0x13, val);
100
101 /* gamma bits [7:0] */
102 for (val = i = 0; i < 12; i++)
103 tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
104}
105
106static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
107{
108 u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
109 TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
110 if (h)
111 reg4 &= ~TPO_R04_NFLIP_H;
112 if (v)
113 reg4 &= ~TPO_R04_NFLIP_V;
114
115 return tpo_td043_write(spi, 4, reg4);
116}
117
118static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
119{
120 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
121
122 tpo_td043->hmirror = enable;
123 return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
124 tpo_td043->vmirror);
125}
126
127static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
128{
129 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
130
131 return tpo_td043->hmirror;
132}
133
134static ssize_t tpo_td043_vmirror_show(struct device *dev,
135 struct device_attribute *attr, char *buf)
136{
137 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
138
139 return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
140}
141
142static ssize_t tpo_td043_vmirror_store(struct device *dev,
143 struct device_attribute *attr, const char *buf, size_t count)
144{
145 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
146 long val;
147 int ret;
148
149 ret = strict_strtol(buf, 0, &val);
150 if (ret < 0)
151 return ret;
152
153 ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
154 if (ret < 0)
155 return ret;
156
157 tpo_td043->vmirror = val;
158
159 return count;
160}
161
162static ssize_t tpo_td043_mode_show(struct device *dev,
163 struct device_attribute *attr, char *buf)
164{
165 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
166
167 return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
168}
169
170static ssize_t tpo_td043_mode_store(struct device *dev,
171 struct device_attribute *attr, const char *buf, size_t count)
172{
173 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
174 long val;
175 int ret;
176
177 ret = strict_strtol(buf, 0, &val);
178 if (ret != 0 || val & ~7)
179 return -EINVAL;
180
181 tpo_td043->mode = val;
182
183 val |= TPO_R02_NCLK_RISING;
184 tpo_td043_write(tpo_td043->spi, 2, val);
185
186 return count;
187}
188
189static ssize_t tpo_td043_gamma_show(struct device *dev,
190 struct device_attribute *attr, char *buf)
191{
192 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
193 ssize_t len = 0;
194 int ret;
195 int i;
196
197 for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
198 ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
199 tpo_td043->gamma[i]);
200 if (ret < 0)
201 return ret;
202 len += ret;
203 }
204 buf[len - 1] = '\n';
205
206 return len;
207}
208
209static ssize_t tpo_td043_gamma_store(struct device *dev,
210 struct device_attribute *attr, const char *buf, size_t count)
211{
212 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
213 unsigned int g[12];
214 int ret;
215 int i;
216
217 ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
218 &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
219 &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
220
221 if (ret != 12)
222 return -EINVAL;
223
224 for (i = 0; i < 12; i++)
225 tpo_td043->gamma[i] = g[i];
226
227 tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
228
229 return count;
230}
231
232static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
233 tpo_td043_vmirror_show, tpo_td043_vmirror_store);
234static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
235 tpo_td043_mode_show, tpo_td043_mode_store);
236static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
237 tpo_td043_gamma_show, tpo_td043_gamma_store);
238
239static struct attribute *tpo_td043_attrs[] = {
240 &dev_attr_vmirror.attr,
241 &dev_attr_mode.attr,
242 &dev_attr_gamma.attr,
243 NULL,
244};
245
246static struct attribute_group tpo_td043_attr_group = {
247 .attrs = tpo_td043_attrs,
248};
249
250static const struct omap_video_timings tpo_td043_timings = {
251 .x_res = 800,
252 .y_res = 480,
253
254 .pixel_clock = 36000,
255
256 .hsw = 1,
257 .hfp = 68,
258 .hbp = 214,
259
260 .vsw = 1,
261 .vfp = 39,
262 .vbp = 34,
263};
264
265static int tpo_td043_enable(struct omap_dss_device *dssdev)
266{
267 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
268 int nreset_gpio = dssdev->reset_gpio;
269 int ret;
270
271 dev_dbg(&dssdev->dev, "enable\n");
272
273 if (dssdev->platform_enable) {
274 ret = dssdev->platform_enable(dssdev);
275 if (ret)
276 return ret;
277 }
278
279 regulator_enable(tpo_td043->vcc_reg);
280
281 /* wait for power up */
282 msleep(160);
283
284 if (gpio_is_valid(nreset_gpio))
285 gpio_set_value(nreset_gpio, 1);
286
287 tpo_td043_write(tpo_td043->spi, 2,
288 TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
289 tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
290 tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
291 tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
292 tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
293 tpo_td043->vmirror);
294 tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
295
296 return 0;
297}
298
299static void tpo_td043_disable(struct omap_dss_device *dssdev)
300{
301 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
302 int nreset_gpio = dssdev->reset_gpio;
303
304 dev_dbg(&dssdev->dev, "disable\n");
305
306 tpo_td043_write(tpo_td043->spi, 3,
307 TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
308
309 if (gpio_is_valid(nreset_gpio))
310 gpio_set_value(nreset_gpio, 0);
311
312 /* wait for at least 2 vsyncs before cutting off power */
313 msleep(50);
314
315 tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
316
317 regulator_disable(tpo_td043->vcc_reg);
318
319 if (dssdev->platform_disable)
320 dssdev->platform_disable(dssdev);
321}
322
323static int tpo_td043_suspend(struct omap_dss_device *dssdev)
324{
325 tpo_td043_disable(dssdev);
326 return 0;
327}
328
329static int tpo_td043_resume(struct omap_dss_device *dssdev)
330{
331 return tpo_td043_enable(dssdev);
332}
333
334static int tpo_td043_probe(struct omap_dss_device *dssdev)
335{
336 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
337 int nreset_gpio = dssdev->reset_gpio;
338 int ret = 0;
339
340 dev_dbg(&dssdev->dev, "probe\n");
341
342 if (tpo_td043 == NULL) {
343 dev_err(&dssdev->dev, "missing tpo_td043_device\n");
344 return -ENODEV;
345 }
346
347 dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IHS |
348 OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IPC;
349 dssdev->panel.timings = tpo_td043_timings;
350 dssdev->ctrl.pixel_size = 24;
351
352 tpo_td043->mode = TPO_R02_MODE_800x480;
353 memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
354
355 tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
356 if (IS_ERR(tpo_td043->vcc_reg)) {
357 dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
358 ret = PTR_ERR(tpo_td043->vcc_reg);
359 goto fail_regulator;
360 }
361
362 if (gpio_is_valid(nreset_gpio)) {
363 ret = gpio_request(nreset_gpio, "lcd reset");
364 if (ret < 0) {
365 dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
366 goto fail_gpio_req;
367 }
368
369 ret = gpio_direction_output(nreset_gpio, 0);
370 if (ret < 0) {
371 dev_err(&dssdev->dev, "couldn't set GPIO direction\n");
372 goto fail_gpio_direction;
373 }
374 }
375
376 ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
377 if (ret)
378 dev_warn(&dssdev->dev, "failed to create sysfs files\n");
379
380 return 0;
381
382fail_gpio_direction:
383 gpio_free(nreset_gpio);
384fail_gpio_req:
385 regulator_put(tpo_td043->vcc_reg);
386fail_regulator:
387 kfree(tpo_td043);
388 return ret;
389}
390
391static void tpo_td043_remove(struct omap_dss_device *dssdev)
392{
393 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
394 int nreset_gpio = dssdev->reset_gpio;
395
396 dev_dbg(&dssdev->dev, "remove\n");
397
398 sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
399 regulator_put(tpo_td043->vcc_reg);
400 if (gpio_is_valid(nreset_gpio))
401 gpio_free(nreset_gpio);
402}
403
404static struct omap_dss_driver tpo_td043_driver = {
405 .probe = tpo_td043_probe,
406 .remove = tpo_td043_remove,
407
408 .enable = tpo_td043_enable,
409 .disable = tpo_td043_disable,
410 .suspend = tpo_td043_suspend,
411 .resume = tpo_td043_resume,
412 .set_mirror = tpo_td043_set_hmirror,
413 .get_mirror = tpo_td043_get_hmirror,
414
415 .driver = {
416 .name = "tpo_td043mtea1_panel",
417 .owner = THIS_MODULE,
418 },
419};
420
421static int tpo_td043_spi_probe(struct spi_device *spi)
422{
423 struct omap_dss_device *dssdev = spi->dev.platform_data;
424 struct tpo_td043_device *tpo_td043;
425 int ret;
426
427 if (dssdev == NULL) {
428 dev_err(&spi->dev, "missing dssdev\n");
429 return -ENODEV;
430 }
431
432 spi->bits_per_word = 16;
433 spi->mode = SPI_MODE_0;
434
435 ret = spi_setup(spi);
436 if (ret < 0) {
437 dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
438 return ret;
439 }
440
441 tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
442 if (tpo_td043 == NULL)
443 return -ENOMEM;
444
445 tpo_td043->spi = spi;
446 dev_set_drvdata(&spi->dev, tpo_td043);
447 dev_set_drvdata(&dssdev->dev, tpo_td043);
448
449 omap_dss_register_driver(&tpo_td043_driver);
450
451 return 0;
452}
453
454static int __devexit tpo_td043_spi_remove(struct spi_device *spi)
455{
456 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
457
458 omap_dss_unregister_driver(&tpo_td043_driver);
459 kfree(tpo_td043);
460
461 return 0;
462}
463
464static struct spi_driver tpo_td043_spi_driver = {
465 .driver = {
466 .name = "tpo_td043mtea1_panel_spi",
467 .bus = &spi_bus_type,
468 .owner = THIS_MODULE,
469 },
470 .probe = tpo_td043_spi_probe,
471 .remove = __devexit_p(tpo_td043_spi_remove),
472};
473
474static int __init tpo_td043_init(void)
475{
476 return spi_register_driver(&tpo_td043_spi_driver);
477}
478
479static void __exit tpo_td043_exit(void)
480{
481 spi_unregister_driver(&tpo_td043_spi_driver);
482}
483
484module_init(tpo_td043_init);
485module_exit(tpo_td043_exit);
486
487MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
488MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
489MODULE_LICENSE("GPL");