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authorGrant Likely <grant.likely@secretlab.ca>2010-01-28 16:38:25 -0500
committerGrant Likely <grant.likely@secretlab.ca>2010-01-28 16:38:25 -0500
commit0ada0a73120c28cc432bcdbac061781465c2f48f (patch)
treed17cadd4ea47e25d9e48e7d409a39c84268fbd27 /drivers/video/omap/dispc.c
parent6016a363f6b56b46b24655bcfc0499b715851cf3 (diff)
parent92dcffb916d309aa01778bf8963a6932e4014d07 (diff)
Merge commit 'v2.6.33-rc5' into secretlab/test-devicetree
Diffstat (limited to 'drivers/video/omap/dispc.c')
-rw-r--r--drivers/video/omap/dispc.c33
1 files changed, 24 insertions, 9 deletions
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index f16e42154229..e192b058a688 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -24,11 +24,12 @@
24#include <linux/vmalloc.h> 24#include <linux/vmalloc.h>
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/platform_device.h>
27 28
28#include <mach/sram.h> 29#include <plat/sram.h>
29#include <mach/omapfb.h> 30#include <plat/board.h>
30#include <mach/board.h>
31 31
32#include "omapfb.h"
32#include "dispc.h" 33#include "dispc.h"
33 34
34#define MODULE_NAME "dispc" 35#define MODULE_NAME "dispc"
@@ -204,6 +205,7 @@ static u32 inline dispc_read_reg(int idx)
204/* Select RFBI or bypass mode */ 205/* Select RFBI or bypass mode */
205static void enable_rfbi_mode(int enable) 206static void enable_rfbi_mode(int enable)
206{ 207{
208 void __iomem *rfbi_control;
207 u32 l; 209 u32 l;
208 210
209 l = dispc_read_reg(DISPC_CONTROL); 211 l = dispc_read_reg(DISPC_CONTROL);
@@ -216,9 +218,15 @@ static void enable_rfbi_mode(int enable)
216 dispc_write_reg(DISPC_CONTROL, l); 218 dispc_write_reg(DISPC_CONTROL, l);
217 219
218 /* Set bypass mode in RFBI module */ 220 /* Set bypass mode in RFBI module */
219 l = __raw_readl(OMAP2_IO_ADDRESS(RFBI_CONTROL)); 221 rfbi_control = ioremap(RFBI_CONTROL, SZ_1K);
222 if (!rfbi_control) {
223 pr_err("Unable to ioremap rfbi_control\n");
224 return;
225 }
226 l = __raw_readl(rfbi_control);
220 l |= enable ? 0 : (1 << 1); 227 l |= enable ? 0 : (1 << 1);
221 __raw_writel(l, OMAP2_IO_ADDRESS(RFBI_CONTROL)); 228 __raw_writel(l, rfbi_control);
229 iounmap(rfbi_control);
222} 230}
223 231
224static void set_lcd_data_lines(int data_lines) 232static void set_lcd_data_lines(int data_lines)
@@ -907,20 +915,20 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
907 915
908static int get_dss_clocks(void) 916static int get_dss_clocks(void)
909{ 917{
910 dispc.dss_ick = clk_get(dispc.fbdev->dev, "ick"); 918 dispc.dss_ick = clk_get(&dispc.fbdev->dssdev->dev, "ick");
911 if (IS_ERR(dispc.dss_ick)) { 919 if (IS_ERR(dispc.dss_ick)) {
912 dev_err(dispc.fbdev->dev, "can't get ick\n"); 920 dev_err(dispc.fbdev->dev, "can't get ick\n");
913 return PTR_ERR(dispc.dss_ick); 921 return PTR_ERR(dispc.dss_ick);
914 } 922 }
915 923
916 dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck"); 924 dispc.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss1_fck");
917 if (IS_ERR(dispc.dss1_fck)) { 925 if (IS_ERR(dispc.dss1_fck)) {
918 dev_err(dispc.fbdev->dev, "can't get dss1_fck\n"); 926 dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
919 clk_put(dispc.dss_ick); 927 clk_put(dispc.dss_ick);
920 return PTR_ERR(dispc.dss1_fck); 928 return PTR_ERR(dispc.dss1_fck);
921 } 929 }
922 930
923 dispc.dss_54m_fck = clk_get(dispc.fbdev->dev, "tv_fck"); 931 dispc.dss_54m_fck = clk_get(&dispc.fbdev->dssdev->dev, "tv_fck");
924 if (IS_ERR(dispc.dss_54m_fck)) { 932 if (IS_ERR(dispc.dss_54m_fck)) {
925 dev_err(dispc.fbdev->dev, "can't get tv_fck\n"); 933 dev_err(dispc.fbdev->dev, "can't get tv_fck\n");
926 clk_put(dispc.dss_ick); 934 clk_put(dispc.dss_ick);
@@ -1367,6 +1375,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
1367 int r; 1375 int r;
1368 u32 l; 1376 u32 l;
1369 struct lcd_panel *panel = fbdev->panel; 1377 struct lcd_panel *panel = fbdev->panel;
1378 void __iomem *ram_fw_base;
1370 int tmo = 10000; 1379 int tmo = 10000;
1371 int skip_init = 0; 1380 int skip_init = 0;
1372 int i; 1381 int i;
@@ -1441,7 +1450,13 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
1441 } 1450 }
1442 1451
1443 /* L3 firewall setting: enable access to OCM RAM */ 1452 /* L3 firewall setting: enable access to OCM RAM */
1444 __raw_writel(0x402000b0, OMAP2_IO_ADDRESS(0x680050a0)); 1453 ram_fw_base = ioremap(0x68005000, SZ_1K);
1454 if (!ram_fw_base) {
1455 dev_err(dispc.fbdev->dev, "Cannot ioremap to enable OCM RAM\n");
1456 goto fail1;
1457 }
1458 __raw_writel(0x402000b0, ram_fw_base + 0xa0);
1459 iounmap(ram_fw_base);
1445 1460
1446 if ((r = alloc_palette_ram()) < 0) 1461 if ((r = alloc_palette_ram()) < 0)
1447 goto fail2; 1462 goto fail2;