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authorDave Jones <davej@redhat.com>2007-05-08 03:39:35 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-08 14:15:32 -0400
commite15de77e74d429f14641ebe7a29ccd8aa6656f3c (patch)
tree8cfca1fbea8c7357c1575e34243ac7425bb8d6e4 /drivers/video/nvidia/nv_accel.c
parentd4a96b53125c3d31266c05f2a8432d956dd26141 (diff)
nvidiafb: prevent triggering of softlockup
If the chip locks up, we get into a long polling loop, where the softlockup detector kicks in. See https://bugzilla.redhat.com/bugzilla/attachment.cgi?id=151878 for an example. [adaplas] Chip lockup can occur at 3 points (flush, sync, and wait). Consolidate and allow the driver to go to safe mode cleanly. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/nvidia/nv_accel.c')
-rw-r--r--drivers/video/nvidia/nv_accel.c76
1 files changed, 46 insertions, 30 deletions
diff --git a/drivers/video/nvidia/nv_accel.c b/drivers/video/nvidia/nv_accel.c
index 9efb8a3854e2..fa4821c5572b 100644
--- a/drivers/video/nvidia/nv_accel.c
+++ b/drivers/video/nvidia/nv_accel.c
@@ -69,27 +69,38 @@ static const int NVCopyROP_PM[16] = {
69 0x5A, /* invert */ 69 0x5A, /* invert */
70}; 70};
71 71
72static inline void NVFlush(struct nvidia_par *par) 72static inline void nvidiafb_safe_mode(struct fb_info *info)
73{ 73{
74 struct nvidia_par *par = info->par;
75
76 touch_softlockup_watchdog();
77 info->pixmap.scan_align = 1;
78 par->lockup = 1;
79}
80
81static inline void NVFlush(struct fb_info *info)
82{
83 struct nvidia_par *par = info->par;
74 int count = 1000000000; 84 int count = 1000000000;
75 85
76 while (--count && READ_GET(par) != par->dmaPut) ; 86 while (--count && READ_GET(par) != par->dmaPut) ;
77 87
78 if (!count) { 88 if (!count) {
79 printk("nvidiafb: DMA Flush lockup\n"); 89 printk("nvidiafb: DMA Flush lockup\n");
80 par->lockup = 1; 90 nvidiafb_safe_mode(info);
81 } 91 }
82} 92}
83 93
84static inline void NVSync(struct nvidia_par *par) 94static inline void NVSync(struct fb_info *info)
85{ 95{
96 struct nvidia_par *par = info->par;
86 int count = 1000000000; 97 int count = 1000000000;
87 98
88 while (--count && NV_RD32(par->PGRAPH, 0x0700)) ; 99 while (--count && NV_RD32(par->PGRAPH, 0x0700)) ;
89 100
90 if (!count) { 101 if (!count) {
91 printk("nvidiafb: DMA Sync lockup\n"); 102 printk("nvidiafb: DMA Sync lockup\n");
92 par->lockup = 1; 103 nvidiafb_safe_mode(info);
93 } 104 }
94} 105}
95 106
@@ -101,8 +112,9 @@ static void NVDmaKickoff(struct nvidia_par *par)
101 } 112 }
102} 113}
103 114
104static void NVDmaWait(struct nvidia_par *par, int size) 115static void NVDmaWait(struct fb_info *info, int size)
105{ 116{
117 struct nvidia_par *par = info->par;
106 int dmaGet; 118 int dmaGet;
107 int count = 1000000000, cnt; 119 int count = 1000000000, cnt;
108 size++; 120 size++;
@@ -135,34 +147,38 @@ static void NVDmaWait(struct nvidia_par *par, int size)
135 } 147 }
136 148
137 if (!count) { 149 if (!count) {
138 printk("DMA Wait Lockup\n"); 150 printk("nvidiafb: DMA Wait Lockup\n");
139 par->lockup = 1; 151 nvidiafb_safe_mode(info);
140 } 152 }
141} 153}
142 154
143static void NVSetPattern(struct nvidia_par *par, u32 clr0, u32 clr1, 155static void NVSetPattern(struct fb_info *info, u32 clr0, u32 clr1,
144 u32 pat0, u32 pat1) 156 u32 pat0, u32 pat1)
145{ 157{
146 NVDmaStart(par, PATTERN_COLOR_0, 4); 158 struct nvidia_par *par = info->par;
159
160 NVDmaStart(info, par, PATTERN_COLOR_0, 4);
147 NVDmaNext(par, clr0); 161 NVDmaNext(par, clr0);
148 NVDmaNext(par, clr1); 162 NVDmaNext(par, clr1);
149 NVDmaNext(par, pat0); 163 NVDmaNext(par, pat0);
150 NVDmaNext(par, pat1); 164 NVDmaNext(par, pat1);
151} 165}
152 166
153static void NVSetRopSolid(struct nvidia_par *par, u32 rop, u32 planemask) 167static void NVSetRopSolid(struct fb_info *info, u32 rop, u32 planemask)
154{ 168{
169 struct nvidia_par *par = info->par;
170
155 if (planemask != ~0) { 171 if (planemask != ~0) {
156 NVSetPattern(par, 0, planemask, ~0, ~0); 172 NVSetPattern(info, 0, planemask, ~0, ~0);
157 if (par->currentRop != (rop + 32)) { 173 if (par->currentRop != (rop + 32)) {
158 NVDmaStart(par, ROP_SET, 1); 174 NVDmaStart(info, par, ROP_SET, 1);
159 NVDmaNext(par, NVCopyROP_PM[rop]); 175 NVDmaNext(par, NVCopyROP_PM[rop]);
160 par->currentRop = rop + 32; 176 par->currentRop = rop + 32;
161 } 177 }
162 } else if (par->currentRop != rop) { 178 } else if (par->currentRop != rop) {
163 if (par->currentRop >= 16) 179 if (par->currentRop >= 16)
164 NVSetPattern(par, ~0, ~0, ~0, ~0); 180 NVSetPattern(info, ~0, ~0, ~0, ~0);
165 NVDmaStart(par, ROP_SET, 1); 181 NVDmaStart(info, par, ROP_SET, 1);
166 NVDmaNext(par, NVCopyROP[rop]); 182 NVDmaNext(par, NVCopyROP[rop]);
167 par->currentRop = rop; 183 par->currentRop = rop;
168 } 184 }
@@ -175,7 +191,7 @@ static void NVSetClippingRectangle(struct fb_info *info, int x1, int y1,
175 int h = y2 - y1 + 1; 191 int h = y2 - y1 + 1;
176 int w = x2 - x1 + 1; 192 int w = x2 - x1 + 1;
177 193
178 NVDmaStart(par, CLIP_POINT, 2); 194 NVDmaStart(info, par, CLIP_POINT, 2);
179 NVDmaNext(par, (y1 << 16) | x1); 195 NVDmaNext(par, (y1 << 16) | x1);
180 NVDmaNext(par, (h << 16) | w); 196 NVDmaNext(par, (h << 16) | w);
181} 197}
@@ -237,23 +253,23 @@ void NVResetGraphics(struct fb_info *info)
237 break; 253 break;
238 } 254 }
239 255
240 NVDmaStart(par, SURFACE_FORMAT, 4); 256 NVDmaStart(info, par, SURFACE_FORMAT, 4);
241 NVDmaNext(par, surfaceFormat); 257 NVDmaNext(par, surfaceFormat);
242 NVDmaNext(par, pitch | (pitch << 16)); 258 NVDmaNext(par, pitch | (pitch << 16));
243 NVDmaNext(par, 0); 259 NVDmaNext(par, 0);
244 NVDmaNext(par, 0); 260 NVDmaNext(par, 0);
245 261
246 NVDmaStart(par, PATTERN_FORMAT, 1); 262 NVDmaStart(info, par, PATTERN_FORMAT, 1);
247 NVDmaNext(par, patternFormat); 263 NVDmaNext(par, patternFormat);
248 264
249 NVDmaStart(par, RECT_FORMAT, 1); 265 NVDmaStart(info, par, RECT_FORMAT, 1);
250 NVDmaNext(par, rectFormat); 266 NVDmaNext(par, rectFormat);
251 267
252 NVDmaStart(par, LINE_FORMAT, 1); 268 NVDmaStart(info, par, LINE_FORMAT, 1);
253 NVDmaNext(par, lineFormat); 269 NVDmaNext(par, lineFormat);
254 270
255 par->currentRop = ~0; /* set to something invalid */ 271 par->currentRop = ~0; /* set to something invalid */
256 NVSetRopSolid(par, ROP_COPY, ~0); 272 NVSetRopSolid(info, ROP_COPY, ~0);
257 273
258 NVSetClippingRectangle(info, 0, 0, info->var.xres_virtual, 274 NVSetClippingRectangle(info, 0, 0, info->var.xres_virtual,
259 info->var.yres_virtual); 275 info->var.yres_virtual);
@@ -269,10 +285,10 @@ int nvidiafb_sync(struct fb_info *info)
269 return 0; 285 return 0;
270 286
271 if (!par->lockup) 287 if (!par->lockup)
272 NVFlush(par); 288 NVFlush(info);
273 289
274 if (!par->lockup) 290 if (!par->lockup)
275 NVSync(par); 291 NVSync(info);
276 292
277 return 0; 293 return 0;
278} 294}
@@ -287,7 +303,7 @@ void nvidiafb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
287 if (par->lockup) 303 if (par->lockup)
288 return cfb_copyarea(info, region); 304 return cfb_copyarea(info, region);
289 305
290 NVDmaStart(par, BLIT_POINT_SRC, 3); 306 NVDmaStart(info, par, BLIT_POINT_SRC, 3);
291 NVDmaNext(par, (region->sy << 16) | region->sx); 307 NVDmaNext(par, (region->sy << 16) | region->sx);
292 NVDmaNext(par, (region->dy << 16) | region->dx); 308 NVDmaNext(par, (region->dy << 16) | region->dx);
293 NVDmaNext(par, (region->height << 16) | region->width); 309 NVDmaNext(par, (region->height << 16) | region->width);
@@ -312,19 +328,19 @@ void nvidiafb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
312 color = ((u32 *) info->pseudo_palette)[rect->color]; 328 color = ((u32 *) info->pseudo_palette)[rect->color];
313 329
314 if (rect->rop != ROP_COPY) 330 if (rect->rop != ROP_COPY)
315 NVSetRopSolid(par, rect->rop, ~0); 331 NVSetRopSolid(info, rect->rop, ~0);
316 332
317 NVDmaStart(par, RECT_SOLID_COLOR, 1); 333 NVDmaStart(info, par, RECT_SOLID_COLOR, 1);
318 NVDmaNext(par, color); 334 NVDmaNext(par, color);
319 335
320 NVDmaStart(par, RECT_SOLID_RECTS(0), 2); 336 NVDmaStart(info, par, RECT_SOLID_RECTS(0), 2);
321 NVDmaNext(par, (rect->dx << 16) | rect->dy); 337 NVDmaNext(par, (rect->dx << 16) | rect->dy);
322 NVDmaNext(par, (rect->width << 16) | rect->height); 338 NVDmaNext(par, (rect->width << 16) | rect->height);
323 339
324 NVDmaKickoff(par); 340 NVDmaKickoff(par);
325 341
326 if (rect->rop != ROP_COPY) 342 if (rect->rop != ROP_COPY)
327 NVSetRopSolid(par, ROP_COPY, ~0); 343 NVSetRopSolid(info, ROP_COPY, ~0);
328} 344}
329 345
330static void nvidiafb_mono_color_expand(struct fb_info *info, 346static void nvidiafb_mono_color_expand(struct fb_info *info,
@@ -346,7 +362,7 @@ static void nvidiafb_mono_color_expand(struct fb_info *info,
346 bg = ((u32 *) info->pseudo_palette)[image->bg_color] | mask; 362 bg = ((u32 *) info->pseudo_palette)[image->bg_color] | mask;
347 } 363 }
348 364
349 NVDmaStart(par, RECT_EXPAND_TWO_COLOR_CLIP, 7); 365 NVDmaStart(info, par, RECT_EXPAND_TWO_COLOR_CLIP, 7);
350 NVDmaNext(par, (image->dy << 16) | (image->dx & 0xffff)); 366 NVDmaNext(par, (image->dy << 16) | (image->dx & 0xffff));
351 NVDmaNext(par, ((image->dy + image->height) << 16) | 367 NVDmaNext(par, ((image->dy + image->height) << 16) |
352 ((image->dx + image->width) & 0xffff)); 368 ((image->dx + image->width) & 0xffff));
@@ -357,7 +373,7 @@ static void nvidiafb_mono_color_expand(struct fb_info *info,
357 NVDmaNext(par, (image->dy << 16) | (image->dx & 0xffff)); 373 NVDmaNext(par, (image->dy << 16) | (image->dx & 0xffff));
358 374
359 while (dsize >= RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS) { 375 while (dsize >= RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS) {
360 NVDmaStart(par, RECT_EXPAND_TWO_COLOR_DATA(0), 376 NVDmaStart(info, par, RECT_EXPAND_TWO_COLOR_DATA(0),
361 RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS); 377 RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS);
362 378
363 for (j = RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS; j--;) { 379 for (j = RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS; j--;) {
@@ -370,7 +386,7 @@ static void nvidiafb_mono_color_expand(struct fb_info *info,
370 } 386 }
371 387
372 if (dsize) { 388 if (dsize) {
373 NVDmaStart(par, RECT_EXPAND_TWO_COLOR_DATA(0), dsize); 389 NVDmaStart(info, par, RECT_EXPAND_TWO_COLOR_DATA(0), dsize);
374 390
375 for (j = dsize; j--;) { 391 for (j = dsize; j--;) {
376 tmp = data[k++]; 392 tmp = data[k++];