video: mb862xxfb: relocate register space to get contiguous vram

By default the GDC registers are located in the middle of the 64MiB
area for video RAM and registers. When 32MiB VRAM or more is used,
relocate the register space to the top of the 64MiB space so that
we get the contiguous VRAM for GDC frame buffer layers, drawing
frames, capture and cursor buffers.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

1 files changed, 13 insertions, 1 deletions

diff --git a/drivers/video/mb862xx/mb862xxfb.c b/drivers/video/mb862xx/mb862xxfb.c
index a1b81e73394c..ffb6a2c36d3c 100644
--- a/drivers/video/mb862xx/mb862xxfb.c
+++ b/drivers/video/mb862xx/mb862xxfb.c
@@ -742,6 +742,12 @@ static int coralp_init(struct mb862xxfb_par *par)
 
         par->refclk = GC_DISP_REFCLK_400;
 
+        if (par->mapped_vram >= 0x2000000) {
+                /* relocate gdc registers space */
+                writel(1, par->fb_base + MB862XX_MMIO_BASE + GC_RSW);
+                udelay(1); /* wait at least 20 bus cycles */
+        }
+
         ver = inreg(host, GC_CID);
         cn = (ver & GC_CID_CNAME_MSK) >> 8;
         ver = ver & GC_CID_VERSION_MSK;
@@ -907,7 +913,13 @@ static int __devinit mb862xx_pci_probe(struct pci_dev *pdev,
         case PCI_DEVICE_ID_FUJITSU_CORALPA:
                 par->fb_base_phys = pci_resource_start(par->pdev, 0);
                 par->mapped_vram = CORALP_MEM_SIZE;
-                par->mmio_base_phys = par->fb_base_phys + MB862XX_MMIO_BASE;
+                if (par->mapped_vram >= 0x2000000) {
+                        par->mmio_base_phys = par->fb_base_phys +
+                                              MB862XX_MMIO_HIGH_BASE;
+                } else {
+                        par->mmio_base_phys = par->fb_base_phys +
+                                              MB862XX_MMIO_BASE;
+                }
                 par->mmio_len = MB862XX_MMIO_SIZE;
                 par->type = BT_CORALP;
                 break;