diff options
author | Jean Delvare <khali@linux-fr.org> | 2009-09-22 19:47:49 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-23 10:39:57 -0400 |
commit | 316b4d644caceb2cf7432d8a27e45b88f57ef2a0 (patch) | |
tree | 3c1815b8a4a8e4e5999e657a26e5cea222d02dcd /drivers/video/matrox/matroxfb_g450.c | |
parent | fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9 (diff) |
matroxfb: get rid of unneeded macros WPMINFO and friends
With multihead support always enabled, these macros are no longer needed
and make the code harder to read.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Petr Vandrovec <vandrove@vc.cvut.cz>
Cc: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/matrox/matroxfb_g450.c')
-rw-r--r-- | drivers/video/matrox/matroxfb_g450.c | 99 |
1 files changed, 56 insertions, 43 deletions
diff --git a/drivers/video/matrox/matroxfb_g450.c b/drivers/video/matrox/matroxfb_g450.c index 841b439ecca3..f7f1343cd345 100644 --- a/drivers/video/matrox/matroxfb_g450.c +++ b/drivers/video/matrox/matroxfb_g450.c | |||
@@ -80,50 +80,57 @@ static int get_ctrl_id(__u32 v4l2_id) { | |||
80 | return -EINVAL; | 80 | return -EINVAL; |
81 | } | 81 | } |
82 | 82 | ||
83 | static inline int* get_ctrl_ptr(WPMINFO unsigned int idx) { | 83 | static inline int *get_ctrl_ptr(struct matrox_fb_info *minfo, unsigned int idx) |
84 | { | ||
84 | return (int*)((char*)minfo + g450_controls[idx].control); | 85 | return (int*)((char*)minfo + g450_controls[idx].control); |
85 | } | 86 | } |
86 | 87 | ||
87 | static void tvo_fill_defaults(WPMINFO2) { | 88 | static void tvo_fill_defaults(struct matrox_fb_info *minfo) |
89 | { | ||
88 | unsigned int i; | 90 | unsigned int i; |
89 | 91 | ||
90 | for (i = 0; i < G450CTRLS; i++) { | 92 | for (i = 0; i < G450CTRLS; i++) { |
91 | *get_ctrl_ptr(PMINFO i) = g450_controls[i].desc.default_value; | 93 | *get_ctrl_ptr(minfo, i) = g450_controls[i].desc.default_value; |
92 | } | 94 | } |
93 | } | 95 | } |
94 | 96 | ||
95 | static int cve2_get_reg(WPMINFO int reg) { | 97 | static int cve2_get_reg(struct matrox_fb_info *minfo, int reg) |
98 | { | ||
96 | unsigned long flags; | 99 | unsigned long flags; |
97 | int val; | 100 | int val; |
98 | 101 | ||
99 | matroxfb_DAC_lock_irqsave(flags); | 102 | matroxfb_DAC_lock_irqsave(flags); |
100 | matroxfb_DAC_out(PMINFO 0x87, reg); | 103 | matroxfb_DAC_out(minfo, 0x87, reg); |
101 | val = matroxfb_DAC_in(PMINFO 0x88); | 104 | val = matroxfb_DAC_in(minfo, 0x88); |
102 | matroxfb_DAC_unlock_irqrestore(flags); | 105 | matroxfb_DAC_unlock_irqrestore(flags); |
103 | return val; | 106 | return val; |
104 | } | 107 | } |
105 | 108 | ||
106 | static void cve2_set_reg(WPMINFO int reg, int val) { | 109 | static void cve2_set_reg(struct matrox_fb_info *minfo, int reg, int val) |
110 | { | ||
107 | unsigned long flags; | 111 | unsigned long flags; |
108 | 112 | ||
109 | matroxfb_DAC_lock_irqsave(flags); | 113 | matroxfb_DAC_lock_irqsave(flags); |
110 | matroxfb_DAC_out(PMINFO 0x87, reg); | 114 | matroxfb_DAC_out(minfo, 0x87, reg); |
111 | matroxfb_DAC_out(PMINFO 0x88, val); | 115 | matroxfb_DAC_out(minfo, 0x88, val); |
112 | matroxfb_DAC_unlock_irqrestore(flags); | 116 | matroxfb_DAC_unlock_irqrestore(flags); |
113 | } | 117 | } |
114 | 118 | ||
115 | static void cve2_set_reg10(WPMINFO int reg, int val) { | 119 | static void cve2_set_reg10(struct matrox_fb_info *minfo, int reg, int val) |
120 | { | ||
116 | unsigned long flags; | 121 | unsigned long flags; |
117 | 122 | ||
118 | matroxfb_DAC_lock_irqsave(flags); | 123 | matroxfb_DAC_lock_irqsave(flags); |
119 | matroxfb_DAC_out(PMINFO 0x87, reg); | 124 | matroxfb_DAC_out(minfo, 0x87, reg); |
120 | matroxfb_DAC_out(PMINFO 0x88, val >> 2); | 125 | matroxfb_DAC_out(minfo, 0x88, val >> 2); |
121 | matroxfb_DAC_out(PMINFO 0x87, reg + 1); | 126 | matroxfb_DAC_out(minfo, 0x87, reg + 1); |
122 | matroxfb_DAC_out(PMINFO 0x88, val & 3); | 127 | matroxfb_DAC_out(minfo, 0x88, val & 3); |
123 | matroxfb_DAC_unlock_irqrestore(flags); | 128 | matroxfb_DAC_unlock_irqrestore(flags); |
124 | } | 129 | } |
125 | 130 | ||
126 | static void g450_compute_bwlevel(CPMINFO int *bl, int *wl) { | 131 | static void g450_compute_bwlevel(const struct matrox_fb_info *minfo, int *bl, |
132 | int *wl) | ||
133 | { | ||
127 | const int b = minfo->altout.tvo_params.brightness + BLMIN; | 134 | const int b = minfo->altout.tvo_params.brightness + BLMIN; |
128 | const int c = minfo->altout.tvo_params.contrast; | 135 | const int c = minfo->altout.tvo_params.contrast; |
129 | 136 | ||
@@ -162,7 +169,7 @@ static int g450_set_ctrl(void* md, struct v4l2_control *p) { | |||
162 | /* | 169 | /* |
163 | * Check if changed. | 170 | * Check if changed. |
164 | */ | 171 | */ |
165 | if (p->value == *get_ctrl_ptr(PMINFO i)) return 0; | 172 | if (p->value == *get_ctrl_ptr(minfo, i)) return 0; |
166 | 173 | ||
167 | /* | 174 | /* |
168 | * Check limits. | 175 | * Check limits. |
@@ -173,31 +180,31 @@ static int g450_set_ctrl(void* md, struct v4l2_control *p) { | |||
173 | /* | 180 | /* |
174 | * Store new value. | 181 | * Store new value. |
175 | */ | 182 | */ |
176 | *get_ctrl_ptr(PMINFO i) = p->value; | 183 | *get_ctrl_ptr(minfo, i) = p->value; |
177 | 184 | ||
178 | switch (p->id) { | 185 | switch (p->id) { |
179 | case V4L2_CID_BRIGHTNESS: | 186 | case V4L2_CID_BRIGHTNESS: |
180 | case V4L2_CID_CONTRAST: | 187 | case V4L2_CID_CONTRAST: |
181 | { | 188 | { |
182 | int blacklevel, whitelevel; | 189 | int blacklevel, whitelevel; |
183 | g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel); | 190 | g450_compute_bwlevel(minfo, &blacklevel, &whitelevel); |
184 | cve2_set_reg10(PMINFO 0x0e, blacklevel); | 191 | cve2_set_reg10(minfo, 0x0e, blacklevel); |
185 | cve2_set_reg10(PMINFO 0x1e, whitelevel); | 192 | cve2_set_reg10(minfo, 0x1e, whitelevel); |
186 | } | 193 | } |
187 | break; | 194 | break; |
188 | case V4L2_CID_SATURATION: | 195 | case V4L2_CID_SATURATION: |
189 | cve2_set_reg(PMINFO 0x20, p->value); | 196 | cve2_set_reg(minfo, 0x20, p->value); |
190 | cve2_set_reg(PMINFO 0x22, p->value); | 197 | cve2_set_reg(minfo, 0x22, p->value); |
191 | break; | 198 | break; |
192 | case V4L2_CID_HUE: | 199 | case V4L2_CID_HUE: |
193 | cve2_set_reg(PMINFO 0x25, p->value); | 200 | cve2_set_reg(minfo, 0x25, p->value); |
194 | break; | 201 | break; |
195 | case MATROXFB_CID_TESTOUT: | 202 | case MATROXFB_CID_TESTOUT: |
196 | { | 203 | { |
197 | unsigned char val = cve2_get_reg (PMINFO 0x05); | 204 | unsigned char val = cve2_get_reg(minfo, 0x05); |
198 | if (p->value) val |= 0x02; | 205 | if (p->value) val |= 0x02; |
199 | else val &= ~0x02; | 206 | else val &= ~0x02; |
200 | cve2_set_reg(PMINFO 0x05, val); | 207 | cve2_set_reg(minfo, 0x05, val); |
201 | } | 208 | } |
202 | break; | 209 | break; |
203 | } | 210 | } |
@@ -212,7 +219,7 @@ static int g450_get_ctrl(void* md, struct v4l2_control *p) { | |||
212 | 219 | ||
213 | i = get_ctrl_id(p->id); | 220 | i = get_ctrl_id(p->id); |
214 | if (i < 0) return -EINVAL; | 221 | if (i < 0) return -EINVAL; |
215 | p->value = *get_ctrl_ptr(PMINFO i); | 222 | p->value = *get_ctrl_ptr(minfo, i); |
216 | return 0; | 223 | return 0; |
217 | } | 224 | } |
218 | 225 | ||
@@ -226,7 +233,9 @@ struct output_desc { | |||
226 | unsigned int v_total; | 233 | unsigned int v_total; |
227 | }; | 234 | }; |
228 | 235 | ||
229 | static void computeRegs(WPMINFO struct mavenregs* r, struct my_timming* mt, const struct output_desc* outd) { | 236 | static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r, |
237 | struct my_timming *mt, const struct output_desc *outd) | ||
238 | { | ||
230 | u_int32_t chromasc; | 239 | u_int32_t chromasc; |
231 | u_int32_t hlen; | 240 | u_int32_t hlen; |
232 | u_int32_t hsl; | 241 | u_int32_t hsl; |
@@ -251,10 +260,10 @@ static void computeRegs(WPMINFO struct mavenregs* r, struct my_timming* mt, cons | |||
251 | 260 | ||
252 | dprintk(KERN_DEBUG "Want %u kHz pixclock\n", (unsigned int)piic); | 261 | dprintk(KERN_DEBUG "Want %u kHz pixclock\n", (unsigned int)piic); |
253 | 262 | ||
254 | mnp = matroxfb_g450_setclk(PMINFO piic, M_VIDEO_PLL); | 263 | mnp = matroxfb_g450_setclk(minfo, piic, M_VIDEO_PLL); |
255 | 264 | ||
256 | mt->mnp = mnp; | 265 | mt->mnp = mnp; |
257 | mt->pixclock = g450_mnp2f(PMINFO mnp); | 266 | mt->pixclock = g450_mnp2f(minfo, mnp); |
258 | 267 | ||
259 | dprintk(KERN_DEBUG "MNP=%08X\n", mnp); | 268 | dprintk(KERN_DEBUG "MNP=%08X\n", mnp); |
260 | 269 | ||
@@ -490,20 +499,22 @@ static void cve2_init_TVdata(int norm, struct mavenregs* data, const struct outp | |||
490 | return; | 499 | return; |
491 | } | 500 | } |
492 | 501 | ||
493 | #define LR(x) cve2_set_reg(PMINFO (x), m->regs[(x)]) | 502 | #define LR(x) cve2_set_reg(minfo, (x), m->regs[(x)]) |
494 | static void cve2_init_TV(WPMINFO const struct mavenregs* m) { | 503 | static void cve2_init_TV(struct matrox_fb_info *minfo, |
504 | const struct mavenregs *m) | ||
505 | { | ||
495 | int i; | 506 | int i; |
496 | 507 | ||
497 | LR(0x80); | 508 | LR(0x80); |
498 | LR(0x82); LR(0x83); | 509 | LR(0x82); LR(0x83); |
499 | LR(0x84); LR(0x85); | 510 | LR(0x84); LR(0x85); |
500 | 511 | ||
501 | cve2_set_reg(PMINFO 0x3E, 0x01); | 512 | cve2_set_reg(minfo, 0x3E, 0x01); |
502 | 513 | ||
503 | for (i = 0; i < 0x3E; i++) { | 514 | for (i = 0; i < 0x3E; i++) { |
504 | LR(i); | 515 | LR(i); |
505 | } | 516 | } |
506 | cve2_set_reg(PMINFO 0x3E, 0x00); | 517 | cve2_set_reg(minfo, 0x3E, 0x00); |
507 | } | 518 | } |
508 | 519 | ||
509 | static int matroxfb_g450_compute(void* md, struct my_timming* mt) { | 520 | static int matroxfb_g450_compute(void* md, struct my_timming* mt) { |
@@ -518,7 +529,7 @@ static int matroxfb_g450_compute(void* md, struct my_timming* mt) { | |||
518 | cve2_init_TVdata(minfo->outputs[1].mode, &minfo->hw.maven, &outd); | 529 | cve2_init_TVdata(minfo->outputs[1].mode, &minfo->hw.maven, &outd); |
519 | { | 530 | { |
520 | int blacklevel, whitelevel; | 531 | int blacklevel, whitelevel; |
521 | g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel); | 532 | g450_compute_bwlevel(minfo, &blacklevel, &whitelevel); |
522 | minfo->hw.maven.regs[0x0E] = blacklevel >> 2; | 533 | minfo->hw.maven.regs[0x0E] = blacklevel >> 2; |
523 | minfo->hw.maven.regs[0x0F] = blacklevel & 3; | 534 | minfo->hw.maven.regs[0x0F] = blacklevel & 3; |
524 | minfo->hw.maven.regs[0x1E] = whitelevel >> 2; | 535 | minfo->hw.maven.regs[0x1E] = whitelevel >> 2; |
@@ -533,12 +544,12 @@ static int matroxfb_g450_compute(void* md, struct my_timming* mt) { | |||
533 | minfo->hw.maven.regs[0x05] |= 0x02; | 544 | minfo->hw.maven.regs[0x05] |= 0x02; |
534 | } | 545 | } |
535 | } | 546 | } |
536 | computeRegs(PMINFO &minfo->hw.maven, mt, outd); | 547 | computeRegs(minfo, &minfo->hw.maven, mt, outd); |
537 | } else if (mt->mnp < 0) { | 548 | } else if (mt->mnp < 0) { |
538 | /* We must program clocks before CRTC2, otherwise interlaced mode | 549 | /* We must program clocks before CRTC2, otherwise interlaced mode |
539 | startup may fail */ | 550 | startup may fail */ |
540 | mt->mnp = matroxfb_g450_setclk(PMINFO mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); | 551 | mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); |
541 | mt->pixclock = g450_mnp2f(PMINFO mt->mnp); | 552 | mt->pixclock = g450_mnp2f(minfo, mt->mnp); |
542 | } | 553 | } |
543 | dprintk(KERN_DEBUG "Pixclock = %u\n", mt->pixclock); | 554 | dprintk(KERN_DEBUG "Pixclock = %u\n", mt->pixclock); |
544 | return 0; | 555 | return 0; |
@@ -548,7 +559,7 @@ static int matroxfb_g450_program(void* md) { | |||
548 | MINFO_FROM(md); | 559 | MINFO_FROM(md); |
549 | 560 | ||
550 | if (minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) { | 561 | if (minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) { |
551 | cve2_init_TV(PMINFO &minfo->hw.maven); | 562 | cve2_init_TV(minfo, &minfo->hw.maven); |
552 | } | 563 | } |
553 | return 0; | 564 | return 0; |
554 | } | 565 | } |
@@ -567,8 +578,8 @@ static int g450_dvi_compute(void* md, struct my_timming* mt) { | |||
567 | MINFO_FROM(md); | 578 | MINFO_FROM(md); |
568 | 579 | ||
569 | if (mt->mnp < 0) { | 580 | if (mt->mnp < 0) { |
570 | mt->mnp = matroxfb_g450_setclk(PMINFO mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); | 581 | mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); |
571 | mt->pixclock = g450_mnp2f(PMINFO mt->mnp); | 582 | mt->pixclock = g450_mnp2f(minfo, mt->mnp); |
572 | } | 583 | } |
573 | return 0; | 584 | return 0; |
574 | } | 585 | } |
@@ -588,10 +599,11 @@ static struct matrox_altout matroxfb_g450_dvi = { | |||
588 | .compute = g450_dvi_compute, | 599 | .compute = g450_dvi_compute, |
589 | }; | 600 | }; |
590 | 601 | ||
591 | void matroxfb_g450_connect(WPMINFO2) { | 602 | void matroxfb_g450_connect(struct matrox_fb_info *minfo) |
603 | { | ||
592 | if (minfo->devflags.g450dac) { | 604 | if (minfo->devflags.g450dac) { |
593 | down_write(&minfo->altout.lock); | 605 | down_write(&minfo->altout.lock); |
594 | tvo_fill_defaults(PMINFO2); | 606 | tvo_fill_defaults(minfo); |
595 | minfo->outputs[1].src = minfo->outputs[1].default_src; | 607 | minfo->outputs[1].src = minfo->outputs[1].default_src; |
596 | minfo->outputs[1].data = minfo; | 608 | minfo->outputs[1].data = minfo; |
597 | minfo->outputs[1].output = &matroxfb_g450_altout; | 609 | minfo->outputs[1].output = &matroxfb_g450_altout; |
@@ -604,7 +616,8 @@ void matroxfb_g450_connect(WPMINFO2) { | |||
604 | } | 616 | } |
605 | } | 617 | } |
606 | 618 | ||
607 | void matroxfb_g450_shutdown(WPMINFO2) { | 619 | void matroxfb_g450_shutdown(struct matrox_fb_info *minfo) |
620 | { | ||
608 | if (minfo->devflags.g450dac) { | 621 | if (minfo->devflags.g450dac) { |
609 | down_write(&minfo->altout.lock); | 622 | down_write(&minfo->altout.lock); |
610 | minfo->outputs[1].src = MATROXFB_SRC_NONE; | 623 | minfo->outputs[1].src = MATROXFB_SRC_NONE; |