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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/video/matrox/matroxfb_accel.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/video/matrox/matroxfb_accel.c')
-rw-r--r--drivers/video/matrox/matroxfb_accel.c497
1 files changed, 497 insertions, 0 deletions
diff --git a/drivers/video/matrox/matroxfb_accel.c b/drivers/video/matrox/matroxfb_accel.c
new file mode 100644
index 000000000000..c7f3e1321224
--- /dev/null
+++ b/drivers/video/matrox/matroxfb_accel.c
@@ -0,0 +1,497 @@
1/*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Version: 1.65 2002/08/14
8 *
9 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
10 *
11 * Contributors: "menion?" <menion@mindless.com>
12 * Betatesting, fixes, ideas
13 *
14 * "Kurt Garloff" <garloff@suse.de>
15 * Betatesting, fixes, ideas, videomodes, videomodes timmings
16 *
17 * "Tom Rini" <trini@kernel.crashing.org>
18 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
19 *
20 * "Bibek Sahu" <scorpio@dodds.net>
21 * Access device through readb|w|l and write b|w|l
22 * Extensive debugging stuff
23 *
24 * "Daniel Haun" <haund@usa.net>
25 * Testing, hardware cursor fixes
26 *
27 * "Scott Wood" <sawst46+@pitt.edu>
28 * Fixes
29 *
30 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
31 * Betatesting
32 *
33 * "Kelly French" <targon@hazmat.com>
34 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
35 * Betatesting, bug reporting
36 *
37 * "Pablo Bianucci" <pbian@pccp.com.ar>
38 * Fixes, ideas, betatesting
39 *
40 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
41 * Fixes, enhandcements, ideas, betatesting
42 *
43 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
44 * PPC betatesting, PPC support, backward compatibility
45 *
46 * "Paul Womar" <Paul@pwomar.demon.co.uk>
47 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
48 * PPC betatesting
49 *
50 * "Thomas Pornin" <pornin@bolet.ens.fr>
51 * Alpha betatesting
52 *
53 * "Pieter van Leuven" <pvl@iae.nl>
54 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
55 * G100 testing
56 *
57 * "H. Peter Arvin" <hpa@transmeta.com>
58 * Ideas
59 *
60 * "Cort Dougan" <cort@cs.nmt.edu>
61 * CHRP fixes and PReP cleanup
62 *
63 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
64 * G400 support
65 *
66 * (following author is not in any relation with this code, but his code
67 * is included in this driver)
68 *
69 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
70 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
71 *
72 * (following author is not in any relation with this code, but his ideas
73 * were used when writting this driver)
74 *
75 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
76 *
77 */
78
79#include "matroxfb_accel.h"
80#include "matroxfb_DAC1064.h"
81#include "matroxfb_Ti3026.h"
82#include "matroxfb_misc.h"
83
84#define curr_ydstorg(x) ACCESS_FBINFO2(x, curr.ydstorg.pixels)
85
86#define mga_ydstlen(y,l) mga_outl(M_YDSTLEN | M_EXEC, ((y) << 16) | (l))
87
88static inline void matrox_cfb4_pal(u_int32_t* pal) {
89 unsigned int i;
90
91 for (i = 0; i < 16; i++) {
92 pal[i] = i * 0x11111111U;
93 }
94 pal[i] = 0xFFFFFFFF;
95}
96
97static inline void matrox_cfb8_pal(u_int32_t* pal) {
98 unsigned int i;
99
100 for (i = 0; i < 16; i++) {
101 pal[i] = i * 0x01010101U;
102 }
103 pal[i] = 0x0F0F0F0F;
104}
105
106static void matroxfb_copyarea(struct fb_info* info, const struct fb_copyarea* area);
107static void matroxfb_fillrect(struct fb_info* info, const struct fb_fillrect* rect);
108static void matroxfb_imageblit(struct fb_info* info, const struct fb_image* image);
109static void matroxfb_cfb4_fillrect(struct fb_info* info, const struct fb_fillrect* rect);
110static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyarea* area);
111
112void matrox_cfbX_init(WPMINFO2) {
113 u_int32_t maccess;
114 u_int32_t mpitch;
115 u_int32_t mopmode;
116 int accel;
117
118 DBG(__FUNCTION__)
119
120 mpitch = ACCESS_FBINFO(fbcon).var.xres_virtual;
121
122 ACCESS_FBINFO(fbops).fb_copyarea = cfb_copyarea;
123 ACCESS_FBINFO(fbops).fb_fillrect = cfb_fillrect;
124 ACCESS_FBINFO(fbops).fb_imageblit = cfb_imageblit;
125 ACCESS_FBINFO(fbops).fb_cursor = soft_cursor;
126
127 accel = (ACCESS_FBINFO(fbcon).var.accel_flags & FB_ACCELF_TEXT) == FB_ACCELF_TEXT;
128
129 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
130 case 4: maccess = 0x00000000; /* accelerate as 8bpp video */
131 mpitch = (mpitch >> 1) | 0x8000; /* disable linearization */
132 mopmode = M_OPMODE_4BPP;
133 matrox_cfb4_pal(ACCESS_FBINFO(cmap));
134 if (accel && !(mpitch & 1)) {
135 ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_cfb4_copyarea;
136 ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_cfb4_fillrect;
137 }
138 break;
139 case 8: maccess = 0x00000000;
140 mopmode = M_OPMODE_8BPP;
141 matrox_cfb8_pal(ACCESS_FBINFO(cmap));
142 if (accel) {
143 ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_copyarea;
144 ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_fillrect;
145 ACCESS_FBINFO(fbops).fb_imageblit = matroxfb_imageblit;
146 }
147 break;
148 case 16: if (ACCESS_FBINFO(fbcon).var.green.length == 5) {
149 maccess = 0xC0000001;
150 ACCESS_FBINFO(cmap[16]) = 0x7FFF7FFF;
151 } else {
152 maccess = 0x40000001;
153 ACCESS_FBINFO(cmap[16]) = 0xFFFFFFFF;
154 }
155 mopmode = M_OPMODE_16BPP;
156 if (accel) {
157 ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_copyarea;
158 ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_fillrect;
159 ACCESS_FBINFO(fbops).fb_imageblit = matroxfb_imageblit;
160 }
161 break;
162 case 24: maccess = 0x00000003;
163 mopmode = M_OPMODE_24BPP;
164 ACCESS_FBINFO(cmap[16]) = 0xFFFFFFFF;
165 if (accel) {
166 ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_copyarea;
167 ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_fillrect;
168 ACCESS_FBINFO(fbops).fb_imageblit = matroxfb_imageblit;
169 }
170 break;
171 case 32: maccess = 0x00000002;
172 mopmode = M_OPMODE_32BPP;
173 ACCESS_FBINFO(cmap[16]) = 0xFFFFFFFF;
174 if (accel) {
175 ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_copyarea;
176 ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_fillrect;
177 ACCESS_FBINFO(fbops).fb_imageblit = matroxfb_imageblit;
178 }
179 break;
180 default: maccess = 0x00000000;
181 mopmode = 0x00000000;
182 break; /* turn off acceleration!!! */
183 }
184 mga_fifo(8);
185 mga_outl(M_PITCH, mpitch);
186 mga_outl(M_YDSTORG, curr_ydstorg(MINFO));
187 if (ACCESS_FBINFO(capable.plnwt))
188 mga_outl(M_PLNWT, -1);
189 if (ACCESS_FBINFO(capable.srcorg)) {
190 mga_outl(M_SRCORG, 0);
191 mga_outl(M_DSTORG, 0);
192 }
193 mga_outl(M_OPMODE, mopmode);
194 mga_outl(M_CXBNDRY, 0xFFFF0000);
195 mga_outl(M_YTOP, 0);
196 mga_outl(M_YBOT, 0x01FFFFFF);
197 mga_outl(M_MACCESS, maccess);
198 ACCESS_FBINFO(accel.m_dwg_rect) = M_DWG_TRAP | M_DWG_SOLID | M_DWG_ARZERO | M_DWG_SGNZERO | M_DWG_SHIFTZERO;
199 if (isMilleniumII(MINFO)) ACCESS_FBINFO(accel.m_dwg_rect) |= M_DWG_TRANSC;
200 ACCESS_FBINFO(accel.m_opmode) = mopmode;
201}
202
203EXPORT_SYMBOL(matrox_cfbX_init);
204
205static void matrox_accel_bmove(WPMINFO int vxres, int sy, int sx, int dy, int dx, int height, int width) {
206 int start, end;
207 CRITFLAGS
208
209 DBG(__FUNCTION__)
210
211 CRITBEGIN
212
213 if ((dy < sy) || ((dy == sy) && (dx <= sx))) {
214 mga_fifo(2);
215 mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_SGNZERO |
216 M_DWG_BFCOL | M_DWG_REPLACE);
217 mga_outl(M_AR5, vxres);
218 width--;
219 start = sy*vxres+sx+curr_ydstorg(MINFO);
220 end = start+width;
221 } else {
222 mga_fifo(3);
223 mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_BFCOL | M_DWG_REPLACE);
224 mga_outl(M_SGN, 5);
225 mga_outl(M_AR5, -vxres);
226 width--;
227 end = (sy+height-1)*vxres+sx+curr_ydstorg(MINFO);
228 start = end+width;
229 dy += height-1;
230 }
231 mga_fifo(4);
232 mga_outl(M_AR0, end);
233 mga_outl(M_AR3, start);
234 mga_outl(M_FXBNDRY, ((dx+width)<<16) | dx);
235 mga_ydstlen(dy, height);
236 WaitTillIdle();
237
238 CRITEND
239}
240
241static void matrox_accel_bmove_lin(WPMINFO int vxres, int sy, int sx, int dy, int dx, int height, int width) {
242 int start, end;
243 CRITFLAGS
244
245 DBG(__FUNCTION__)
246
247 CRITBEGIN
248
249 if ((dy < sy) || ((dy == sy) && (dx <= sx))) {
250 mga_fifo(2);
251 mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_SGNZERO |
252 M_DWG_BFCOL | M_DWG_REPLACE);
253 mga_outl(M_AR5, vxres);
254 width--;
255 start = sy*vxres+sx+curr_ydstorg(MINFO);
256 end = start+width;
257 } else {
258 mga_fifo(3);
259 mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_BFCOL | M_DWG_REPLACE);
260 mga_outl(M_SGN, 5);
261 mga_outl(M_AR5, -vxres);
262 width--;
263 end = (sy+height-1)*vxres+sx+curr_ydstorg(MINFO);
264 start = end+width;
265 dy += height-1;
266 }
267 mga_fifo(5);
268 mga_outl(M_AR0, end);
269 mga_outl(M_AR3, start);
270 mga_outl(M_FXBNDRY, ((dx+width)<<16) | dx);
271 mga_outl(M_YDST, dy*vxres >> 5);
272 mga_outl(M_LEN | M_EXEC, height);
273 WaitTillIdle();
274
275 CRITEND
276}
277
278static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyarea* area) {
279 MINFO_FROM_INFO(info);
280
281 if ((area->sx | area->dx | area->width) & 1)
282 cfb_copyarea(info, area);
283 else
284 matrox_accel_bmove_lin(PMINFO ACCESS_FBINFO(fbcon.var.xres_virtual) >> 1, area->sy, area->sx >> 1, area->dy, area->dx >> 1, area->height, area->width >> 1);
285}
286
287static void matroxfb_copyarea(struct fb_info* info, const struct fb_copyarea* area) {
288 MINFO_FROM_INFO(info);
289
290 matrox_accel_bmove(PMINFO ACCESS_FBINFO(fbcon.var.xres_virtual), area->sy, area->sx, area->dy, area->dx, area->height, area->width);
291}
292
293static void matroxfb_accel_clear(WPMINFO u_int32_t color, int sy, int sx, int height,
294 int width) {
295 CRITFLAGS
296
297 DBG(__FUNCTION__)
298
299 CRITBEGIN
300
301 mga_fifo(5);
302 mga_outl(M_DWGCTL, ACCESS_FBINFO(accel.m_dwg_rect) | M_DWG_REPLACE);
303 mga_outl(M_FCOL, color);
304 mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx);
305 mga_ydstlen(sy, height);
306 WaitTillIdle();
307
308 CRITEND
309}
310
311static void matroxfb_fillrect(struct fb_info* info, const struct fb_fillrect* rect) {
312 MINFO_FROM_INFO(info);
313
314 switch (rect->rop) {
315 case ROP_COPY:
316 matroxfb_accel_clear(PMINFO ((u_int32_t*)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
317 break;
318 }
319}
320
321static void matroxfb_cfb4_clear(WPMINFO u_int32_t bgx, int sy, int sx, int height, int width) {
322 int whattodo;
323 CRITFLAGS
324
325 DBG(__FUNCTION__)
326
327 CRITBEGIN
328
329 whattodo = 0;
330 if (sx & 1) {
331 sx ++;
332 if (!width) return;
333 width --;
334 whattodo = 1;
335 }
336 if (width & 1) {
337 whattodo |= 2;
338 }
339 width >>= 1;
340 sx >>= 1;
341 if (width) {
342 mga_fifo(5);
343 mga_outl(M_DWGCTL, ACCESS_FBINFO(accel.m_dwg_rect) | M_DWG_REPLACE2);
344 mga_outl(M_FCOL, bgx);
345 mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx);
346 mga_outl(M_YDST, sy * ACCESS_FBINFO(fbcon).var.xres_virtual >> 6);
347 mga_outl(M_LEN | M_EXEC, height);
348 WaitTillIdle();
349 }
350 if (whattodo) {
351 u_int32_t step = ACCESS_FBINFO(fbcon).var.xres_virtual >> 1;
352 vaddr_t vbase = ACCESS_FBINFO(video.vbase);
353 if (whattodo & 1) {
354 unsigned int uaddr = sy * step + sx - 1;
355 u_int32_t loop;
356 u_int8_t bgx2 = bgx & 0xF0;
357 for (loop = height; loop > 0; loop --) {
358 mga_writeb(vbase, uaddr, (mga_readb(vbase, uaddr) & 0x0F) | bgx2);
359 uaddr += step;
360 }
361 }
362 if (whattodo & 2) {
363 unsigned int uaddr = sy * step + sx + width;
364 u_int32_t loop;
365 u_int8_t bgx2 = bgx & 0x0F;
366 for (loop = height; loop > 0; loop --) {
367 mga_writeb(vbase, uaddr, (mga_readb(vbase, uaddr) & 0xF0) | bgx2);
368 uaddr += step;
369 }
370 }
371 }
372
373 CRITEND
374}
375
376static void matroxfb_cfb4_fillrect(struct fb_info* info, const struct fb_fillrect* rect) {
377 MINFO_FROM_INFO(info);
378
379 switch (rect->rop) {
380 case ROP_COPY:
381 matroxfb_cfb4_clear(PMINFO ((u_int32_t*)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
382 break;
383 }
384}
385
386static void matroxfb_1bpp_imageblit(WPMINFO u_int32_t fgx, u_int32_t bgx,
387 const u_int8_t* chardata, int width, int height, int yy, int xx) {
388 u_int32_t step;
389 u_int32_t ydstlen;
390 u_int32_t xlen;
391 u_int32_t ar0;
392 u_int32_t charcell;
393 u_int32_t fxbndry;
394 vaddr_t mmio;
395 int easy;
396 CRITFLAGS
397
398 DBG_HEAVY(__FUNCTION__);
399
400 step = (width + 7) >> 3;
401 charcell = height * step;
402 xlen = (charcell + 3) & ~3;
403 ydstlen = (yy << 16) | height;
404 if (width == step << 3) {
405 ar0 = height * width - 1;
406 easy = 1;
407 } else {
408 ar0 = width - 1;
409 easy = 0;
410 }
411
412 CRITBEGIN
413
414 mga_fifo(3);
415 if (easy)
416 mga_outl(M_DWGCTL, M_DWG_ILOAD | M_DWG_SGNZERO | M_DWG_SHIFTZERO | M_DWG_BMONOWF | M_DWG_LINEAR | M_DWG_REPLACE);
417 else
418 mga_outl(M_DWGCTL, M_DWG_ILOAD | M_DWG_SGNZERO | M_DWG_SHIFTZERO | M_DWG_BMONOWF | M_DWG_REPLACE);
419 mga_outl(M_FCOL, fgx);
420 mga_outl(M_BCOL, bgx);
421 fxbndry = ((xx + width - 1) << 16) | xx;
422 mmio = ACCESS_FBINFO(mmio.vbase);
423
424 mga_fifo(6);
425 mga_writel(mmio, M_FXBNDRY, fxbndry);
426 mga_writel(mmio, M_AR0, ar0);
427 mga_writel(mmio, M_AR3, 0);
428 if (easy) {
429 mga_writel(mmio, M_YDSTLEN | M_EXEC, ydstlen);
430 mga_memcpy_toio(mmio, chardata, xlen);
431 } else {
432 mga_writel(mmio, M_AR5, 0);
433 mga_writel(mmio, M_YDSTLEN | M_EXEC, ydstlen);
434 if ((step & 3) == 0) {
435 /* Great. Source has 32bit aligned lines, so we can feed them
436 directly to the accelerator. */
437 mga_memcpy_toio(mmio, chardata, charcell);
438 } else if (step == 1) {
439 /* Special case for 1..8bit widths */
440 while (height--) {
441#if defined(__BIG_ENDIAN)
442 fb_writel((*chardata) << 24, mmio.vaddr);
443#else
444 fb_writel(*chardata, mmio.vaddr);
445#endif
446 chardata++;
447 }
448 } else if (step == 2) {
449 /* Special case for 9..15bit widths */
450 while (height--) {
451#if defined(__BIG_ENDIAN)
452 fb_writel((*(u_int16_t*)chardata) << 16, mmio.vaddr);
453#else
454 fb_writel(*(u_int16_t*)chardata, mmio.vaddr);
455#endif
456 chardata += 2;
457 }
458 } else {
459 /* Tell... well, why bother... */
460 while (height--) {
461 size_t i;
462
463 for (i = 0; i < step; i += 4) {
464 /* Hope that there are at least three readable bytes beyond the end of bitmap */
465 fb_writel(get_unaligned((u_int32_t*)(chardata + i)),mmio.vaddr);
466 }
467 chardata += step;
468 }
469 }
470 }
471 WaitTillIdle();
472 CRITEND
473}
474
475
476static void matroxfb_imageblit(struct fb_info* info, const struct fb_image* image) {
477 MINFO_FROM_INFO(info);
478
479 DBG_HEAVY(__FUNCTION__);
480
481 if (image->depth == 1) {
482 u_int32_t fgx, bgx;
483
484 fgx = ((u_int32_t*)info->pseudo_palette)[image->fg_color];
485 bgx = ((u_int32_t*)info->pseudo_palette)[image->bg_color];
486 matroxfb_1bpp_imageblit(PMINFO fgx, bgx, image->data, image->width, image->height, image->dy, image->dx);
487 } else {
488 /* Danger! image->depth is useless: logo painting code always
489 passes framebuffer color depth here, although logo data are
490 always 8bpp and info->pseudo_palette is changed to contain
491 logo palette to be used (but only for true/direct-color... sic...).
492 So do it completely in software... */
493 cfb_imageblit(info, image);
494 }
495}
496
497MODULE_LICENSE("GPL");
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