diff options
author | Jean Delvare <khali@linux-fr.org> | 2009-09-22 19:47:48 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-23 10:39:57 -0400 |
commit | fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9 (patch) | |
tree | bda524a0244bb7df1e0f315b1344989564f63765 /drivers/video/matrox/matroxfb_Ti3026.c | |
parent | 0728bacbba3b0267fa8ca8be69aa43d81b57ab51 (diff) |
matroxfb: get rid of unneeded macros ACCESS_FBINFO and MINFO
With multihead support always enabled, these macros are no longer needed
and make the code harder to read.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Petr Vandrovec <vandrove@vc.cvut.cz>
Cc: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/matrox/matroxfb_Ti3026.c')
-rw-r--r-- | drivers/video/matrox/matroxfb_Ti3026.c | 94 |
1 files changed, 47 insertions, 47 deletions
diff --git a/drivers/video/matrox/matroxfb_Ti3026.c b/drivers/video/matrox/matroxfb_Ti3026.c index 4e825112a601..bc9c27499b39 100644 --- a/drivers/video/matrox/matroxfb_Ti3026.c +++ b/drivers/video/matrox/matroxfb_Ti3026.c | |||
@@ -295,11 +295,11 @@ static int Ti3026_calcclock(CPMINFO unsigned int freq, unsigned int fmax, int* i | |||
295 | static int Ti3026_setpclk(WPMINFO int clk) { | 295 | static int Ti3026_setpclk(WPMINFO int clk) { |
296 | unsigned int f_pll; | 296 | unsigned int f_pll; |
297 | unsigned int pixfeed, pixin, pixpost; | 297 | unsigned int pixfeed, pixin, pixpost; |
298 | struct matrox_hw_state* hw = &ACCESS_FBINFO(hw); | 298 | struct matrox_hw_state *hw = &minfo->hw; |
299 | 299 | ||
300 | DBG(__func__) | 300 | DBG(__func__) |
301 | 301 | ||
302 | f_pll = Ti3026_calcclock(PMINFO clk, ACCESS_FBINFO(max_pixel_clock), &pixin, &pixfeed, &pixpost); | 302 | f_pll = Ti3026_calcclock(PMINFO clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost); |
303 | 303 | ||
304 | hw->DACclk[0] = pixin | 0xC0; | 304 | hw->DACclk[0] = pixin | 0xC0; |
305 | hw->DACclk[1] = pixfeed; | 305 | hw->DACclk[1] = pixfeed; |
@@ -309,9 +309,9 @@ static int Ti3026_setpclk(WPMINFO int clk) { | |||
309 | unsigned int loopfeed, loopin, looppost, loopdiv, z; | 309 | unsigned int loopfeed, loopin, looppost, loopdiv, z; |
310 | unsigned int Bpp; | 310 | unsigned int Bpp; |
311 | 311 | ||
312 | Bpp = ACCESS_FBINFO(curr.final_bppShift); | 312 | Bpp = minfo->curr.final_bppShift; |
313 | 313 | ||
314 | if (ACCESS_FBINFO(fbcon).var.bits_per_pixel == 24) { | 314 | if (minfo->fbcon.var.bits_per_pixel == 24) { |
315 | loopfeed = 3; /* set lm to any possible value */ | 315 | loopfeed = 3; /* set lm to any possible value */ |
316 | loopin = 3 * 32 / Bpp; | 316 | loopin = 3 * 32 / Bpp; |
317 | } else { | 317 | } else { |
@@ -330,18 +330,18 @@ static int Ti3026_setpclk(WPMINFO int clk) { | |||
330 | looppost = 3; | 330 | looppost = 3; |
331 | loopdiv = z/16; | 331 | loopdiv = z/16; |
332 | } | 332 | } |
333 | if (ACCESS_FBINFO(fbcon).var.bits_per_pixel == 24) { | 333 | if (minfo->fbcon.var.bits_per_pixel == 24) { |
334 | hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0; | 334 | hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0; |
335 | hw->DACclk[4] = (65 - loopfeed) | 0x80; | 335 | hw->DACclk[4] = (65 - loopfeed) | 0x80; |
336 | if (ACCESS_FBINFO(accel.ramdac_rev) > 0x20) { | 336 | if (minfo->accel.ramdac_rev > 0x20) { |
337 | if (isInterleave(MINFO)) | 337 | if (isInterleave(minfo)) |
338 | hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_8_3; | 338 | hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_8_3; |
339 | else { | 339 | else { |
340 | hw->DACclk[4] &= ~0xC0; | 340 | hw->DACclk[4] &= ~0xC0; |
341 | hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_4_3; | 341 | hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_4_3; |
342 | } | 342 | } |
343 | } else { | 343 | } else { |
344 | if (isInterleave(MINFO)) | 344 | if (isInterleave(minfo)) |
345 | ; /* default... */ | 345 | ; /* default... */ |
346 | else { | 346 | else { |
347 | hw->DACclk[4] ^= 0xC0; /* change from 0x80 to 0x40 */ | 347 | hw->DACclk[4] ^= 0xC0; /* change from 0x80 to 0x40 */ |
@@ -349,7 +349,7 @@ static int Ti3026_setpclk(WPMINFO int clk) { | |||
349 | } | 349 | } |
350 | } | 350 | } |
351 | hw->DACclk[5] = looppost | 0xF8; | 351 | hw->DACclk[5] = looppost | 0xF8; |
352 | if (ACCESS_FBINFO(devflags.mga_24bpp_fix)) | 352 | if (minfo->devflags.mga_24bpp_fix) |
353 | hw->DACclk[5] ^= 0x40; | 353 | hw->DACclk[5] ^= 0x40; |
354 | } else { | 354 | } else { |
355 | hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0; | 355 | hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0; |
@@ -362,13 +362,13 @@ static int Ti3026_setpclk(WPMINFO int clk) { | |||
362 | } | 362 | } |
363 | 363 | ||
364 | static int Ti3026_init(WPMINFO struct my_timming* m) { | 364 | static int Ti3026_init(WPMINFO struct my_timming* m) { |
365 | u_int8_t muxctrl = isInterleave(MINFO) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT; | 365 | u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT; |
366 | struct matrox_hw_state* hw = &ACCESS_FBINFO(hw); | 366 | struct matrox_hw_state *hw = &minfo->hw; |
367 | 367 | ||
368 | DBG(__func__) | 368 | DBG(__func__) |
369 | 369 | ||
370 | memcpy(hw->DACreg, MGADACbpp32, sizeof(hw->DACreg)); | 370 | memcpy(hw->DACreg, MGADACbpp32, sizeof(hw->DACreg)); |
371 | switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) { | 371 | switch (minfo->fbcon.var.bits_per_pixel) { |
372 | case 4: hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_16_1; /* or _8_1, they are same */ | 372 | case 4: hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_16_1; /* or _8_1, they are same */ |
373 | hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR; | 373 | hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR; |
374 | hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_4BIT; | 374 | hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_4BIT; |
@@ -383,7 +383,7 @@ static int Ti3026_init(WPMINFO struct my_timming* m) { | |||
383 | break; | 383 | break; |
384 | case 16: | 384 | case 16: |
385 | /* XLATCHCTRL should be _4_1 / _2_1... Why is not? (_2_1 is used everytime) */ | 385 | /* XLATCHCTRL should be _4_1 / _2_1... Why is not? (_2_1 is used everytime) */ |
386 | hw->DACreg[POS3026_XTRUECOLORCTRL] = (ACCESS_FBINFO(fbcon).var.green.length == 5)? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555 ) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565); | 386 | hw->DACreg[POS3026_XTRUECOLORCTRL] = (minfo->fbcon.var.green.length == 5) ? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565); |
387 | hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_16BIT; | 387 | hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_16BIT; |
388 | hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV2; | 388 | hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV2; |
389 | break; | 389 | break; |
@@ -412,9 +412,9 @@ static int Ti3026_init(WPMINFO struct my_timming* m) { | |||
412 | hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_SYNC_ON_GREEN; | 412 | hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_SYNC_ON_GREEN; |
413 | 413 | ||
414 | /* set DELAY */ | 414 | /* set DELAY */ |
415 | if (ACCESS_FBINFO(video.len) < 0x400000) | 415 | if (minfo->video.len < 0x400000) |
416 | hw->CRTCEXT[3] |= 0x08; | 416 | hw->CRTCEXT[3] |= 0x08; |
417 | else if (ACCESS_FBINFO(video.len) > 0x400000) | 417 | else if (minfo->video.len > 0x400000) |
418 | hw->CRTCEXT[3] |= 0x10; | 418 | hw->CRTCEXT[3] |= 0x10; |
419 | 419 | ||
420 | /* set HWCURSOR */ | 420 | /* set HWCURSOR */ |
@@ -426,7 +426,7 @@ static int Ti3026_init(WPMINFO struct my_timming* m) { | |||
426 | 426 | ||
427 | /* set interleaving */ | 427 | /* set interleaving */ |
428 | hw->MXoptionReg &= ~0x00001000; | 428 | hw->MXoptionReg &= ~0x00001000; |
429 | if (isInterleave(MINFO)) hw->MXoptionReg |= 0x00001000; | 429 | if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000; |
430 | 430 | ||
431 | /* set DAC */ | 431 | /* set DAC */ |
432 | Ti3026_setpclk(PMINFO m->pixclock); | 432 | Ti3026_setpclk(PMINFO m->pixclock); |
@@ -442,7 +442,7 @@ static void ti3026_setMCLK(WPMINFO int fout){ | |||
442 | 442 | ||
443 | DBG(__func__) | 443 | DBG(__func__) |
444 | 444 | ||
445 | f_pll = Ti3026_calcclock(PMINFO fout, ACCESS_FBINFO(max_pixel_clock), &mclk_n, &mclk_m, &mclk_p); | 445 | f_pll = Ti3026_calcclock(PMINFO fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p); |
446 | 446 | ||
447 | /* save pclk */ | 447 | /* save pclk */ |
448 | outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC); | 448 | outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC); |
@@ -496,7 +496,7 @@ static void ti3026_setMCLK(WPMINFO int fout){ | |||
496 | printk(KERN_ERR "matroxfb: Memory PLL not locked after 5 secs\n"); | 496 | printk(KERN_ERR "matroxfb: Memory PLL not locked after 5 secs\n"); |
497 | 497 | ||
498 | f_pll = f_pll * 333 / (10000 << mclk_p); | 498 | f_pll = f_pll * 333 / (10000 << mclk_p); |
499 | if (isMilleniumII(MINFO)) { | 499 | if (isMilleniumII(minfo)) { |
500 | rfhcnt = (f_pll - 128) / 256; | 500 | rfhcnt = (f_pll - 128) / 256; |
501 | if (rfhcnt > 15) | 501 | if (rfhcnt > 15) |
502 | rfhcnt = 15; | 502 | rfhcnt = 15; |
@@ -505,8 +505,8 @@ static void ti3026_setMCLK(WPMINFO int fout){ | |||
505 | if (rfhcnt > 15) | 505 | if (rfhcnt > 15) |
506 | rfhcnt = 0; | 506 | rfhcnt = 0; |
507 | } | 507 | } |
508 | ACCESS_FBINFO(hw).MXoptionReg = (ACCESS_FBINFO(hw).MXoptionReg & ~0x000F0000) | (rfhcnt << 16); | 508 | minfo->hw.MXoptionReg = (minfo->hw.MXoptionReg & ~0x000F0000) | (rfhcnt << 16); |
509 | pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg); | 509 | pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg); |
510 | 510 | ||
511 | /* output MCLK to MCLK pin */ | 511 | /* output MCLK to MCLK pin */ |
512 | outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); | 512 | outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); |
@@ -536,14 +536,14 @@ static void ti3026_ramdac_init(WPMINFO2) { | |||
536 | 536 | ||
537 | DBG(__func__) | 537 | DBG(__func__) |
538 | 538 | ||
539 | ACCESS_FBINFO(features.pll.vco_freq_min) = 110000; | 539 | minfo->features.pll.vco_freq_min = 110000; |
540 | ACCESS_FBINFO(features.pll.ref_freq) = 114545; | 540 | minfo->features.pll.ref_freq = 114545; |
541 | ACCESS_FBINFO(features.pll.feed_div_min) = 2; | 541 | minfo->features.pll.feed_div_min = 2; |
542 | ACCESS_FBINFO(features.pll.feed_div_max) = 24; | 542 | minfo->features.pll.feed_div_max = 24; |
543 | ACCESS_FBINFO(features.pll.in_div_min) = 2; | 543 | minfo->features.pll.in_div_min = 2; |
544 | ACCESS_FBINFO(features.pll.in_div_max) = 63; | 544 | minfo->features.pll.in_div_max = 63; |
545 | ACCESS_FBINFO(features.pll.post_shift_max) = 3; | 545 | minfo->features.pll.post_shift_max = 3; |
546 | if (ACCESS_FBINFO(devflags.noinit)) | 546 | if (minfo->devflags.noinit) |
547 | return; | 547 | return; |
548 | ti3026_setMCLK(PMINFO 60000); | 548 | ti3026_setMCLK(PMINFO 60000); |
549 | } | 549 | } |
@@ -551,7 +551,7 @@ static void ti3026_ramdac_init(WPMINFO2) { | |||
551 | static void Ti3026_restore(WPMINFO2) { | 551 | static void Ti3026_restore(WPMINFO2) { |
552 | int i; | 552 | int i; |
553 | unsigned char progdac[6]; | 553 | unsigned char progdac[6]; |
554 | struct matrox_hw_state* hw = &ACCESS_FBINFO(hw); | 554 | struct matrox_hw_state *hw = &minfo->hw; |
555 | CRITFLAGS | 555 | CRITFLAGS |
556 | 556 | ||
557 | DBG(__func__) | 557 | DBG(__func__) |
@@ -565,7 +565,7 @@ static void Ti3026_restore(WPMINFO2) { | |||
565 | 565 | ||
566 | CRITBEGIN | 566 | CRITBEGIN |
567 | 567 | ||
568 | pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg); | 568 | pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); |
569 | 569 | ||
570 | CRITEND | 570 | CRITEND |
571 | 571 | ||
@@ -573,7 +573,7 @@ static void Ti3026_restore(WPMINFO2) { | |||
573 | 573 | ||
574 | CRITBEGIN | 574 | CRITBEGIN |
575 | 575 | ||
576 | ACCESS_FBINFO(crtc1.panpos) = -1; | 576 | minfo->crtc1.panpos = -1; |
577 | for (i = 0; i < 6; i++) | 577 | for (i = 0; i < 6; i++) |
578 | mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]); | 578 | mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]); |
579 | 579 | ||
@@ -678,35 +678,35 @@ static int Ti3026_preinit(WPMINFO2) { | |||
678 | static const int vxres_mill1[] = { 640, 768, 800, 960, | 678 | static const int vxres_mill1[] = { 640, 768, 800, 960, |
679 | 1024, 1152, 1280, 1600, 1920, | 679 | 1024, 1152, 1280, 1600, 1920, |
680 | 2048, 0}; | 680 | 2048, 0}; |
681 | struct matrox_hw_state* hw = &ACCESS_FBINFO(hw); | 681 | struct matrox_hw_state *hw = &minfo->hw; |
682 | 682 | ||
683 | DBG(__func__) | 683 | DBG(__func__) |
684 | 684 | ||
685 | ACCESS_FBINFO(millenium) = 1; | 685 | minfo->millenium = 1; |
686 | ACCESS_FBINFO(milleniumII) = (ACCESS_FBINFO(pcidev)->device != PCI_DEVICE_ID_MATROX_MIL); | 686 | minfo->milleniumII = (minfo->pcidev->device != PCI_DEVICE_ID_MATROX_MIL); |
687 | ACCESS_FBINFO(capable.cfb4) = 1; | 687 | minfo->capable.cfb4 = 1; |
688 | ACCESS_FBINFO(capable.text) = 1; /* isMilleniumII(MINFO); */ | 688 | minfo->capable.text = 1; /* isMilleniumII(minfo); */ |
689 | ACCESS_FBINFO(capable.vxres) = isMilleniumII(MINFO)?vxres_mill2:vxres_mill1; | 689 | minfo->capable.vxres = isMilleniumII(minfo) ? vxres_mill2 : vxres_mill1; |
690 | 690 | ||
691 | ACCESS_FBINFO(outputs[0]).data = MINFO; | 691 | minfo->outputs[0].data = minfo; |
692 | ACCESS_FBINFO(outputs[0]).output = &ti3026_output; | 692 | minfo->outputs[0].output = &ti3026_output; |
693 | ACCESS_FBINFO(outputs[0]).src = ACCESS_FBINFO(outputs[0]).default_src; | 693 | minfo->outputs[0].src = minfo->outputs[0].default_src; |
694 | ACCESS_FBINFO(outputs[0]).mode = MATROXFB_OUTPUT_MODE_MONITOR; | 694 | minfo->outputs[0].mode = MATROXFB_OUTPUT_MODE_MONITOR; |
695 | 695 | ||
696 | if (ACCESS_FBINFO(devflags.noinit)) | 696 | if (minfo->devflags.noinit) |
697 | return 0; | 697 | return 0; |
698 | /* preserve VGA I/O, BIOS and PPC */ | 698 | /* preserve VGA I/O, BIOS and PPC */ |
699 | hw->MXoptionReg &= 0xC0000100; | 699 | hw->MXoptionReg &= 0xC0000100; |
700 | hw->MXoptionReg |= 0x002C0000; | 700 | hw->MXoptionReg |= 0x002C0000; |
701 | if (ACCESS_FBINFO(devflags.novga)) | 701 | if (minfo->devflags.novga) |
702 | hw->MXoptionReg &= ~0x00000100; | 702 | hw->MXoptionReg &= ~0x00000100; |
703 | if (ACCESS_FBINFO(devflags.nobios)) | 703 | if (minfo->devflags.nobios) |
704 | hw->MXoptionReg &= ~0x40000000; | 704 | hw->MXoptionReg &= ~0x40000000; |
705 | if (ACCESS_FBINFO(devflags.nopciretry)) | 705 | if (minfo->devflags.nopciretry) |
706 | hw->MXoptionReg |= 0x20000000; | 706 | hw->MXoptionReg |= 0x20000000; |
707 | pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg); | 707 | pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); |
708 | 708 | ||
709 | ACCESS_FBINFO(accel.ramdac_rev) = inTi3026(PMINFO TVP3026_XSILICONREV); | 709 | minfo->accel.ramdac_rev = inTi3026(PMINFO TVP3026_XSILICONREV); |
710 | 710 | ||
711 | outTi3026(PMINFO TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED); | 711 | outTi3026(PMINFO TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED); |
712 | outTi3026(PMINFO TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR); | 712 | outTi3026(PMINFO TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR); |