matroxfb: rectify jitter (G450/G550)

This builds upon my previous attempts to resolve some jitter problems seen
with the Matrox G450 and G550 -based cards, including odd disparities observed
between x86 and Power -based machines in a somewhat less hackish way (removing
the hacked ifdefs).

Apparently, preference should be given to use the DVI PLL when frequencies
permit, the Standard PLL otherwise.  The max pixel clock for the panellink
interface is extracted from the PInS information on the card and used as a
limit to determine which PLL to use.

Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
Acked-by: Petr Vandrovec <petr@vandrovec.name>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

1 files changed, 13 insertions, 10 deletions

diff --git a/drivers/video/matrox/g450_pll.c b/drivers/video/matrox/g450_pll.c
index 7c76e079ca7d..d42346e7fdda 100644
--- a/drivers/video/matrox/g450_pll.c
+++ b/drivers/video/matrox/g450_pll.c
@@ -331,16 +331,19 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
                                         tmp |= M1064_XPIXCLKCTRL_PLL_UP;
                                 }
                                 matroxfb_DAC_out(PMINFO M1064_XPIXCLKCTRL, tmp);
-#ifdef __powerpc__
-                                /* This is necessary to avoid jitter on PowerPC
-                                 * (OpenFirmware) systems, but apparently
-                                 * introduces jitter, at least on a x86-64
-                                 * using DVI.
-                                 * A simple workaround is disable for non-PPC.
-                                 */
-                                matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL, 0);
-#endif /* __powerpc__ */
-                                matroxfb_DAC_out(PMINFO M1064_XPWRCTRL, xpwrctrl);
+                                /* DVI PLL preferred for frequencies up to
+                                   panel link max, standard PLL otherwise */
+                                if (fout >= MINFO->max_pixel_clock_panellink)
+                                        tmp = 0;
+                                else tmp =
+                                        M1064_XDVICLKCTRL_DVIDATAPATHSEL |
+                                        M1064_XDVICLKCTRL_C1DVICLKSEL |
+                                        M1064_XDVICLKCTRL_C1DVICLKEN |
+                                        M1064_XDVICLKCTRL_DVILOOPCTL |
+                                        M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
+                                matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL,tmp);
+                                matroxfb_DAC_out(PMINFO M1064_XPWRCTRL,
+                                                 xpwrctrl);
 
                                 matroxfb_DAC_unlock_irqrestore(flags);
                         }