diff options
author | Krzysztof Halasa <khc@pm.waw.pl> | 2007-10-16 04:29:31 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-16 12:43:19 -0400 |
commit | 689c9568f54747c13f287ae53956281e7cd810fa (patch) | |
tree | 1ab59495fc6e5203e7814cb927fd7ddd079d5c81 /drivers/video/intelfb/intelfbhw.c | |
parent | 53ee1b5bbf937be29862ae8b3ea13af444af1f36 (diff) |
Intel FB: whitespace, bracket and other clean-ups
Intel FB: whitespace, bracket and other clean-ups
Signed-off-by: Krzysztof Halasa <khc@pm.waw.pl>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: <sylvain.meyer@worldonline.fr>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/intelfb/intelfbhw.c')
-rw-r--r-- | drivers/video/intelfb/intelfbhw.c | 190 |
1 files changed, 83 insertions, 107 deletions
diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c index 04d0e0fd9bc0..fe38df8e2b6f 100644 --- a/drivers/video/intelfb/intelfbhw.c +++ b/drivers/video/intelfb/intelfbhw.c | |||
@@ -56,17 +56,16 @@ static struct pll_min_max plls[PLLS_MAX] = { | |||
56 | 6, 16, 3, 16, | 56 | 6, 16, 3, 16, |
57 | 4, 128, 0, 31, | 57 | 4, 128, 0, 31, |
58 | 930000, 1400000, 165000, 48000, | 58 | 930000, 1400000, 165000, 48000, |
59 | 4, 2 }, //I8xx | 59 | 4, 2 }, /* I8xx */ |
60 | 60 | ||
61 | { 75, 120, 10, 20, | 61 | { 75, 120, 10, 20, |
62 | 5, 9, 4, 7, | 62 | 5, 9, 4, 7, |
63 | 5, 80, 1, 8, | 63 | 5, 80, 1, 8, |
64 | 1400000, 2800000, 200000, 96000, | 64 | 1400000, 2800000, 200000, 96000, |
65 | 10, 5 } //I9xx | 65 | 10, 5 } /* I9xx */ |
66 | }; | 66 | }; |
67 | 67 | ||
68 | int | 68 | int intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo) |
69 | intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo) | ||
70 | { | 69 | { |
71 | u32 tmp; | 70 | u32 tmp; |
72 | if (!pdev || !dinfo) | 71 | if (!pdev || !dinfo) |
@@ -149,9 +148,8 @@ intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo) | |||
149 | } | 148 | } |
150 | } | 149 | } |
151 | 150 | ||
152 | int | 151 | int intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size, |
153 | intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size, | 152 | int *stolen_size) |
154 | int *stolen_size) | ||
155 | { | 153 | { |
156 | struct pci_dev *bridge_dev; | 154 | struct pci_dev *bridge_dev; |
157 | u16 tmp; | 155 | u16 tmp; |
@@ -254,8 +252,7 @@ intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size, | |||
254 | } | 252 | } |
255 | } | 253 | } |
256 | 254 | ||
257 | int | 255 | int intelfbhw_check_non_crt(struct intelfb_info *dinfo) |
258 | intelfbhw_check_non_crt(struct intelfb_info *dinfo) | ||
259 | { | 256 | { |
260 | int dvo = 0; | 257 | int dvo = 0; |
261 | 258 | ||
@@ -271,8 +268,7 @@ intelfbhw_check_non_crt(struct intelfb_info *dinfo) | |||
271 | return dvo; | 268 | return dvo; |
272 | } | 269 | } |
273 | 270 | ||
274 | const char * | 271 | const char * intelfbhw_dvo_to_string(int dvo) |
275 | intelfbhw_dvo_to_string(int dvo) | ||
276 | { | 272 | { |
277 | if (dvo & DVOA_PORT) | 273 | if (dvo & DVOA_PORT) |
278 | return "DVO port A"; | 274 | return "DVO port A"; |
@@ -287,9 +283,8 @@ intelfbhw_dvo_to_string(int dvo) | |||
287 | } | 283 | } |
288 | 284 | ||
289 | 285 | ||
290 | int | 286 | int intelfbhw_validate_mode(struct intelfb_info *dinfo, |
291 | intelfbhw_validate_mode(struct intelfb_info *dinfo, | 287 | struct fb_var_screeninfo *var) |
292 | struct fb_var_screeninfo *var) | ||
293 | { | 288 | { |
294 | int bytes_per_pixel; | 289 | int bytes_per_pixel; |
295 | int tmp; | 290 | int tmp; |
@@ -345,8 +340,7 @@ intelfbhw_validate_mode(struct intelfb_info *dinfo, | |||
345 | return 0; | 340 | return 0; |
346 | } | 341 | } |
347 | 342 | ||
348 | int | 343 | int intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
349 | intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | ||
350 | { | 344 | { |
351 | struct intelfb_info *dinfo = GET_DINFO(info); | 345 | struct intelfb_info *dinfo = GET_DINFO(info); |
352 | u32 offset, xoffset, yoffset; | 346 | u32 offset, xoffset, yoffset; |
@@ -368,9 +362,10 @@ intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | |||
368 | offset += dinfo->fb.offset << 12; | 362 | offset += dinfo->fb.offset << 12; |
369 | 363 | ||
370 | dinfo->vsync.pan_offset = offset; | 364 | dinfo->vsync.pan_offset = offset; |
371 | if ((var->activate & FB_ACTIVATE_VBL) && !intelfbhw_enable_irq(dinfo, 0)) { | 365 | if ((var->activate & FB_ACTIVATE_VBL) && |
366 | !intelfbhw_enable_irq(dinfo, 0)) | ||
372 | dinfo->vsync.pan_display = 1; | 367 | dinfo->vsync.pan_display = 1; |
373 | } else { | 368 | else { |
374 | dinfo->vsync.pan_display = 0; | 369 | dinfo->vsync.pan_display = 0; |
375 | OUTREG(DSPABASE, offset); | 370 | OUTREG(DSPABASE, offset); |
376 | } | 371 | } |
@@ -379,8 +374,7 @@ intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | |||
379 | } | 374 | } |
380 | 375 | ||
381 | /* Blank the screen. */ | 376 | /* Blank the screen. */ |
382 | void | 377 | void intelfbhw_do_blank(int blank, struct fb_info *info) |
383 | intelfbhw_do_blank(int blank, struct fb_info *info) | ||
384 | { | 378 | { |
385 | struct intelfb_info *dinfo = GET_DINFO(info); | 379 | struct intelfb_info *dinfo = GET_DINFO(info); |
386 | u32 tmp; | 380 | u32 tmp; |
@@ -405,11 +399,10 @@ intelfbhw_do_blank(int blank, struct fb_info *info) | |||
405 | DBG_MSG("cursor_on is %d\n", dinfo->cursor_on); | 399 | DBG_MSG("cursor_on is %d\n", dinfo->cursor_on); |
406 | #endif | 400 | #endif |
407 | if (dinfo->cursor_on) { | 401 | if (dinfo->cursor_on) { |
408 | if (blank) { | 402 | if (blank) |
409 | intelfbhw_cursor_hide(dinfo); | 403 | intelfbhw_cursor_hide(dinfo); |
410 | } else { | 404 | else |
411 | intelfbhw_cursor_show(dinfo); | 405 | intelfbhw_cursor_show(dinfo); |
412 | } | ||
413 | dinfo->cursor_on = 1; | 406 | dinfo->cursor_on = 1; |
414 | } | 407 | } |
415 | dinfo->cursor_blanked = blank; | 408 | dinfo->cursor_blanked = blank; |
@@ -437,10 +430,9 @@ intelfbhw_do_blank(int blank, struct fb_info *info) | |||
437 | } | 430 | } |
438 | 431 | ||
439 | 432 | ||
440 | void | 433 | void intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno, |
441 | intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno, | 434 | unsigned red, unsigned green, unsigned blue, |
442 | unsigned red, unsigned green, unsigned blue, | 435 | unsigned transp) |
443 | unsigned transp) | ||
444 | { | 436 | { |
445 | #if VERBOSE > 0 | 437 | #if VERBOSE > 0 |
446 | DBG_MSG("intelfbhw_setcolreg: %d: (%d, %d, %d)\n", | 438 | DBG_MSG("intelfbhw_setcolreg: %d: (%d, %d, %d)\n", |
@@ -457,9 +449,8 @@ intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno, | |||
457 | } | 449 | } |
458 | 450 | ||
459 | 451 | ||
460 | int | 452 | int intelfbhw_read_hw_state(struct intelfb_info *dinfo, |
461 | intelfbhw_read_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw, | 453 | struct intelfb_hwstate *hw, int flag) |
462 | int flag) | ||
463 | { | 454 | { |
464 | int i; | 455 | int i; |
465 | 456 | ||
@@ -606,7 +597,8 @@ static int calc_vclock3(int index, int m, int n, int p) | |||
606 | return plls[index].ref_clk * m / n / p; | 597 | return plls[index].ref_clk * m / n / p; |
607 | } | 598 | } |
608 | 599 | ||
609 | static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2, int lvds) | 600 | static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2, |
601 | int lvds) | ||
610 | { | 602 | { |
611 | struct pll_min_max *pll = &plls[index]; | 603 | struct pll_min_max *pll = &plls[index]; |
612 | u32 m, vco, p; | 604 | u32 m, vco, p; |
@@ -615,17 +607,16 @@ static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2, int lvd | |||
615 | n += 2; | 607 | n += 2; |
616 | vco = pll->ref_clk * m / n; | 608 | vco = pll->ref_clk * m / n; |
617 | 609 | ||
618 | if (index == PLLS_I8xx) { | 610 | if (index == PLLS_I8xx) |
619 | p = ((p1 + 2) * (1 << (p2 + 1))); | 611 | p = ((p1 + 2) * (1 << (p2 + 1))); |
620 | } else { | 612 | else |
621 | p = ((p1) * (p2 ? 5 : 10)); | 613 | p = ((p1) * (p2 ? 5 : 10)); |
622 | } | ||
623 | return vco / p; | 614 | return vco / p; |
624 | } | 615 | } |
625 | 616 | ||
626 | #if REGDUMP | 617 | #if REGDUMP |
627 | static void | 618 | static void intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, |
628 | intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, int *o_p1, int *o_p2) | 619 | int *o_p1, int *o_p2) |
629 | { | 620 | { |
630 | int p1, p2; | 621 | int p1, p2; |
631 | 622 | ||
@@ -634,7 +625,7 @@ intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, int *o_p1, int *o_p2) | |||
634 | p1 = 1; | 625 | p1 = 1; |
635 | else | 626 | else |
636 | p1 = (dpll >> DPLL_P1_SHIFT) & 0xff; | 627 | p1 = (dpll >> DPLL_P1_SHIFT) & 0xff; |
637 | 628 | ||
638 | p1 = ffs(p1); | 629 | p1 = ffs(p1); |
639 | 630 | ||
640 | p2 = (dpll >> DPLL_I9XX_P2_SHIFT) & DPLL_P2_MASK; | 631 | p2 = (dpll >> DPLL_I9XX_P2_SHIFT) & DPLL_P2_MASK; |
@@ -652,8 +643,8 @@ intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, int *o_p1, int *o_p2) | |||
652 | #endif | 643 | #endif |
653 | 644 | ||
654 | 645 | ||
655 | void | 646 | void intelfbhw_print_hw_state(struct intelfb_info *dinfo, |
656 | intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw) | 647 | struct intelfb_hwstate *hw) |
657 | { | 648 | { |
658 | #if REGDUMP | 649 | #if REGDUMP |
659 | int i, m1, m2, n, p1, p2; | 650 | int i, m1, m2, n, p1, p2; |
@@ -666,7 +657,7 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw) | |||
666 | printk("hw state dump start\n"); | 657 | printk("hw state dump start\n"); |
667 | printk(" VGA0_DIVISOR: 0x%08x\n", hw->vga0_divisor); | 658 | printk(" VGA0_DIVISOR: 0x%08x\n", hw->vga0_divisor); |
668 | printk(" VGA1_DIVISOR: 0x%08x\n", hw->vga1_divisor); | 659 | printk(" VGA1_DIVISOR: 0x%08x\n", hw->vga1_divisor); |
669 | printk(" VGAPD: 0x%08x\n", hw->vga_pd); | 660 | printk(" VGAPD: 0x%08x\n", hw->vga_pd); |
670 | n = (hw->vga0_divisor >> FP_N_DIVISOR_SHIFT) & FP_DIVISOR_MASK; | 661 | n = (hw->vga0_divisor >> FP_N_DIVISOR_SHIFT) & FP_DIVISOR_MASK; |
671 | m1 = (hw->vga0_divisor >> FP_M1_DIVISOR_SHIFT) & FP_DIVISOR_MASK; | 662 | m1 = (hw->vga0_divisor >> FP_M1_DIVISOR_SHIFT) & FP_DIVISOR_MASK; |
672 | m2 = (hw->vga0_divisor >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; | 663 | m2 = (hw->vga0_divisor >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; |
@@ -685,7 +676,8 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw) | |||
685 | intelfbhw_get_p1p2(dinfo, hw->vga_pd, &p1, &p2); | 676 | intelfbhw_get_p1p2(dinfo, hw->vga_pd, &p1, &p2); |
686 | printk(" VGA1: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n", | 677 | printk(" VGA1: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n", |
687 | m1, m2, n, p1, p2); | 678 | m1, m2, n, p1, p2); |
688 | printk(" VGA1: clock is %d\n", calc_vclock(index, m1, m2, n, p1, p2, 0)); | 679 | printk(" VGA1: clock is %d\n", |
680 | calc_vclock(index, m1, m2, n, p1, p2, 0)); | ||
689 | 681 | ||
690 | printk(" DPLL_A: 0x%08x\n", hw->dpll_a); | 682 | printk(" DPLL_A: 0x%08x\n", hw->dpll_a); |
691 | printk(" DPLL_B: 0x%08x\n", hw->dpll_b); | 683 | printk(" DPLL_B: 0x%08x\n", hw->dpll_b); |
@@ -702,7 +694,8 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw) | |||
702 | 694 | ||
703 | printk(" PLLA0: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n", | 695 | printk(" PLLA0: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n", |
704 | m1, m2, n, p1, p2); | 696 | m1, m2, n, p1, p2); |
705 | printk(" PLLA0: clock is %d\n", calc_vclock(index, m1, m2, n, p1, p2, 0)); | 697 | printk(" PLLA0: clock is %d\n", |
698 | calc_vclock(index, m1, m2, n, p1, p2, 0)); | ||
706 | 699 | ||
707 | n = (hw->fpa1 >> FP_N_DIVISOR_SHIFT) & FP_DIVISOR_MASK; | 700 | n = (hw->fpa1 >> FP_N_DIVISOR_SHIFT) & FP_DIVISOR_MASK; |
708 | m1 = (hw->fpa1 >> FP_M1_DIVISOR_SHIFT) & FP_DIVISOR_MASK; | 701 | m1 = (hw->fpa1 >> FP_M1_DIVISOR_SHIFT) & FP_DIVISOR_MASK; |
@@ -712,7 +705,8 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw) | |||
712 | 705 | ||
713 | printk(" PLLA1: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n", | 706 | printk(" PLLA1: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n", |
714 | m1, m2, n, p1, p2); | 707 | m1, m2, n, p1, p2); |
715 | printk(" PLLA1: clock is %d\n", calc_vclock(index, m1, m2, n, p1, p2, 0)); | 708 | printk(" PLLA1: clock is %d\n", |
709 | calc_vclock(index, m1, m2, n, p1, p2, 0)); | ||
716 | 710 | ||
717 | #if 0 | 711 | #if 0 |
718 | printk(" PALETTE_A:\n"); | 712 | printk(" PALETTE_A:\n"); |
@@ -817,8 +811,8 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw) | |||
817 | 811 | ||
818 | 812 | ||
819 | /* Split the M parameter into M1 and M2. */ | 813 | /* Split the M parameter into M1 and M2. */ |
820 | static int | 814 | static int splitm(int index, unsigned int m, unsigned int *retm1, |
821 | splitm(int index, unsigned int m, unsigned int *retm1, unsigned int *retm2) | 815 | unsigned int *retm2) |
822 | { | 816 | { |
823 | int m1, m2; | 817 | int m1, m2; |
824 | int testm; | 818 | int testm; |
@@ -839,8 +833,8 @@ splitm(int index, unsigned int m, unsigned int *retm1, unsigned int *retm2) | |||
839 | } | 833 | } |
840 | 834 | ||
841 | /* Split the P parameter into P1 and P2. */ | 835 | /* Split the P parameter into P1 and P2. */ |
842 | static int | 836 | static int splitp(int index, unsigned int p, unsigned int *retp1, |
843 | splitp(int index, unsigned int p, unsigned int *retp1, unsigned int *retp2) | 837 | unsigned int *retp2) |
844 | { | 838 | { |
845 | int p1, p2; | 839 | int p1, p2; |
846 | struct pll_min_max *pll = &plls[index]; | 840 | struct pll_min_max *pll = &plls[index]; |
@@ -874,9 +868,8 @@ splitp(int index, unsigned int p, unsigned int *retp1, unsigned int *retp2) | |||
874 | } | 868 | } |
875 | } | 869 | } |
876 | 870 | ||
877 | static int | 871 | static int calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, |
878 | calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *retp1, | 872 | u32 *retn, u32 *retp1, u32 *retp2, u32 *retclock) |
879 | u32 *retp2, u32 *retclock) | ||
880 | { | 873 | { |
881 | u32 m1, m2, n, p1, p2, n1, testm; | 874 | u32 m1, m2, n, p1, p2, n1, testm; |
882 | u32 f_vco, p, p_best = 0, m, f_out = 0; | 875 | u32 f_vco, p, p_best = 0, m, f_out = 0; |
@@ -971,8 +964,8 @@ calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *re | |||
971 | return 0; | 964 | return 0; |
972 | } | 965 | } |
973 | 966 | ||
974 | static __inline__ int | 967 | static __inline__ int check_overflow(u32 value, u32 limit, |
975 | check_overflow(u32 value, u32 limit, const char *description) | 968 | const char *description) |
976 | { | 969 | { |
977 | if (value > limit) { | 970 | if (value > limit) { |
978 | WRN_MSG("%s value %d exceeds limit %d\n", | 971 | WRN_MSG("%s value %d exceeds limit %d\n", |
@@ -983,9 +976,9 @@ check_overflow(u32 value, u32 limit, const char *description) | |||
983 | } | 976 | } |
984 | 977 | ||
985 | /* It is assumed that hw is filled in with the initial state information. */ | 978 | /* It is assumed that hw is filled in with the initial state information. */ |
986 | int | 979 | int intelfbhw_mode_to_hw(struct intelfb_info *dinfo, |
987 | intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw, | 980 | struct intelfb_hwstate *hw, |
988 | struct fb_var_screeninfo *var) | 981 | struct fb_var_screeninfo *var) |
989 | { | 982 | { |
990 | int pipe = PIPE_A; | 983 | int pipe = PIPE_A; |
991 | u32 *dpll, *fp0, *fp1; | 984 | u32 *dpll, *fp0, *fp1; |
@@ -1089,9 +1082,8 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw, | |||
1089 | if (IS_I9XX(dinfo)) { | 1082 | if (IS_I9XX(dinfo)) { |
1090 | *dpll |= (p2 << DPLL_I9XX_P2_SHIFT); | 1083 | *dpll |= (p2 << DPLL_I9XX_P2_SHIFT); |
1091 | *dpll |= (1 << (p1 - 1)) << DPLL_P1_SHIFT; | 1084 | *dpll |= (1 << (p1 - 1)) << DPLL_P1_SHIFT; |
1092 | } else { | 1085 | } else |
1093 | *dpll |= (p2 << DPLL_P2_SHIFT) | (p1 << DPLL_P1_SHIFT); | 1086 | *dpll |= (p2 << DPLL_P2_SHIFT) | (p1 << DPLL_P1_SHIFT); |
1094 | } | ||
1095 | 1087 | ||
1096 | *fp0 = (n << FP_N_DIVISOR_SHIFT) | | 1088 | *fp0 = (n << FP_N_DIVISOR_SHIFT) | |
1097 | (m1 << FP_M1_DIVISOR_SHIFT) | | 1089 | (m1 << FP_M1_DIVISOR_SHIFT) | |
@@ -1226,9 +1218,8 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw, | |||
1226 | } | 1218 | } |
1227 | 1219 | ||
1228 | /* Program a (non-VGA) video mode. */ | 1220 | /* Program a (non-VGA) video mode. */ |
1229 | int | 1221 | int intelfbhw_program_mode(struct intelfb_info *dinfo, |
1230 | intelfbhw_program_mode(struct intelfb_info *dinfo, | 1222 | const struct intelfb_hwstate *hw, int blank) |
1231 | const struct intelfb_hwstate *hw, int blank) | ||
1232 | { | 1223 | { |
1233 | int pipe = PIPE_A; | 1224 | int pipe = PIPE_A; |
1234 | u32 tmp; | 1225 | u32 tmp; |
@@ -1324,7 +1315,7 @@ intelfbhw_program_mode(struct intelfb_info *dinfo, | |||
1324 | tmp &= ~PIPECONF_ENABLE; | 1315 | tmp &= ~PIPECONF_ENABLE; |
1325 | OUTREG(pipe_conf_reg, tmp); | 1316 | OUTREG(pipe_conf_reg, tmp); |
1326 | } | 1317 | } |
1327 | } while(count < 2000); | 1318 | } while (count < 2000); |
1328 | 1319 | ||
1329 | OUTREG(ADPA, INREG(ADPA) & ~ADPA_DAC_ENABLE); | 1320 | OUTREG(ADPA, INREG(ADPA) & ~ADPA_DAC_ENABLE); |
1330 | 1321 | ||
@@ -1448,8 +1439,7 @@ static u32 get_ring_space(struct intelfb_info *dinfo) | |||
1448 | return ring_space; | 1439 | return ring_space; |
1449 | } | 1440 | } |
1450 | 1441 | ||
1451 | static int | 1442 | static int wait_ring(struct intelfb_info *dinfo, int n) |
1452 | wait_ring(struct intelfb_info *dinfo, int n) | ||
1453 | { | 1443 | { |
1454 | int i = 0; | 1444 | int i = 0; |
1455 | unsigned long end; | 1445 | unsigned long end; |
@@ -1491,16 +1481,15 @@ wait_ring(struct intelfb_info *dinfo, int n) | |||
1491 | return i; | 1481 | return i; |
1492 | } | 1482 | } |
1493 | 1483 | ||
1494 | static void | 1484 | static void do_flush(struct intelfb_info *dinfo) |
1495 | do_flush(struct intelfb_info *dinfo) { | 1485 | { |
1496 | START_RING(2); | 1486 | START_RING(2); |
1497 | OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); | 1487 | OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); |
1498 | OUT_RING(MI_NOOP); | 1488 | OUT_RING(MI_NOOP); |
1499 | ADVANCE_RING(); | 1489 | ADVANCE_RING(); |
1500 | } | 1490 | } |
1501 | 1491 | ||
1502 | void | 1492 | void intelfbhw_do_sync(struct intelfb_info *dinfo) |
1503 | intelfbhw_do_sync(struct intelfb_info *dinfo) | ||
1504 | { | 1493 | { |
1505 | #if VERBOSE > 0 | 1494 | #if VERBOSE > 0 |
1506 | DBG_MSG("intelfbhw_do_sync\n"); | 1495 | DBG_MSG("intelfbhw_do_sync\n"); |
@@ -1519,8 +1508,7 @@ intelfbhw_do_sync(struct intelfb_info *dinfo) | |||
1519 | dinfo->ring_space = dinfo->ring.size - RING_MIN_FREE; | 1508 | dinfo->ring_space = dinfo->ring.size - RING_MIN_FREE; |
1520 | } | 1509 | } |
1521 | 1510 | ||
1522 | static void | 1511 | static void refresh_ring(struct intelfb_info *dinfo) |
1523 | refresh_ring(struct intelfb_info *dinfo) | ||
1524 | { | 1512 | { |
1525 | #if VERBOSE > 0 | 1513 | #if VERBOSE > 0 |
1526 | DBG_MSG("refresh_ring\n"); | 1514 | DBG_MSG("refresh_ring\n"); |
@@ -1531,8 +1519,7 @@ refresh_ring(struct intelfb_info *dinfo) | |||
1531 | dinfo->ring_space = get_ring_space(dinfo); | 1519 | dinfo->ring_space = get_ring_space(dinfo); |
1532 | } | 1520 | } |
1533 | 1521 | ||
1534 | static void | 1522 | static void reset_state(struct intelfb_info *dinfo) |
1535 | reset_state(struct intelfb_info *dinfo) | ||
1536 | { | 1523 | { |
1537 | int i; | 1524 | int i; |
1538 | u32 tmp; | 1525 | u32 tmp; |
@@ -1562,12 +1549,11 @@ reset_state(struct intelfb_info *dinfo) | |||
1562 | } | 1549 | } |
1563 | 1550 | ||
1564 | /* Stop the 2D engine, and turn off the ring buffer. */ | 1551 | /* Stop the 2D engine, and turn off the ring buffer. */ |
1565 | void | 1552 | void intelfbhw_2d_stop(struct intelfb_info *dinfo) |
1566 | intelfbhw_2d_stop(struct intelfb_info *dinfo) | ||
1567 | { | 1553 | { |
1568 | #if VERBOSE > 0 | 1554 | #if VERBOSE > 0 |
1569 | DBG_MSG("intelfbhw_2d_stop: accel: %d, ring_active: %d\n", dinfo->accel, | 1555 | DBG_MSG("intelfbhw_2d_stop: accel: %d, ring_active: %d\n", |
1570 | dinfo->ring_active); | 1556 | dinfo->accel, dinfo->ring_active); |
1571 | #endif | 1557 | #endif |
1572 | 1558 | ||
1573 | if (!dinfo->accel) | 1559 | if (!dinfo->accel) |
@@ -1582,8 +1568,7 @@ intelfbhw_2d_stop(struct intelfb_info *dinfo) | |||
1582 | * It is assumed that the graphics engine has been stopped by previously | 1568 | * It is assumed that the graphics engine has been stopped by previously |
1583 | * calling intelfb_2d_stop(). | 1569 | * calling intelfb_2d_stop(). |
1584 | */ | 1570 | */ |
1585 | void | 1571 | void intelfbhw_2d_start(struct intelfb_info *dinfo) |
1586 | intelfbhw_2d_start(struct intelfb_info *dinfo) | ||
1587 | { | 1572 | { |
1588 | #if VERBOSE > 0 | 1573 | #if VERBOSE > 0 |
1589 | DBG_MSG("intelfbhw_2d_start: accel: %d, ring_active: %d\n", | 1574 | DBG_MSG("intelfbhw_2d_start: accel: %d, ring_active: %d\n", |
@@ -1607,9 +1592,8 @@ intelfbhw_2d_start(struct intelfb_info *dinfo) | |||
1607 | } | 1592 | } |
1608 | 1593 | ||
1609 | /* 2D fillrect (solid fill or invert) */ | 1594 | /* 2D fillrect (solid fill or invert) */ |
1610 | void | 1595 | void intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, u32 w, |
1611 | intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, u32 w, u32 h, | 1596 | u32 h, u32 color, u32 pitch, u32 bpp, u32 rop) |
1612 | u32 color, u32 pitch, u32 bpp, u32 rop) | ||
1613 | { | 1597 | { |
1614 | u32 br00, br09, br13, br14, br16; | 1598 | u32 br00, br09, br13, br14, br16; |
1615 | 1599 | ||
@@ -1698,9 +1682,9 @@ intelfbhw_do_bitblt(struct intelfb_info *dinfo, u32 curx, u32 cury, | |||
1698 | ADVANCE_RING(); | 1682 | ADVANCE_RING(); |
1699 | } | 1683 | } |
1700 | 1684 | ||
1701 | int | 1685 | int intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, u32 w, |
1702 | intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, u32 w, | 1686 | u32 h, const u8* cdat, u32 x, u32 y, u32 pitch, |
1703 | u32 h, const u8* cdat, u32 x, u32 y, u32 pitch, u32 bpp) | 1687 | u32 bpp) |
1704 | { | 1688 | { |
1705 | int nbytes, ndwords, pad, tmp; | 1689 | int nbytes, ndwords, pad, tmp; |
1706 | u32 br00, br09, br13, br18, br19, br22, br23; | 1690 | u32 br00, br09, br13, br18, br19, br22, br23; |
@@ -1787,8 +1771,7 @@ intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, u32 w, | |||
1787 | } | 1771 | } |
1788 | 1772 | ||
1789 | /* HW cursor functions. */ | 1773 | /* HW cursor functions. */ |
1790 | void | 1774 | void intelfbhw_cursor_init(struct intelfb_info *dinfo) |
1791 | intelfbhw_cursor_init(struct intelfb_info *dinfo) | ||
1792 | { | 1775 | { |
1793 | u32 tmp; | 1776 | u32 tmp; |
1794 | 1777 | ||
@@ -1819,8 +1802,7 @@ intelfbhw_cursor_init(struct intelfb_info *dinfo) | |||
1819 | } | 1802 | } |
1820 | } | 1803 | } |
1821 | 1804 | ||
1822 | void | 1805 | void intelfbhw_cursor_hide(struct intelfb_info *dinfo) |
1823 | intelfbhw_cursor_hide(struct intelfb_info *dinfo) | ||
1824 | { | 1806 | { |
1825 | u32 tmp; | 1807 | u32 tmp; |
1826 | 1808 | ||
@@ -1845,8 +1827,7 @@ intelfbhw_cursor_hide(struct intelfb_info *dinfo) | |||
1845 | } | 1827 | } |
1846 | } | 1828 | } |
1847 | 1829 | ||
1848 | void | 1830 | void intelfbhw_cursor_show(struct intelfb_info *dinfo) |
1849 | intelfbhw_cursor_show(struct intelfb_info *dinfo) | ||
1850 | { | 1831 | { |
1851 | u32 tmp; | 1832 | u32 tmp; |
1852 | 1833 | ||
@@ -1875,8 +1856,7 @@ intelfbhw_cursor_show(struct intelfb_info *dinfo) | |||
1875 | } | 1856 | } |
1876 | } | 1857 | } |
1877 | 1858 | ||
1878 | void | 1859 | void intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y) |
1879 | intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y) | ||
1880 | { | 1860 | { |
1881 | u32 tmp; | 1861 | u32 tmp; |
1882 | 1862 | ||
@@ -1894,13 +1874,11 @@ intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y) | |||
1894 | ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT); | 1874 | ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT); |
1895 | OUTREG(CURSOR_A_POSITION, tmp); | 1875 | OUTREG(CURSOR_A_POSITION, tmp); |
1896 | 1876 | ||
1897 | if (IS_I9XX(dinfo)) { | 1877 | if (IS_I9XX(dinfo)) |
1898 | OUTREG(CURSOR_A_BASEADDR, dinfo->cursor.physical); | 1878 | OUTREG(CURSOR_A_BASEADDR, dinfo->cursor.physical); |
1899 | } | ||
1900 | } | 1879 | } |
1901 | 1880 | ||
1902 | void | 1881 | void intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, u32 fg) |
1903 | intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, u32 fg) | ||
1904 | { | 1882 | { |
1905 | #if VERBOSE > 0 | 1883 | #if VERBOSE > 0 |
1906 | DBG_MSG("intelfbhw_cursor_setcolor\n"); | 1884 | DBG_MSG("intelfbhw_cursor_setcolor\n"); |
@@ -1912,9 +1890,8 @@ intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, u32 fg) | |||
1912 | OUTREG(CURSOR_A_PALETTE3, bg & CURSOR_PALETTE_MASK); | 1890 | OUTREG(CURSOR_A_PALETTE3, bg & CURSOR_PALETTE_MASK); |
1913 | } | 1891 | } |
1914 | 1892 | ||
1915 | void | 1893 | void intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, int height, |
1916 | intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, int height, | 1894 | u8 *data) |
1917 | u8 *data) | ||
1918 | { | 1895 | { |
1919 | u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual; | 1896 | u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual; |
1920 | int i, j, w = width / 8; | 1897 | int i, j, w = width / 8; |
@@ -1942,8 +1919,8 @@ intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, int height, | |||
1942 | } | 1919 | } |
1943 | } | 1920 | } |
1944 | 1921 | ||
1945 | void | 1922 | void intelfbhw_cursor_reset(struct intelfb_info *dinfo) |
1946 | intelfbhw_cursor_reset(struct intelfb_info *dinfo) { | 1923 | { |
1947 | u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual; | 1924 | u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual; |
1948 | int i, j; | 1925 | int i, j; |
1949 | 1926 | ||
@@ -2047,8 +2024,8 @@ intelfbhw_disable_irq(struct intelfb_info *dinfo) { | |||
2047 | } | 2024 | } |
2048 | } | 2025 | } |
2049 | 2026 | ||
2050 | int | 2027 | int intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe) |
2051 | intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe) { | 2028 | { |
2052 | struct intelfb_vsync *vsync; | 2029 | struct intelfb_vsync *vsync; |
2053 | unsigned int count; | 2030 | unsigned int count; |
2054 | int ret; | 2031 | int ret; |
@@ -2062,15 +2039,14 @@ intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe) { | |||
2062 | } | 2039 | } |
2063 | 2040 | ||
2064 | ret = intelfbhw_enable_irq(dinfo, 0); | 2041 | ret = intelfbhw_enable_irq(dinfo, 0); |
2065 | if (ret) { | 2042 | if (ret) |
2066 | return ret; | 2043 | return ret; |
2067 | } | ||
2068 | 2044 | ||
2069 | count = vsync->count; | 2045 | count = vsync->count; |
2070 | ret = wait_event_interruptible_timeout(vsync->wait, count != vsync->count, HZ/10); | 2046 | ret = wait_event_interruptible_timeout(vsync->wait, |
2071 | if (ret < 0) { | 2047 | count != vsync->count, HZ / 10); |
2048 | if (ret < 0) | ||
2072 | return ret; | 2049 | return ret; |
2073 | } | ||
2074 | if (ret == 0) { | 2050 | if (ret == 0) { |
2075 | intelfbhw_enable_irq(dinfo, 1); | 2051 | intelfbhw_enable_irq(dinfo, 1); |
2076 | DBG_MSG("wait_for_vsync timed out!\n"); | 2052 | DBG_MSG("wait_for_vsync timed out!\n"); |