diff options
author | Juergen Beisert <j.beisert@pengutronix.de> | 2008-12-16 05:44:07 -0500 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2008-12-16 09:40:19 -0500 |
commit | 72330b0eeefc7abda35b5af55d0e2a9a3d05f04c (patch) | |
tree | 3ef28181ee934ccf41b614c98ce542a58baa89cd /drivers/video/imxfb.c | |
parent | 74b114fe2cfff9986b2469b3eb0035ca3d325d00 (diff) |
i.MX Framebuffer: Use readl/writel instead of direct pointer deref
This patch prepares the current i.MX1 framebuffer driver for usage in the
whole i.MX family. It switches to readl/writel for register accesses.
Also it moves the register definitions to the driver where they belong.
Acked-by: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/video/imxfb.c')
-rw-r--r-- | drivers/video/imxfb.c | 193 |
1 files changed, 128 insertions, 65 deletions
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index a990d432f524..1bccf5ad0c7d 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c | |||
@@ -16,7 +16,6 @@ | |||
16 | * linux-arm-kernel@lists.arm.linux.org.uk | 16 | * linux-arm-kernel@lists.arm.linux.org.uk |
17 | */ | 17 | */ |
18 | 18 | ||
19 | //#define DEBUG 1 | ||
20 | 19 | ||
21 | #include <linux/module.h> | 20 | #include <linux/module.h> |
22 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
@@ -32,9 +31,8 @@ | |||
32 | #include <linux/cpufreq.h> | 31 | #include <linux/cpufreq.h> |
33 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
34 | #include <linux/dma-mapping.h> | 33 | #include <linux/dma-mapping.h> |
34 | #include <linux/io.h> | ||
35 | 35 | ||
36 | #include <mach/hardware.h> | ||
37 | #include <asm/io.h> | ||
38 | #include <mach/imxfb.h> | 36 | #include <mach/imxfb.h> |
39 | 37 | ||
40 | /* | 38 | /* |
@@ -44,6 +42,73 @@ | |||
44 | 42 | ||
45 | #include "imxfb.h" | 43 | #include "imxfb.h" |
46 | 44 | ||
45 | #define DRIVER_NAME "imx-fb" | ||
46 | |||
47 | #define LCDC_SSA 0x00 | ||
48 | |||
49 | #define LCDC_SIZE 0x04 | ||
50 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | ||
51 | #define SIZE_YMAX(y) ((y) & 0x1ff) | ||
52 | |||
53 | #define LCDC_VPW 0x08 | ||
54 | #define VPW_VPW(x) ((x) & 0x3ff) | ||
55 | |||
56 | #define LCDC_CPOS 0x0C | ||
57 | #define CPOS_CC1 (1<<31) | ||
58 | #define CPOS_CC0 (1<<30) | ||
59 | #define CPOS_OP (1<<28) | ||
60 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | ||
61 | #define CPOS_CYP(y) ((y) & 0x1ff) | ||
62 | |||
63 | #define LCDC_LCWHB 0x10 | ||
64 | #define LCWHB_BK_EN (1<<31) | ||
65 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | ||
66 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | ||
67 | #define LCWHB_BD(x) ((x) & 0xff) | ||
68 | |||
69 | #define LCDC_LCHCC 0x14 | ||
70 | #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) | ||
71 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) | ||
72 | #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) | ||
73 | |||
74 | #define LCDC_PCR 0x18 | ||
75 | |||
76 | #define LCDC_HCR 0x1C | ||
77 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | ||
78 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | ||
79 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | ||
80 | |||
81 | #define LCDC_VCR 0x20 | ||
82 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | ||
83 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | ||
84 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | ||
85 | |||
86 | #define LCDC_POS 0x24 | ||
87 | #define POS_POS(x) ((x) & 1f) | ||
88 | |||
89 | #define LCDC_LSCR1 0x28 | ||
90 | /* bit fields in imxfb.h */ | ||
91 | |||
92 | #define LCDC_PWMR 0x2C | ||
93 | /* bit fields in imxfb.h */ | ||
94 | |||
95 | #define LCDC_DMACR 0x30 | ||
96 | /* bit fields in imxfb.h */ | ||
97 | |||
98 | #define LCDC_RMCR 0x34 | ||
99 | #define RMCR_LCDC_EN (1<<1) | ||
100 | #define RMCR_SELF_REF (1<<0) | ||
101 | |||
102 | #define LCDC_LCDICR 0x38 | ||
103 | #define LCDICR_INT_SYN (1<<2) | ||
104 | #define LCDICR_INT_CON (1) | ||
105 | |||
106 | #define LCDC_LCDISR 0x40 | ||
107 | #define LCDISR_UDR_ERR (1<<3) | ||
108 | #define LCDISR_ERR_RES (1<<2) | ||
109 | #define LCDISR_EOF (1<<1) | ||
110 | #define LCDISR_BOF (1<<0) | ||
111 | |||
47 | static struct imxfb_rgb def_rgb_16 = { | 112 | static struct imxfb_rgb def_rgb_16 = { |
48 | .red = { .offset = 8, .length = 4, }, | 113 | .red = { .offset = 8, .length = 4, }, |
49 | .green = { .offset = 4, .length = 4, }, | 114 | .green = { .offset = 4, .length = 4, }, |
@@ -67,7 +132,6 @@ static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |||
67 | return chan << bf->offset; | 132 | return chan << bf->offset; |
68 | } | 133 | } |
69 | 134 | ||
70 | #define LCDC_PALETTE(x) __REG2(IMX_LCDC_BASE+0x800, (x)<<2) | ||
71 | static int | 135 | static int |
72 | imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, | 136 | imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
73 | u_int trans, struct fb_info *info) | 137 | u_int trans, struct fb_info *info) |
@@ -81,7 +145,7 @@ imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, | |||
81 | (CNVT_TOHW(green,4) << 4) | | 145 | (CNVT_TOHW(green,4) << 4) | |
82 | CNVT_TOHW(blue, 4); | 146 | CNVT_TOHW(blue, 4); |
83 | 147 | ||
84 | LCDC_PALETTE(regno) = val; | 148 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
85 | ret = 0; | 149 | ret = 0; |
86 | } | 150 | } |
87 | return ret; | 151 | return ret; |
@@ -235,18 +299,23 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) | |||
235 | pr_debug("Enabling LCD controller\n"); | 299 | pr_debug("Enabling LCD controller\n"); |
236 | 300 | ||
237 | /* initialize LCDC */ | 301 | /* initialize LCDC */ |
238 | LCDC_RMCR &= ~RMCR_LCDC_EN; /* just to be safe... */ | 302 | writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN, |
303 | fbi->regs + LCDC_RMCR); /* just to be safe... */ | ||
304 | |||
305 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); | ||
239 | 306 | ||
240 | LCDC_SSA = fbi->screen_dma; | ||
241 | /* physical screen start address */ | 307 | /* physical screen start address */ |
242 | LCDC_VPW = VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4); | 308 | writel(VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4), |
309 | fbi->regs + LCDC_VPW); | ||
243 | 310 | ||
244 | LCDC_POS = 0x00000000; /* panning offset 0 (0 pixel offset) */ | 311 | /* panning offset 0 (0 pixel offset) */ |
312 | writel(0x00000000, fbi->regs + LCDC_POS); | ||
245 | 313 | ||
246 | /* disable hardware cursor */ | 314 | /* disable hardware cursor */ |
247 | LCDC_CPOS &= ~(CPOS_CC0 | CPOS_CC1); | 315 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
316 | fbi->regs + LCDC_CPOS); | ||
248 | 317 | ||
249 | LCDC_RMCR = RMCR_LCDC_EN; | 318 | writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); |
250 | 319 | ||
251 | if(fbi->backlight_power) | 320 | if(fbi->backlight_power) |
252 | fbi->backlight_power(1); | 321 | fbi->backlight_power(1); |
@@ -263,7 +332,7 @@ static void imxfb_disable_controller(struct imxfb_info *fbi) | |||
263 | if(fbi->lcd_power) | 332 | if(fbi->lcd_power) |
264 | fbi->lcd_power(0); | 333 | fbi->lcd_power(0); |
265 | 334 | ||
266 | LCDC_RMCR = 0; | 335 | writel(0, fbi->regs + LCDC_RMCR); |
267 | } | 336 | } |
268 | 337 | ||
269 | static int imxfb_blank(int blank, struct fb_info *info) | 338 | static int imxfb_blank(int blank, struct fb_info *info) |
@@ -340,19 +409,22 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf | |||
340 | info->fix.id, var->lower_margin); | 409 | info->fix.id, var->lower_margin); |
341 | #endif | 410 | #endif |
342 | 411 | ||
343 | LCDC_HCR = HCR_H_WIDTH(var->hsync_len) | | 412 | writel(HCR_H_WIDTH(var->hsync_len) | |
344 | HCR_H_WAIT_1(var->left_margin) | | 413 | HCR_H_WAIT_1(var->left_margin) | |
345 | HCR_H_WAIT_2(var->right_margin); | 414 | HCR_H_WAIT_2(var->right_margin), |
415 | fbi->regs + LCDC_HCR); | ||
346 | 416 | ||
347 | LCDC_VCR = VCR_V_WIDTH(var->vsync_len) | | 417 | writel(VCR_V_WIDTH(var->vsync_len) | |
348 | VCR_V_WAIT_1(var->upper_margin) | | 418 | VCR_V_WAIT_1(var->upper_margin) | |
349 | VCR_V_WAIT_2(var->lower_margin); | 419 | VCR_V_WAIT_2(var->lower_margin), |
420 | fbi->regs + LCDC_VCR); | ||
350 | 421 | ||
351 | LCDC_SIZE = SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres); | 422 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
352 | LCDC_PCR = fbi->pcr; | 423 | fbi->regs + LCDC_SIZE); |
353 | LCDC_PWMR = fbi->pwmr; | 424 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
354 | LCDC_LSCR1 = fbi->lscr1; | 425 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); |
355 | LCDC_DMACR = fbi->dmacr; | 426 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); |
427 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | ||
356 | 428 | ||
357 | return 0; | 429 | return 0; |
358 | } | 430 | } |
@@ -384,10 +456,10 @@ static int imxfb_resume(struct platform_device *dev) | |||
384 | #define imxfb_resume NULL | 456 | #define imxfb_resume NULL |
385 | #endif | 457 | #endif |
386 | 458 | ||
387 | static int __init imxfb_init_fbinfo(struct device *dev) | 459 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
388 | { | 460 | { |
389 | struct imxfb_mach_info *inf = dev->platform_data; | 461 | struct imxfb_mach_info *inf = pdev->dev.platform_data; |
390 | struct fb_info *info = dev_get_drvdata(dev); | 462 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
391 | struct imxfb_info *fbi = info->par; | 463 | struct imxfb_info *fbi = info->par; |
392 | 464 | ||
393 | pr_debug("%s\n",__func__); | 465 | pr_debug("%s\n",__func__); |
@@ -397,7 +469,6 @@ static int __init imxfb_init_fbinfo(struct device *dev) | |||
397 | return -ENOMEM; | 469 | return -ENOMEM; |
398 | 470 | ||
399 | memset(fbi, 0, sizeof(struct imxfb_info)); | 471 | memset(fbi, 0, sizeof(struct imxfb_info)); |
400 | fbi->dev = dev; | ||
401 | 472 | ||
402 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | 473 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); |
403 | 474 | ||
@@ -453,31 +524,6 @@ static int __init imxfb_init_fbinfo(struct device *dev) | |||
453 | return 0; | 524 | return 0; |
454 | } | 525 | } |
455 | 526 | ||
456 | /* | ||
457 | * Allocates the DRAM memory for the frame buffer. This buffer is | ||
458 | * remapped into a non-cached, non-buffered, memory region to | ||
459 | * allow pixel writes to occur without flushing the cache. | ||
460 | * Once this area is remapped, all virtual memory access to the | ||
461 | * video memory should occur at the new region. | ||
462 | */ | ||
463 | static int __init imxfb_map_video_memory(struct fb_info *info) | ||
464 | { | ||
465 | struct imxfb_info *fbi = info->par; | ||
466 | |||
467 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); | ||
468 | fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size, | ||
469 | &fbi->map_dma,GFP_KERNEL); | ||
470 | |||
471 | if (fbi->map_cpu) { | ||
472 | info->screen_base = fbi->map_cpu; | ||
473 | fbi->screen_cpu = fbi->map_cpu; | ||
474 | fbi->screen_dma = fbi->map_dma; | ||
475 | info->fix.smem_start = fbi->screen_dma; | ||
476 | } | ||
477 | |||
478 | return fbi->map_cpu ? 0 : -ENOMEM; | ||
479 | } | ||
480 | |||
481 | static int __init imxfb_probe(struct platform_device *pdev) | 527 | static int __init imxfb_probe(struct platform_device *pdev) |
482 | { | 528 | { |
483 | struct imxfb_info *fbi; | 529 | struct imxfb_info *fbi; |
@@ -506,23 +552,38 @@ static int __init imxfb_probe(struct platform_device *pdev) | |||
506 | 552 | ||
507 | platform_set_drvdata(pdev, info); | 553 | platform_set_drvdata(pdev, info); |
508 | 554 | ||
509 | ret = imxfb_init_fbinfo(&pdev->dev); | 555 | ret = imxfb_init_fbinfo(pdev); |
510 | if( ret < 0 ) | 556 | if( ret < 0 ) |
511 | goto failed_init; | 557 | goto failed_init; |
512 | 558 | ||
513 | res = request_mem_region(res->start, res->end - res->start + 1, "IMXFB"); | 559 | res = request_mem_region(res->start, resource_size(res), |
560 | DRIVER_NAME); | ||
514 | if (!res) { | 561 | if (!res) { |
515 | ret = -EBUSY; | 562 | ret = -EBUSY; |
516 | goto failed_regs; | 563 | goto failed_req; |
564 | } | ||
565 | |||
566 | fbi->regs = ioremap(res->start, resource_size(res)); | ||
567 | if (fbi->regs == NULL) { | ||
568 | printk(KERN_ERR"Cannot map frame buffer registers\n"); | ||
569 | goto failed_ioremap; | ||
517 | } | 570 | } |
518 | 571 | ||
519 | if (!inf->fixed_screen_cpu) { | 572 | if (!inf->fixed_screen_cpu) { |
520 | ret = imxfb_map_video_memory(info); | 573 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
521 | if (ret) { | 574 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, |
575 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | ||
576 | |||
577 | if (!fbi->map_cpu) { | ||
522 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); | 578 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
523 | ret = -ENOMEM; | 579 | ret = -ENOMEM; |
524 | goto failed_map; | 580 | goto failed_map; |
525 | } | 581 | } |
582 | |||
583 | info->screen_base = fbi->map_cpu; | ||
584 | fbi->screen_cpu = fbi->map_cpu; | ||
585 | fbi->screen_dma = fbi->map_dma; | ||
586 | info->fix.smem_start = fbi->screen_dma; | ||
526 | } else { | 587 | } else { |
527 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | 588 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ |
528 | fbi->map_cpu = inf->fixed_screen_cpu; | 589 | fbi->map_cpu = inf->fixed_screen_cpu; |
@@ -559,18 +620,20 @@ failed_register: | |||
559 | failed_cmap: | 620 | failed_cmap: |
560 | if (!inf->fixed_screen_cpu) | 621 | if (!inf->fixed_screen_cpu) |
561 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, | 622 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
562 | fbi->map_dma); | 623 | fbi->map_dma); |
563 | failed_map: | 624 | failed_map: |
564 | kfree(info->pseudo_palette); | 625 | iounmap(fbi->regs); |
565 | failed_regs: | 626 | failed_ioremap: |
566 | release_mem_region(res->start, res->end - res->start); | 627 | release_mem_region(res->start, res->end - res->start); |
628 | failed_req: | ||
629 | kfree(info->pseudo_palette); | ||
567 | failed_init: | 630 | failed_init: |
568 | platform_set_drvdata(pdev, NULL); | 631 | platform_set_drvdata(pdev, NULL); |
569 | framebuffer_release(info); | 632 | framebuffer_release(info); |
570 | return ret; | 633 | return ret; |
571 | } | 634 | } |
572 | 635 | ||
573 | static int imxfb_remove(struct platform_device *pdev) | 636 | static int __devexit imxfb_remove(struct platform_device *pdev) |
574 | { | 637 | { |
575 | struct fb_info *info = platform_get_drvdata(pdev); | 638 | struct fb_info *info = platform_get_drvdata(pdev); |
576 | struct imxfb_info *fbi = info->par; | 639 | struct imxfb_info *fbi = info->par; |
@@ -586,6 +649,7 @@ static int imxfb_remove(struct platform_device *pdev) | |||
586 | kfree(info->pseudo_palette); | 649 | kfree(info->pseudo_palette); |
587 | framebuffer_release(info); | 650 | framebuffer_release(info); |
588 | 651 | ||
652 | iounmap(fbi->regs); | ||
589 | release_mem_region(res->start, res->end - res->start + 1); | 653 | release_mem_region(res->start, res->end - res->start + 1); |
590 | platform_set_drvdata(pdev, NULL); | 654 | platform_set_drvdata(pdev, NULL); |
591 | 655 | ||
@@ -600,19 +664,18 @@ void imxfb_shutdown(struct platform_device * dev) | |||
600 | } | 664 | } |
601 | 665 | ||
602 | static struct platform_driver imxfb_driver = { | 666 | static struct platform_driver imxfb_driver = { |
603 | .probe = imxfb_probe, | ||
604 | .suspend = imxfb_suspend, | 667 | .suspend = imxfb_suspend, |
605 | .resume = imxfb_resume, | 668 | .resume = imxfb_resume, |
606 | .remove = imxfb_remove, | 669 | .remove = __devexit_p(imxfb_remove), |
607 | .shutdown = imxfb_shutdown, | 670 | .shutdown = imxfb_shutdown, |
608 | .driver = { | 671 | .driver = { |
609 | .name = "imx-fb", | 672 | .name = DRIVER_NAME, |
610 | }, | 673 | }, |
611 | }; | 674 | }; |
612 | 675 | ||
613 | int __init imxfb_init(void) | 676 | int __init imxfb_init(void) |
614 | { | 677 | { |
615 | return platform_driver_register(&imxfb_driver); | 678 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
616 | } | 679 | } |
617 | 680 | ||
618 | static void __exit imxfb_cleanup(void) | 681 | static void __exit imxfb_cleanup(void) |