aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video/geode/display_gx.h
diff options
context:
space:
mode:
authorDavid Vrabel <dvrabel@arcom.com>2006-03-27 04:17:23 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-27 11:44:55 -0500
commitfc4effc7a98d0d320e478d1d42bc4a8a64380150 (patch)
tree2291ae0b2eca05c45399f6f161714f3083269f1d /drivers/video/geode/display_gx.h
parent7a07cd786dbd0111b9dd977e114438220cb4eee5 (diff)
[PATCH] fbdev: framebuffer driver for Geode GX
A framebuffer driver for the display controller in AMD Geode GX processors (Geode GX533, Geode GX500 etc.). Tested at 640x480, 800x600, 1024x768 and 1280x1024 at 8, 16, and 24 bpp with both CRT and TFT. No accelerated features currently implemented and compression remains disabled. This driver requires that the BIOS (or the SoftVG/Firmbase code in the BIOS) has created an appropriate virtual PCI header. Signed-off-by: David Vrabel <dvrabel@arcom.com> Signed-off-by: Antonino Daplas <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/video/geode/display_gx.h')
-rw-r--r--drivers/video/geode/display_gx.h96
1 files changed, 96 insertions, 0 deletions
diff --git a/drivers/video/geode/display_gx.h b/drivers/video/geode/display_gx.h
new file mode 100644
index 000000000000..86c623361305
--- /dev/null
+++ b/drivers/video/geode/display_gx.h
@@ -0,0 +1,96 @@
1/*
2 * Geode GX display controller
3 *
4 * Copyright (C) 2006 Arcom Control Systems Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11#ifndef __DISPLAY_GX_H__
12#define __DISPLAY_GX_H__
13
14int gx_frame_buffer_size(void);
15int gx_line_delta(int xres, int bpp);
16
17extern struct geode_dc_ops gx_dc_ops;
18
19/* Display controller registers */
20
21#define DC_UNLOCK 0x00
22# define DC_UNLOCK_CODE 0x00004758
23
24#define DC_GENERAL_CFG 0x04
25# define DC_GCFG_DFLE 0x00000001
26# define DC_GCFG_CURE 0x00000002
27# define DC_GCFG_ICNE 0x00000004
28# define DC_GCFG_VIDE 0x00000008
29# define DC_GCFG_CMPE 0x00000020
30# define DC_GCFG_DECE 0x00000040
31# define DC_GCFG_VGAE 0x00000080
32# define DC_GCFG_DFHPSL_MASK 0x00000F00
33# define DC_GCFG_DFHPSL_POS 8
34# define DC_GCFG_DFHPEL_MASK 0x0000F000
35# define DC_GCFG_DFHPEL_POS 12
36# define DC_GCFG_STFM 0x00010000
37# define DC_GCFG_FDTY 0x00020000
38# define DC_GCFG_VGAFT 0x00040000
39# define DC_GCFG_VDSE 0x00080000
40# define DC_GCFG_YUVM 0x00100000
41# define DC_GCFG_VFSL 0x00800000
42# define DC_GCFG_SIGE 0x01000000
43# define DC_GCFG_SGRE 0x02000000
44# define DC_GCFG_SGFR 0x04000000
45# define DC_GCFG_CRC_MODE 0x08000000
46# define DC_GCFG_DIAG 0x10000000
47# define DC_GCFG_CFRW 0x20000000
48
49#define DC_DISPLAY_CFG 0x08
50# define DC_DCFG_TGEN 0x00000001
51# define DC_DCFG_GDEN 0x00000008
52# define DC_DCFG_VDEN 0x00000010
53# define DC_DCFG_TRUP 0x00000040
54# define DC_DCFG_DISP_MODE_MASK 0x00000300
55# define DC_DCFG_DISP_MODE_8BPP 0x00000000
56# define DC_DCFG_DISP_MODE_16BPP 0x00000100
57# define DC_DCFG_DISP_MODE_24BPP 0x00000200
58# define DC_DCFG_16BPP_MODE_MASK 0x00000c00
59# define DC_DCFG_16BPP_MODE_565 0x00000000
60# define DC_DCFG_16BPP_MODE_555 0x00000100
61# define DC_DCFG_16BPP_MODE_444 0x00000200
62# define DC_DCFG_DCEN 0x00080000
63# define DC_DCFG_PALB 0x02000000
64# define DC_DCFG_FRLK 0x04000000
65# define DC_DCFG_VISL 0x08000000
66# define DC_DCFG_FRSL 0x20000000
67# define DC_DCFG_A18M 0x40000000
68# define DC_DCFG_A20M 0x80000000
69
70#define DC_FB_ST_OFFSET 0x10
71
72#define DC_LINE_SIZE 0x30
73# define DC_LINE_SIZE_FB_LINE_SIZE_MASK 0x000007ff
74# define DC_LINE_SIZE_FB_LINE_SIZE_POS 0
75# define DC_LINE_SIZE_CB_LINE_SIZE_MASK 0x007f0000
76# define DC_LINE_SIZE_CB_LINE_SIZE_POS 16
77# define DC_LINE_SIZE_VID_LINE_SIZE_MASK 0xff000000
78# define DC_LINE_SIZE_VID_LINE_SIZE_POS 24
79
80#define DC_GFX_PITCH 0x34
81# define DC_GFX_PITCH_FB_PITCH_MASK 0x0000ffff
82# define DC_GFX_PITCH_FB_PITCH_POS 0
83# define DC_GFX_PITCH_CB_PITCH_MASK 0xffff0000
84# define DC_GFX_PITCH_CB_PITCH_POS 16
85
86#define DC_H_ACTIVE_TIMING 0x40
87#define DC_H_BLANK_TIMING 0x44
88#define DC_H_SYNC_TIMING 0x48
89#define DC_V_ACTIVE_TIMING 0x50
90#define DC_V_BLANK_TIMING 0x54
91#define DC_V_SYNC_TIMING 0x58
92
93#define DC_PAL_ADDRESS 0x70
94#define DC_PAL_DATA 0x74
95
96#endif /* !__DISPLAY_GX1_H__ */