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authorKrzysztof Helt <krzysztof.h1@wp.pl>2009-03-31 18:25:04 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-04-01 11:59:26 -0400
commit55a4ea6ab0fff0c02f101a60d2ba4f1794990499 (patch)
treed96c20273c540c41cfc91dc59197dad534060d2d /drivers/video/cirrusfb.c
parent75ed3a17a5bc0ecff5c256cfb81ed06f8a6fbb54 (diff)
cirrusfb: fix Laguna chipset memory detection and clock setting
Fix memory detection and clock setting for Cirrus Laguna chipsets (GD5464/GD5465). The changes are done after the Xorg code. The driver still does not display anything on the GD5465 but it switches resolutions correctly at least. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/cirrusfb.c')
-rw-r--r--drivers/video/cirrusfb.c65
1 files changed, 38 insertions, 27 deletions
diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c
index 3b4b0f1e0615..dd09bae910f0 100644
--- a/drivers/video/cirrusfb.c
+++ b/drivers/video/cirrusfb.c
@@ -867,19 +867,24 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
867 } 867 }
868 } 868 }
869 if (nom) { 869 if (nom) {
870 vga_wseq(regbase, CL_SEQRB, nom);
871 tmp = den << 1; 870 tmp = den << 1;
872 if (div != 0) 871 if (div != 0)
873 tmp |= 1; 872 tmp |= 1;
874
875 /* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */ 873 /* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */
876 if ((cinfo->btype == BT_SD64) || 874 if ((cinfo->btype == BT_SD64) ||
877 (cinfo->btype == BT_ALPINE) || 875 (cinfo->btype == BT_ALPINE) ||
878 (cinfo->btype == BT_GD5480)) 876 (cinfo->btype == BT_GD5480))
879 tmp |= 0x80; 877 tmp |= 0x80;
880 878
881 dev_dbg(info->device, "CL_SEQR1B: %ld\n", (long) tmp); 879 dev_dbg(info->device, "CL_SEQR1B: %d\n", (int) tmp);
882 vga_wseq(regbase, CL_SEQR1B, tmp); 880 /* Laguna chipset has reversed clock registers */
881 if (cinfo->btype == BT_LAGUNA) {
882 vga_wseq(regbase, CL_SEQRE, tmp);
883 vga_wseq(regbase, CL_SEQR1E, nom);
884 } else {
885 vga_wseq(regbase, CL_SEQRB, nom);
886 vga_wseq(regbase, CL_SEQR1B, tmp);
887 }
883 } 888 }
884 889
885 if (yres >= 1024) 890 if (yres >= 1024)
@@ -1917,31 +1922,37 @@ static unsigned int __devinit cirrusfb_get_memsize(struct fb_info *info,
1917 u8 __iomem *regbase) 1922 u8 __iomem *regbase)
1918{ 1923{
1919 unsigned long mem; 1924 unsigned long mem;
1920 unsigned char SRF; 1925 struct cirrusfb_info *cinfo = info->par;
1921 1926
1922 SRF = vga_rseq(regbase, CL_SEQRF); 1927 if (cinfo->btype == BT_LAGUNA) {
1923 switch ((SRF & 0x18)) { 1928 unsigned char SR14 = vga_rseq(regbase, CL_SEQR14);
1924 case 0x08: 1929
1925 mem = 512 * 1024; 1930 mem = ((SR14 & 7) + 1) << 20;
1926 break; 1931 } else {
1927 case 0x10: 1932 unsigned char SRF = vga_rseq(regbase, CL_SEQRF);
1928 mem = 1024 * 1024; 1933 switch ((SRF & 0x18)) {
1929 break; 1934 case 0x08:
1930 /* 64-bit DRAM data bus width; assume 2MB. Also indicates 2MB memory 1935 mem = 512 * 1024;
1931 * on the 5430. 1936 break;
1932 */ 1937 case 0x10:
1933 case 0x18: 1938 mem = 1024 * 1024;
1934 mem = 2048 * 1024; 1939 break;
1935 break; 1940 /* 64-bit DRAM data bus width; assume 2MB.
1936 default: 1941 * Also indicates 2MB memory on the 5430.
1937 dev_warn(info->device, "CLgenfb: Unknown memory size!\n"); 1942 */
1938 mem = 1024 * 1024; 1943 case 0x18:
1944 mem = 2048 * 1024;
1945 break;
1946 default:
1947 dev_warn(info->device, "Unknown memory size!\n");
1948 mem = 1024 * 1024;
1949 }
1950 /* If DRAM bank switching is enabled, there must be
1951 * twice as much memory installed. (4MB on the 5434)
1952 */
1953 if (SRF & 0x80)
1954 mem *= 2;
1939 } 1955 }
1940 if (SRF & 0x80)
1941 /* If DRAM bank switching is enabled, there must be twice as much
1942 * memory installed. (4MB on the 5434)
1943 */
1944 mem *= 2;
1945 1956
1946 /* TODO: Handling of GD5446/5480 (see XF86 sources ...) */ 1957 /* TODO: Handling of GD5446/5480 (see XF86 sources ...) */
1947 return mem; 1958 return mem;