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authorJean Delvare <khali@linux-fr.org>2008-04-28 05:15:13 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-28 11:58:38 -0400
commitbc3bf466e4a0a53d5c78561594c9cb4225bbb481 (patch)
tree5a6a5fb136ee0f36cbe5aca9de7a1ec9aad24064 /drivers/video/aty/radeon_base.c
parentb0313f89672eddf0188dac96bb8f83135510a45c (diff)
radeonfb: drop redundant RTRACE macro
RTRACE() does exactly the same thing as the standard pr_debug() call, so just use the latter. Signed-off-by: Jean Delvare <khali@linux-fr.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/aty/radeon_base.c')
-rw-r--r--drivers/video/aty/radeon_base.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c
index 10f32c83c96a..72cd0d2f14ec 100644
--- a/drivers/video/aty/radeon_base.c
+++ b/drivers/video/aty/radeon_base.c
@@ -1490,7 +1490,7 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
1490 freq = rinfo->pll.ppll_max; 1490 freq = rinfo->pll.ppll_max;
1491 if (freq*12 < rinfo->pll.ppll_min) 1491 if (freq*12 < rinfo->pll.ppll_min)
1492 freq = rinfo->pll.ppll_min / 12; 1492 freq = rinfo->pll.ppll_min / 12;
1493 RTRACE("freq = %lu, PLL min = %u, PLL max = %u\n", 1493 pr_debug("freq = %lu, PLL min = %u, PLL max = %u\n",
1494 freq, rinfo->pll.ppll_min, rinfo->pll.ppll_max); 1494 freq, rinfo->pll.ppll_min, rinfo->pll.ppll_max);
1495 1495
1496 for (post_div = &post_divs[0]; post_div->divider; ++post_div) { 1496 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
@@ -1511,7 +1511,7 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
1511 post_div = &post_divs[post_div->bitvalue]; 1511 post_div = &post_divs[post_div->bitvalue];
1512 pll_output_freq = post_div->divider * freq; 1512 pll_output_freq = post_div->divider * freq;
1513 } 1513 }
1514 RTRACE("ref_div = %d, ref_clk = %d, output_freq = %d\n", 1514 pr_debug("ref_div = %d, ref_clk = %d, output_freq = %d\n",
1515 rinfo->pll.ref_div, rinfo->pll.ref_clk, 1515 rinfo->pll.ref_div, rinfo->pll.ref_clk,
1516 pll_output_freq); 1516 pll_output_freq);
1517 1517
@@ -1521,7 +1521,7 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
1521 post_div = &post_divs[post_div->bitvalue]; 1521 post_div = &post_divs[post_div->bitvalue];
1522 pll_output_freq = post_div->divider * freq; 1522 pll_output_freq = post_div->divider * freq;
1523 } 1523 }
1524 RTRACE("ref_div = %d, ref_clk = %d, output_freq = %d\n", 1524 pr_debug("ref_div = %d, ref_clk = %d, output_freq = %d\n",
1525 rinfo->pll.ref_div, rinfo->pll.ref_clk, 1525 rinfo->pll.ref_div, rinfo->pll.ref_clk,
1526 pll_output_freq); 1526 pll_output_freq);
1527 1527
@@ -1530,9 +1530,9 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
1530 regs->ppll_ref_div = rinfo->pll.ref_div; 1530 regs->ppll_ref_div = rinfo->pll.ref_div;
1531 regs->ppll_div_3 = fb_div | (post_div->bitvalue << 16); 1531 regs->ppll_div_3 = fb_div | (post_div->bitvalue << 16);
1532 1532
1533 RTRACE("post div = 0x%x\n", post_div->bitvalue); 1533 pr_debug("post div = 0x%x\n", post_div->bitvalue);
1534 RTRACE("fb_div = 0x%x\n", fb_div); 1534 pr_debug("fb_div = 0x%x\n", fb_div);
1535 RTRACE("ppll_div_3 = 0x%x\n", regs->ppll_div_3); 1535 pr_debug("ppll_div_3 = 0x%x\n", regs->ppll_div_3);
1536} 1536}
1537 1537
1538static int radeonfb_set_par(struct fb_info *info) 1538static int radeonfb_set_par(struct fb_info *info)
@@ -1604,9 +1604,9 @@ static int radeonfb_set_par(struct fb_info *info)
1604 dotClock = 1000000000 / pixClock; 1604 dotClock = 1000000000 / pixClock;
1605 freq = dotClock / 10; /* x100 */ 1605 freq = dotClock / 10; /* x100 */
1606 1606
1607 RTRACE("hStart = %d, hEnd = %d, hTotal = %d\n", 1607 pr_debug("hStart = %d, hEnd = %d, hTotal = %d\n",
1608 hSyncStart, hSyncEnd, hTotal); 1608 hSyncStart, hSyncEnd, hTotal);
1609 RTRACE("vStart = %d, vEnd = %d, vTotal = %d\n", 1609 pr_debug("vStart = %d, vEnd = %d, vTotal = %d\n",
1610 vSyncStart, vSyncEnd, vTotal); 1610 vSyncStart, vSyncEnd, vTotal);
1611 1611
1612 hsync_wid = (hSyncEnd - hSyncStart) / 8; 1612 hsync_wid = (hSyncEnd - hSyncStart) / 8;
@@ -1715,16 +1715,16 @@ static int radeonfb_set_par(struct fb_info *info)
1715 newmode->surf_info[i] = 0; 1715 newmode->surf_info[i] = 0;
1716 } 1716 }
1717 1717
1718 RTRACE("h_total_disp = 0x%x\t hsync_strt_wid = 0x%x\n", 1718 pr_debug("h_total_disp = 0x%x\t hsync_strt_wid = 0x%x\n",
1719 newmode->crtc_h_total_disp, newmode->crtc_h_sync_strt_wid); 1719 newmode->crtc_h_total_disp, newmode->crtc_h_sync_strt_wid);
1720 RTRACE("v_total_disp = 0x%x\t vsync_strt_wid = 0x%x\n", 1720 pr_debug("v_total_disp = 0x%x\t vsync_strt_wid = 0x%x\n",
1721 newmode->crtc_v_total_disp, newmode->crtc_v_sync_strt_wid); 1721 newmode->crtc_v_total_disp, newmode->crtc_v_sync_strt_wid);
1722 1722
1723 rinfo->bpp = mode->bits_per_pixel; 1723 rinfo->bpp = mode->bits_per_pixel;
1724 rinfo->depth = depth; 1724 rinfo->depth = depth;
1725 1725
1726 RTRACE("pixclock = %lu\n", (unsigned long)pixClock); 1726 pr_debug("pixclock = %lu\n", (unsigned long)pixClock);
1727 RTRACE("freq = %lu\n", (unsigned long)freq); 1727 pr_debug("freq = %lu\n", (unsigned long)freq);
1728 1728
1729 /* We use PPLL_DIV_3 */ 1729 /* We use PPLL_DIV_3 */
1730 newmode->clk_cntl_index = 0x300; 1730 newmode->clk_cntl_index = 0x300;
@@ -1988,7 +1988,7 @@ static void fixup_memory_mappings(struct radeonfb_info *rinfo)
1988 if (rinfo->has_CRTC2) 1988 if (rinfo->has_CRTC2)
1989 OUTREG(CRTC2_GEN_CNTL, save_crtc2_gen_cntl); 1989 OUTREG(CRTC2_GEN_CNTL, save_crtc2_gen_cntl);
1990 1990
1991 RTRACE("aper_base: %08x MC_FB_LOC to: %08x, MC_AGP_LOC to: %08x\n", 1991 pr_debug("aper_base: %08x MC_FB_LOC to: %08x, MC_AGP_LOC to: %08x\n",
1992 aper_base, 1992 aper_base,
1993 ((aper_base + aper_size - 1) & 0xffff0000) | (aper_base >> 16), 1993 ((aper_base + aper_size - 1) & 0xffff0000) | (aper_base >> 16),
1994 0xffff0000 | (agp_base >> 16)); 1994 0xffff0000 | (agp_base >> 16));
@@ -2085,7 +2085,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
2085 * ToDo: identify these cases 2085 * ToDo: identify these cases
2086 */ 2086 */
2087 2087
2088 RTRACE("radeonfb (%s): Found %ldk of %s %d bits wide videoram\n", 2088 pr_debug("radeonfb (%s): Found %ldk of %s %d bits wide videoram\n",
2089 pci_name(rinfo->pdev), 2089 pci_name(rinfo->pdev),
2090 rinfo->video_ram / 1024, 2090 rinfo->video_ram / 1024,
2091 rinfo->vram_ddr ? "DDR" : "SDRAM", 2091 rinfo->vram_ddr ? "DDR" : "SDRAM",
@@ -2162,7 +2162,7 @@ static int __devinit radeonfb_pci_register (struct pci_dev *pdev,
2162 int ret; 2162 int ret;
2163 unsigned char c1, c2; 2163 unsigned char c1, c2;
2164 2164
2165 RTRACE("radeonfb_pci_register BEGIN\n"); 2165 pr_debug("radeonfb_pci_register BEGIN\n");
2166 2166
2167 /* Enable device in PCI config */ 2167 /* Enable device in PCI config */
2168 ret = pci_enable_device(pdev); 2168 ret = pci_enable_device(pdev);
@@ -2287,7 +2287,7 @@ static int __devinit radeonfb_pci_register (struct pci_dev *pdev,
2287 goto err_unmap_rom; 2287 goto err_unmap_rom;
2288 } 2288 }
2289 2289
2290 RTRACE("radeonfb (%s): mapped %ldk videoram\n", pci_name(rinfo->pdev), 2290 pr_debug("radeonfb (%s): mapped %ldk videoram\n", pci_name(rinfo->pdev),
2291 rinfo->mapped_vram/1024); 2291 rinfo->mapped_vram/1024);
2292 2292
2293 /* 2293 /*
@@ -2382,7 +2382,7 @@ static int __devinit radeonfb_pci_register (struct pci_dev *pdev,
2382 2382
2383 if (rinfo->bios_seg) 2383 if (rinfo->bios_seg)
2384 radeon_unmap_ROM(rinfo, pdev); 2384 radeon_unmap_ROM(rinfo, pdev);
2385 RTRACE("radeonfb_pci_register END\n"); 2385 pr_debug("radeonfb_pci_register END\n");
2386 2386
2387 return 0; 2387 return 0;
2388err_unmap_fb: 2388err_unmap_fb: