radeonfb: misc cleanup of engine and dst cache handling

Fix a couple of incomplete tests of the chip families in the engine
init/reset code and proper initialization of the destination cache mode.
The result should better match what the latest X radeon driver does.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

1 files changed, 5 insertions, 8 deletions

diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c
index 652273e9f5f9..d0f1a7fc2c9d 100644
--- a/drivers/video/aty/radeon_base.c
+++ b/drivers/video/aty/radeon_base.c
@@ -1286,11 +1286,10 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
         radeon_pll_errata_after_data(rinfo);
 
         /* Set PPLL ref. div */
-        if (rinfo->family == CHIP_FAMILY_R300 ||
+        if (IS_R300_VARIANT(rinfo) ||
             rinfo->family == CHIP_FAMILY_RS300 ||
-            rinfo->family == CHIP_FAMILY_R350 ||
-            rinfo->family == CHIP_FAMILY_RV350 ||
-            rinfo->family == CHIP_FAMILY_RV380 ) {
+            rinfo->family == CHIP_FAMILY_RS400 ||
+            rinfo->family == CHIP_FAMILY_RS480) {
                 if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) {
                         /* When restoring console mode, use saved PPLL_REF_DIV
                          * setting.
@@ -1461,10 +1460,7 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
                 /* Not all chip revs have the same format for this register,
                  * extract the source selection
                  */
-                if (rinfo->family == CHIP_FAMILY_R200 ||
-                    rinfo->family == CHIP_FAMILY_R300 ||
-                    rinfo->family == CHIP_FAMILY_R350 ||
-                    rinfo->family == CHIP_FAMILY_RV350) {
+                if (rinfo->family == CHIP_FAMILY_R200 || IS_R300_VARIANT(rinfo)) {
                         source = (fp2_gen_cntl >> 10) & 0x3;
                         /* sourced from transform unit, check for transform unit
                          * own source
@@ -2005,6 +2001,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
             (rinfo->family == CHIP_FAMILY_RS200) ||
             (rinfo->family == CHIP_FAMILY_RS300) ||
             (rinfo->family == CHIP_FAMILY_RC410) ||
+            (rinfo->family == CHIP_FAMILY_RS400) ||
             (rinfo->family == CHIP_FAMILY_RS480) ) {
           u32 tom = INREG(NB_TOM);
           tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);