diff options
author | David Miller <davem@davemloft.net> | 2011-01-11 18:52:40 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-03-22 02:47:26 -0400 |
commit | c5e04633b3b765a06986008e577930555e0f544b (patch) | |
tree | 398a5801a0aec9fa88c29572065f54ba7d070d7d /drivers/video/arkfb.c | |
parent | 38d2620ea40c2f9a5f17d6488bf004973570279c (diff) |
arkfb: Pass par->state.vgabase to vga_*() calls.
Instead of just plain NULL.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/video/arkfb.c')
-rw-r--r-- | drivers/video/arkfb.c | 60 |
1 files changed, 34 insertions, 26 deletions
diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index aded91b42c76..53c66e8dcb0b 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c | |||
@@ -473,32 +473,40 @@ static unsigned short dac_regs[4] = {0x3c8, 0x3c9, 0x3c6, 0x3c7}; | |||
473 | 473 | ||
474 | static void ark_dac_read_regs(void *data, u8 *code, int count) | 474 | static void ark_dac_read_regs(void *data, u8 *code, int count) |
475 | { | 475 | { |
476 | u8 regval = vga_rseq(NULL, 0x1C); | 476 | struct fb_info *info = data; |
477 | struct arkfb_info *par; | ||
478 | u8 regval; | ||
477 | 479 | ||
480 | par = info->par; | ||
481 | regval = vga_rseq(par->state.vgabase, 0x1C); | ||
478 | while (count != 0) | 482 | while (count != 0) |
479 | { | 483 | { |
480 | vga_wseq(NULL, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); | 484 | vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); |
481 | code[1] = vga_r(NULL, dac_regs[code[0] & 3]); | 485 | code[1] = vga_r(par->state.vgabase, dac_regs[code[0] & 3]); |
482 | count--; | 486 | count--; |
483 | code += 2; | 487 | code += 2; |
484 | } | 488 | } |
485 | 489 | ||
486 | vga_wseq(NULL, 0x1C, regval); | 490 | vga_wseq(par->state.vgabase, 0x1C, regval); |
487 | } | 491 | } |
488 | 492 | ||
489 | static void ark_dac_write_regs(void *data, u8 *code, int count) | 493 | static void ark_dac_write_regs(void *data, u8 *code, int count) |
490 | { | 494 | { |
491 | u8 regval = vga_rseq(NULL, 0x1C); | 495 | struct fb_info *info = data; |
496 | struct arkfb_info *par; | ||
497 | u8 regval; | ||
492 | 498 | ||
499 | par = info->par; | ||
500 | regval = vga_rseq(par->state.vgabase, 0x1C); | ||
493 | while (count != 0) | 501 | while (count != 0) |
494 | { | 502 | { |
495 | vga_wseq(NULL, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); | 503 | vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); |
496 | vga_w(NULL, dac_regs[code[0] & 3], code[1]); | 504 | vga_w(par->state.vgabase, dac_regs[code[0] & 3], code[1]); |
497 | count--; | 505 | count--; |
498 | code += 2; | 506 | code += 2; |
499 | } | 507 | } |
500 | 508 | ||
501 | vga_wseq(NULL, 0x1C, regval); | 509 | vga_wseq(par->state.vgabase, 0x1C, regval); |
502 | } | 510 | } |
503 | 511 | ||
504 | 512 | ||
@@ -514,8 +522,8 @@ static void ark_set_pixclock(struct fb_info *info, u32 pixclock) | |||
514 | } | 522 | } |
515 | 523 | ||
516 | /* Set VGA misc register */ | 524 | /* Set VGA misc register */ |
517 | regval = vga_r(NULL, VGA_MIS_R); | 525 | regval = vga_r(par->state.vgabase, VGA_MIS_R); |
518 | vga_w(NULL, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); | 526 | vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); |
519 | } | 527 | } |
520 | 528 | ||
521 | 529 | ||
@@ -671,15 +679,15 @@ static int arkfb_set_par(struct fb_info *info) | |||
671 | svga_wseq_mask(par->state.vgabase, 0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ | 679 | svga_wseq_mask(par->state.vgabase, 0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ |
672 | svga_wseq_mask(par->state.vgabase, 0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ | 680 | svga_wseq_mask(par->state.vgabase, 0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ |
673 | 681 | ||
674 | vga_wseq(NULL, 0x13, info->fix.smem_start >> 16); | 682 | vga_wseq(par->state.vgabase, 0x13, info->fix.smem_start >> 16); |
675 | vga_wseq(NULL, 0x14, info->fix.smem_start >> 24); | 683 | vga_wseq(par->state.vgabase, 0x14, info->fix.smem_start >> 24); |
676 | vga_wseq(NULL, 0x15, 0); | 684 | vga_wseq(par->state.vgabase, 0x15, 0); |
677 | vga_wseq(NULL, 0x16, 0); | 685 | vga_wseq(par->state.vgabase, 0x16, 0); |
678 | 686 | ||
679 | /* Set the FIFO threshold register */ | 687 | /* Set the FIFO threshold register */ |
680 | /* It is fascinating way to store 5-bit value in 8-bit register */ | 688 | /* It is fascinating way to store 5-bit value in 8-bit register */ |
681 | regval = 0x10 | ((threshold & 0x0E) >> 1) | (threshold & 0x01) << 7 | (threshold & 0x10) << 1; | 689 | regval = 0x10 | ((threshold & 0x0E) >> 1) | (threshold & 0x01) << 7 | (threshold & 0x10) << 1; |
682 | vga_wseq(NULL, 0x18, regval); | 690 | vga_wseq(par->state.vgabase, 0x18, regval); |
683 | 691 | ||
684 | /* Set the offset register */ | 692 | /* Set the offset register */ |
685 | pr_debug("fb%d: offset register : %d\n", info->node, offset_value); | 693 | pr_debug("fb%d: offset register : %d\n", info->node, offset_value); |
@@ -708,30 +716,30 @@ static int arkfb_set_par(struct fb_info *info) | |||
708 | pr_debug("fb%d: text mode\n", info->node); | 716 | pr_debug("fb%d: text mode\n", info->node); |
709 | svga_set_textmode_vga_regs(par->state.vgabase); | 717 | svga_set_textmode_vga_regs(par->state.vgabase); |
710 | 718 | ||
711 | vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ | 719 | vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ |
712 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ | 720 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ |
713 | dac_set_mode(par->dac, DAC_PSEUDO8_8); | 721 | dac_set_mode(par->dac, DAC_PSEUDO8_8); |
714 | 722 | ||
715 | break; | 723 | break; |
716 | case 1: | 724 | case 1: |
717 | pr_debug("fb%d: 4 bit pseudocolor\n", info->node); | 725 | pr_debug("fb%d: 4 bit pseudocolor\n", info->node); |
718 | vga_wgfx(NULL, VGA_GFX_MODE, 0x40); | 726 | vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); |
719 | 727 | ||
720 | vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ | 728 | vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ |
721 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ | 729 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ |
722 | dac_set_mode(par->dac, DAC_PSEUDO8_8); | 730 | dac_set_mode(par->dac, DAC_PSEUDO8_8); |
723 | break; | 731 | break; |
724 | case 2: | 732 | case 2: |
725 | pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); | 733 | pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); |
726 | 734 | ||
727 | vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ | 735 | vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ |
728 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ | 736 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ |
729 | dac_set_mode(par->dac, DAC_PSEUDO8_8); | 737 | dac_set_mode(par->dac, DAC_PSEUDO8_8); |
730 | break; | 738 | break; |
731 | case 3: | 739 | case 3: |
732 | pr_debug("fb%d: 8 bit pseudocolor\n", info->node); | 740 | pr_debug("fb%d: 8 bit pseudocolor\n", info->node); |
733 | 741 | ||
734 | vga_wseq(NULL, 0x11, 0x16); /* 8bpp accel mode */ | 742 | vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode */ |
735 | 743 | ||
736 | if (info->var.pixclock > 20000) { | 744 | if (info->var.pixclock > 20000) { |
737 | pr_debug("fb%d: not using multiplex\n", info->node); | 745 | pr_debug("fb%d: not using multiplex\n", info->node); |
@@ -747,21 +755,21 @@ static int arkfb_set_par(struct fb_info *info) | |||
747 | case 4: | 755 | case 4: |
748 | pr_debug("fb%d: 5/5/5 truecolor\n", info->node); | 756 | pr_debug("fb%d: 5/5/5 truecolor\n", info->node); |
749 | 757 | ||
750 | vga_wseq(NULL, 0x11, 0x1A); /* 16bpp accel mode */ | 758 | vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ |
751 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ | 759 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ |
752 | dac_set_mode(par->dac, DAC_RGB1555_16); | 760 | dac_set_mode(par->dac, DAC_RGB1555_16); |
753 | break; | 761 | break; |
754 | case 5: | 762 | case 5: |
755 | pr_debug("fb%d: 5/6/5 truecolor\n", info->node); | 763 | pr_debug("fb%d: 5/6/5 truecolor\n", info->node); |
756 | 764 | ||
757 | vga_wseq(NULL, 0x11, 0x1A); /* 16bpp accel mode */ | 765 | vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ |
758 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ | 766 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ |
759 | dac_set_mode(par->dac, DAC_RGB0565_16); | 767 | dac_set_mode(par->dac, DAC_RGB0565_16); |
760 | break; | 768 | break; |
761 | case 6: | 769 | case 6: |
762 | pr_debug("fb%d: 8/8/8 truecolor\n", info->node); | 770 | pr_debug("fb%d: 8/8/8 truecolor\n", info->node); |
763 | 771 | ||
764 | vga_wseq(NULL, 0x11, 0x16); /* 8bpp accel mode ??? */ | 772 | vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode ??? */ |
765 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ | 773 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ |
766 | dac_set_mode(par->dac, DAC_RGB0888_16); | 774 | dac_set_mode(par->dac, DAC_RGB0888_16); |
767 | hmul = 3; | 775 | hmul = 3; |
@@ -770,7 +778,7 @@ static int arkfb_set_par(struct fb_info *info) | |||
770 | case 7: | 778 | case 7: |
771 | pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); | 779 | pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); |
772 | 780 | ||
773 | vga_wseq(NULL, 0x11, 0x1E); /* 32bpp accel mode */ | 781 | vga_wseq(par->state.vgabase, 0x11, 0x1E); /* 32bpp accel mode */ |
774 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ | 782 | svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ |
775 | dac_set_mode(par->dac, DAC_RGB8888_16); | 783 | dac_set_mode(par->dac, DAC_RGB8888_16); |
776 | hmul = 2; | 784 | hmul = 2; |
@@ -789,7 +797,7 @@ static int arkfb_set_par(struct fb_info *info) | |||
789 | /* Set interlaced mode start/end register */ | 797 | /* Set interlaced mode start/end register */ |
790 | value = info->var.xres + info->var.left_margin + info->var.right_margin + info->var.hsync_len; | 798 | value = info->var.xres + info->var.left_margin + info->var.right_margin + info->var.hsync_len; |
791 | value = ((value * hmul / hdiv) / 8) - 5; | 799 | value = ((value * hmul / hdiv) / 8) - 5; |
792 | vga_wcrt(NULL, 0x42, (value + 1) / 2); | 800 | vga_wcrt(par->state.vgabase, 0x42, (value + 1) / 2); |
793 | 801 | ||
794 | memset_io(info->screen_base, 0x00, screen_size); | 802 | memset_io(info->screen_base, 0x00, screen_size); |
795 | /* Device and screen back on */ | 803 | /* Device and screen back on */ |
@@ -996,7 +1004,7 @@ static int __devinit ark_pci_probe(struct pci_dev *dev, const struct pci_device_ | |||
996 | } | 1004 | } |
997 | 1005 | ||
998 | /* FIXME get memsize */ | 1006 | /* FIXME get memsize */ |
999 | regval = vga_rseq(NULL, 0x10); | 1007 | regval = vga_rseq(par->state.vgabase, 0x10); |
1000 | info->screen_size = (1 << (regval >> 6)) << 20; | 1008 | info->screen_size = (1 << (regval >> 6)) << 20; |
1001 | info->fix.smem_len = info->screen_size; | 1009 | info->fix.smem_len = info->screen_size; |
1002 | 1010 | ||