vfio-pci: Manage user power state transitions

We give the user access to change the power state of the device but
certain transitions result in an uninitialized state which the user
cannot resolve.  To fix this we need to mark the PowerState field of
the PMCSR register read-only and effect the requested change on behalf
of the user.  This has the added benefit that pdev->current_state
remains accurate while controlled by the user.

The primary example of this bug is a QEMU guest doing a reboot where
the device it put into D3 on shutdown and becomes unusable on the next
boot because the device did a soft reset on D3->D0 (NoSoftRst-).

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>

1 files changed, 38 insertions, 3 deletions

diff --git a/drivers/vfio/pci/vfio_pci_config.c b/drivers/vfio/pci/vfio_pci_config.c
index f1dde2c0fe99..964ff22bf281 100644
--- a/drivers/vfio/pci/vfio_pci_config.c
+++ b/drivers/vfio/pci/vfio_pci_config.c
@@ -587,12 +587,46 @@ static int __init init_pci_cap_basic_perm(struct perm_bits *perm)
         return 0;
 }
 
+static int vfio_pm_config_write(struct vfio_pci_device *vdev, int pos,
+                                int count, struct perm_bits *perm,
+                                int offset, __le32 val)
+{
+        count = vfio_default_config_write(vdev, pos, count, perm, offset, val);
+        if (count < 0)
+                return count;
+
+        if (offset == PCI_PM_CTRL) {
+                pci_power_t state;
+
+                switch (le32_to_cpu(val) & PCI_PM_CTRL_STATE_MASK) {
+                case 0:
+                        state = PCI_D0;
+                        break;
+                case 1:
+                        state = PCI_D1;
+                        break;
+                case 2:
+                        state = PCI_D2;
+                        break;
+                case 3:
+                        state = PCI_D3hot;
+                        break;
+                }
+
+                pci_set_power_state(vdev->pdev, state);
+        }
+
+        return count;
+}
+
 /* Permissions for the Power Management capability */
 static int __init init_pci_cap_pm_perm(struct perm_bits *perm)
 {
         if (alloc_perm_bits(perm, pci_cap_length[PCI_CAP_ID_PM]))
                 return -ENOMEM;
 
+        perm->writefn = vfio_pm_config_write;
+
         /*
          * We always virtualize the next field so we can remove
          * capabilities from the chain if we want to.
@@ -600,10 +634,11 @@ static int __init init_pci_cap_pm_perm(struct perm_bits *perm)
         p_setb(perm, PCI_CAP_LIST_NEXT, (u8)ALL_VIRT, NO_WRITE);
 
         /*
-         * Power management is defined *per function*,
-         * so we let the user write this
+         * Power management is defined *per function*, so we can let
+         * the user change power state, but we trap and initiate the
+         * change ourselves, so the state bits are read-only.
          */
-        p_setd(perm, PCI_PM_CTRL, NO_VIRT, ALL_WRITE);
+        p_setd(perm, PCI_PM_CTRL, NO_VIRT, ~PCI_PM_CTRL_STATE_MASK);
         return 0;
 }