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authorRobert P. J. Day <rpjday@mindspring.com>2007-05-09 01:14:03 -0400
committerAdrian Bunk <bunk@stusta.de>2007-05-09 01:14:03 -0400
commitbeb7dd86a101263bf63a78c7c6d4da3849b35bd6 (patch)
tree9afe81ca9e92ab8aacc999ae118b27d547721f11 /drivers/usb
parent3dde6ad8fc3939d345a3768464ecff43c91d511a (diff)
Fix misspellings collected by members of KJ list.
Fix the misspellings of "propogate", "writting" and (oh, the shame :-) "kenrel" in the source tree. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/serial/aircable.c4
-rw-r--r--drivers/usb/serial/io_edgeport.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/usb/serial/aircable.c b/drivers/usb/serial/aircable.c
index b675735bfbee..fbc8c27d5d99 100644
--- a/drivers/usb/serial/aircable.c
+++ b/drivers/usb/serial/aircable.c
@@ -9,7 +9,7 @@
9 * The device works as an standard CDC device, it has 2 interfaces, the first 9 * The device works as an standard CDC device, it has 2 interfaces, the first
10 * one is for firmware access and the second is the serial one. 10 * one is for firmware access and the second is the serial one.
11 * The protocol is very simply, there are two posibilities reading or writing. 11 * The protocol is very simply, there are two posibilities reading or writing.
12 * When writting the first urb must have a Header that starts with 0x20 0x29 the 12 * When writing the first urb must have a Header that starts with 0x20 0x29 the
13 * next two bytes must say how much data will be sended. 13 * next two bytes must say how much data will be sended.
14 * When reading the process is almost equal except that the header starts with 14 * When reading the process is almost equal except that the header starts with
15 * 0x00 0x20. 15 * 0x00 0x20.
@@ -18,7 +18,7 @@
18 * buffer: The First and Second byte is used for a Header, the Third and Fourth 18 * buffer: The First and Second byte is used for a Header, the Third and Fourth
19 * tells the device the amount of information the package holds. 19 * tells the device the amount of information the package holds.
20 * Packages are 60 bytes long Header Stuff. 20 * Packages are 60 bytes long Header Stuff.
21 * When writting to the device the first two bytes of the header are 0x20 0x29 21 * When writing to the device the first two bytes of the header are 0x20 0x29
22 * When reading the bytes are 0x00 0x20, or 0x00 0x10, there is an strange 22 * When reading the bytes are 0x00 0x20, or 0x00 0x10, there is an strange
23 * situation, when too much data arrives to the device because it sends the data 23 * situation, when too much data arrives to the device because it sends the data
24 * but with out the header. I will use a simply hack to override this situation, 24 * but with out the header. I will use a simply hack to override this situation,
diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c
index 18f74ac76565..4807f960150b 100644
--- a/drivers/usb/serial/io_edgeport.c
+++ b/drivers/usb/serial/io_edgeport.c
@@ -2465,7 +2465,7 @@ static int send_cmd_write_uart_register (struct edgeport_port *edge_port, __u8 r
2465 ((edge_serial->is_epic) && 2465 ((edge_serial->is_epic) &&
2466 (!edge_serial->epic_descriptor.Supports.IOSPWriteMCR) && 2466 (!edge_serial->epic_descriptor.Supports.IOSPWriteMCR) &&
2467 (regNum == MCR))) { 2467 (regNum == MCR))) {
2468 dbg("SendCmdWriteUartReg - Not writting to MCR Register"); 2468 dbg("SendCmdWriteUartReg - Not writing to MCR Register");
2469 return 0; 2469 return 0;
2470 } 2470 }
2471 2471
@@ -2473,7 +2473,7 @@ static int send_cmd_write_uart_register (struct edgeport_port *edge_port, __u8 r
2473 ((edge_serial->is_epic) && 2473 ((edge_serial->is_epic) &&
2474 (!edge_serial->epic_descriptor.Supports.IOSPWriteLCR) && 2474 (!edge_serial->epic_descriptor.Supports.IOSPWriteLCR) &&
2475 (regNum == LCR))) { 2475 (regNum == LCR))) {
2476 dbg ("SendCmdWriteUartReg - Not writting to LCR Register"); 2476 dbg ("SendCmdWriteUartReg - Not writing to LCR Register");
2477 return 0; 2477 return 0;
2478 } 2478 }
2479 2479