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authorJan Andersson <jan@gaisler.com>2011-05-18 04:44:53 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-19 19:45:32 -0400
commitfda928ac97dbf0359f3dc4c96925b7b422b540d7 (patch)
tree639f263e553c22a666be46adb42816fb9b5a92f1 /drivers/usb
parentc936503fff31663a8625d23f528d868aa8c22570 (diff)
USB: UHCI: Support big endian GRUSBHC HC
This patch adds support for big endian GRUSBHC UHCI controllers. The HCD bus glue will probe the register interface to determine the endianness of the controller. Tested on GR-LEON4-ITX board which has a controller with little endian interface and on custom LEON3 board with a BE controller. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/host/Kconfig6
-rw-r--r--drivers/usb/host/uhci-grlib.c14
2 files changed, 18 insertions, 2 deletions
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 584424804d0b..ab085f12d570 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -418,11 +418,13 @@ config USB_UHCI_SUPPORT_NON_PCI_HC
418 418
419config USB_UHCI_BIG_ENDIAN_MMIO 419config USB_UHCI_BIG_ENDIAN_MMIO
420 bool 420 bool
421 depends on USB_UHCI_SUPPORT_NON_PCI_HC 421 depends on USB_UHCI_SUPPORT_NON_PCI_HC && SPARC_LEON
422 default y
422 423
423config USB_UHCI_BIG_ENDIAN_DESC 424config USB_UHCI_BIG_ENDIAN_DESC
424 bool 425 bool
425 depends on USB_UHCI_SUPPORT_NON_PCI_HC 426 depends on USB_UHCI_SUPPORT_NON_PCI_HC && SPARC_LEON
427 default y
426 428
427config USB_FHCI_HCD 429config USB_FHCI_HCD
428 tristate "Freescale QE USB Host Controller support" 430 tristate "Freescale QE USB Host Controller support"
diff --git a/drivers/usb/host/uhci-grlib.c b/drivers/usb/host/uhci-grlib.c
index b1addd60a1ef..d01c1e227681 100644
--- a/drivers/usb/host/uhci-grlib.c
+++ b/drivers/usb/host/uhci-grlib.c
@@ -25,6 +25,20 @@ static int uhci_grlib_init(struct usb_hcd *hcd)
25{ 25{
26 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 26 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
27 27
28 /*
29 * Probe to determine the endianness of the controller.
30 * We know that bit 7 of the PORTSC1 register is always set
31 * and bit 15 is always clear. If uhci_readw() yields a value
32 * with bit 7 (0x80) turned on then the current little-endian
33 * setting is correct. Otherwise we assume the value was
34 * byte-swapped; hence the register interface and presumably
35 * also the descriptors are big-endian.
36 */
37 if (!(uhci_readw(uhci, USBPORTSC1) & 0x80)) {
38 uhci->big_endian_mmio = 1;
39 uhci->big_endian_desc = 1;
40 }
41
28 uhci->rh_numports = uhci_count_ports(hcd); 42 uhci->rh_numports = uhci_count_ports(hcd);
29 43
30 /* Set up pointers to to generic functions */ 44 /* Set up pointers to to generic functions */