diff options
author | Paul Walmsley <paul@pwsan.com> | 2010-10-08 13:40:20 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-10-08 13:40:20 -0400 |
commit | 4814ced5116e3b73dc4f63eec84999739fc8ed11 (patch) | |
tree | a70a0a532d3c552c76c6a0e4dce13e5c492bd772 /drivers/usb | |
parent | aa218dafd7b37ba92fcfdd6d5c8d459772f88042 (diff) |
OMAP: control: move plat-omap/control.h to mach-omap2/control.h
Only OMAP2+ platforms have the System Control Module (SCM) IP block.
In the past, we've kept the SCM header file in plat-omap. This has
led to abuse - device drivers including it; includes being added that
create implicit dependencies on OMAP2+ builds; etc.
In response, move the SCM headers into mach-omap2/.
As part of this, remove the direct SCM access from the OMAP UDC
driver. It was clearly broken. The UDC code needs an indepth review for
use on OMAP2+ chips.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Cory Maccarrone <darkstar6262@gmail.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Diffstat (limited to 'drivers/usb')
-rw-r--r-- | drivers/usb/gadget/omap_udc.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c index f81e4f025f23..7f472a57490e 100644 --- a/drivers/usb/gadget/omap_udc.c +++ b/drivers/usb/gadget/omap_udc.c | |||
@@ -54,7 +54,6 @@ | |||
54 | 54 | ||
55 | #include <plat/dma.h> | 55 | #include <plat/dma.h> |
56 | #include <plat/usb.h> | 56 | #include <plat/usb.h> |
57 | #include <plat/control.h> | ||
58 | 57 | ||
59 | #include "omap_udc.h" | 58 | #include "omap_udc.h" |
60 | 59 | ||
@@ -2309,21 +2308,12 @@ static char *trx_mode(unsigned m, int enabled) | |||
2309 | static int proc_otg_show(struct seq_file *s) | 2308 | static int proc_otg_show(struct seq_file *s) |
2310 | { | 2309 | { |
2311 | u32 tmp; | 2310 | u32 tmp; |
2312 | u32 trans; | 2311 | u32 trans = 0; |
2313 | char *ctrl_name; | 2312 | char *ctrl_name = "(UNKNOWN)"; |
2314 | 2313 | ||
2314 | /* XXX This needs major revision for OMAP2+ */ | ||
2315 | tmp = omap_readl(OTG_REV); | 2315 | tmp = omap_readl(OTG_REV); |
2316 | if (cpu_is_omap24xx()) { | 2316 | if (cpu_class_is_omap1()) { |
2317 | /* | ||
2318 | * REVISIT: Not clear how this works on OMAP2. trans | ||
2319 | * is ANDed to produce bits 7 and 8, which might make | ||
2320 | * sense for USB_TRANSCEIVER_CTRL on OMAP1, | ||
2321 | * but with CONTROL_DEVCONF, these bits have something to | ||
2322 | * do with the frame adjustment counter and McBSP2. | ||
2323 | */ | ||
2324 | ctrl_name = "control_devconf"; | ||
2325 | trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
2326 | } else { | ||
2327 | ctrl_name = "tranceiver_ctrl"; | 2317 | ctrl_name = "tranceiver_ctrl"; |
2328 | trans = omap_readw(USB_TRANSCEIVER_CTRL); | 2318 | trans = omap_readw(USB_TRANSCEIVER_CTRL); |
2329 | } | 2319 | } |