diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/usb/serial/mct_u232.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/usb/serial/mct_u232.h')
-rw-r--r-- | drivers/usb/serial/mct_u232.h | 453 |
1 files changed, 453 insertions, 0 deletions
diff --git a/drivers/usb/serial/mct_u232.h b/drivers/usb/serial/mct_u232.h new file mode 100644 index 000000000000..73dd0d984cd3 --- /dev/null +++ b/drivers/usb/serial/mct_u232.h | |||
@@ -0,0 +1,453 @@ | |||
1 | /* | ||
2 | * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver | ||
3 | * | ||
4 | * Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No. | ||
12 | * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin | ||
13 | * Model No. U232-P9). See http://www.mct.com.tw/p_u232.html for further | ||
14 | * information. The properties of this device are listed at the end of this | ||
15 | * file. This device is available from various distributors. I know Hana, | ||
16 | * http://www.hana.de and D-Link, http://www.dlink.com/products/usb/dsbs25. | ||
17 | * | ||
18 | * All of the information about the device was acquired by using SniffUSB | ||
19 | * on Windows98. The technical details of the reverse engineering are | ||
20 | * summarized at the end of this file. | ||
21 | */ | ||
22 | |||
23 | #ifndef __LINUX_USB_SERIAL_MCT_U232_H | ||
24 | #define __LINUX_USB_SERIAL_MCT_U232_H | ||
25 | |||
26 | #define MCT_U232_VID 0x0711 /* Vendor Id */ | ||
27 | #define MCT_U232_PID 0x0210 /* Original MCT Product Id */ | ||
28 | |||
29 | /* U232-P25, Sitecom */ | ||
30 | #define MCT_U232_SITECOM_PID 0x0230 /* Sitecom Product Id */ | ||
31 | |||
32 | /* DU-H3SP USB BAY hub */ | ||
33 | #define MCT_U232_DU_H3SP_PID 0x0200 /* D-Link DU-H3SP USB BAY */ | ||
34 | |||
35 | /* Belkin badge the MCT U232-P9 as the F5U109 */ | ||
36 | #define MCT_U232_BELKIN_F5U109_VID 0x050d /* Vendor Id */ | ||
37 | #define MCT_U232_BELKIN_F5U109_PID 0x0109 /* Product Id */ | ||
38 | |||
39 | /* | ||
40 | * Vendor Request Interface | ||
41 | */ | ||
42 | #define MCT_U232_SET_REQUEST_TYPE 0x40 | ||
43 | #define MCT_U232_GET_REQUEST_TYPE 0xc0 | ||
44 | |||
45 | #define MCT_U232_GET_MODEM_STAT_REQUEST 2 /* Get Modem Status Register (MSR) */ | ||
46 | #define MCT_U232_GET_MODEM_STAT_SIZE 1 | ||
47 | |||
48 | #define MCT_U232_GET_LINE_CTRL_REQUEST 6 /* Get Line Control Register (LCR) */ | ||
49 | #define MCT_U232_GET_LINE_CTRL_SIZE 1 /* ... not used by this driver */ | ||
50 | |||
51 | #define MCT_U232_SET_BAUD_RATE_REQUEST 5 /* Set Baud Rate Divisor */ | ||
52 | #define MCT_U232_SET_BAUD_RATE_SIZE 4 | ||
53 | |||
54 | #define MCT_U232_SET_LINE_CTRL_REQUEST 7 /* Set Line Control Register (LCR) */ | ||
55 | #define MCT_U232_SET_LINE_CTRL_SIZE 1 | ||
56 | |||
57 | #define MCT_U232_SET_MODEM_CTRL_REQUEST 10 /* Set Modem Control Register (MCR) */ | ||
58 | #define MCT_U232_SET_MODEM_CTRL_SIZE 1 | ||
59 | |||
60 | /* This USB device request code is not well understood. It is transmitted by | ||
61 | the MCT-supplied Windows driver whenever the baud rate changes. | ||
62 | */ | ||
63 | #define MCT_U232_SET_UNKNOWN1_REQUEST 11 /* Unknown functionality */ | ||
64 | #define MCT_U232_SET_UNKNOWN1_SIZE 1 | ||
65 | |||
66 | /* This USB device request code is not well understood. It is transmitted by | ||
67 | the MCT-supplied Windows driver whenever the baud rate changes. | ||
68 | |||
69 | Without this USB device request, the USB/RS-232 adapter will not write to | ||
70 | RS-232 devices which do not assert the 'CTS' signal. | ||
71 | */ | ||
72 | #define MCT_U232_SET_UNKNOWN2_REQUEST 12 /* Unknown functionality */ | ||
73 | #define MCT_U232_SET_UNKNOWN2_SIZE 1 | ||
74 | |||
75 | /* | ||
76 | * Baud rate (divisor) | ||
77 | * Actually, there are two of them, MCT website calls them "Philips solution" | ||
78 | * and "Intel solution". They are the regular MCT and "Sitecom" for us. | ||
79 | * This is pointless to document in the header, see the code for the bits. | ||
80 | */ | ||
81 | static int mct_u232_calculate_baud_rate(struct usb_serial *serial, int value); | ||
82 | |||
83 | /* | ||
84 | * Line Control Register (LCR) | ||
85 | */ | ||
86 | #define MCT_U232_SET_BREAK 0x40 | ||
87 | |||
88 | #define MCT_U232_PARITY_SPACE 0x38 | ||
89 | #define MCT_U232_PARITY_MARK 0x28 | ||
90 | #define MCT_U232_PARITY_EVEN 0x18 | ||
91 | #define MCT_U232_PARITY_ODD 0x08 | ||
92 | #define MCT_U232_PARITY_NONE 0x00 | ||
93 | |||
94 | #define MCT_U232_DATA_BITS_5 0x00 | ||
95 | #define MCT_U232_DATA_BITS_6 0x01 | ||
96 | #define MCT_U232_DATA_BITS_7 0x02 | ||
97 | #define MCT_U232_DATA_BITS_8 0x03 | ||
98 | |||
99 | #define MCT_U232_STOP_BITS_2 0x04 | ||
100 | #define MCT_U232_STOP_BITS_1 0x00 | ||
101 | |||
102 | /* | ||
103 | * Modem Control Register (MCR) | ||
104 | */ | ||
105 | #define MCT_U232_MCR_NONE 0x8 /* Deactivate DTR and RTS */ | ||
106 | #define MCT_U232_MCR_RTS 0xa /* Activate RTS */ | ||
107 | #define MCT_U232_MCR_DTR 0x9 /* Activate DTR */ | ||
108 | |||
109 | /* | ||
110 | * Modem Status Register (MSR) | ||
111 | */ | ||
112 | #define MCT_U232_MSR_INDEX 0x0 /* data[index] */ | ||
113 | #define MCT_U232_MSR_CD 0x80 /* Current CD */ | ||
114 | #define MCT_U232_MSR_RI 0x40 /* Current RI */ | ||
115 | #define MCT_U232_MSR_DSR 0x20 /* Current DSR */ | ||
116 | #define MCT_U232_MSR_CTS 0x10 /* Current CTS */ | ||
117 | #define MCT_U232_MSR_DCD 0x08 /* Delta CD */ | ||
118 | #define MCT_U232_MSR_DRI 0x04 /* Delta RI */ | ||
119 | #define MCT_U232_MSR_DDSR 0x02 /* Delta DSR */ | ||
120 | #define MCT_U232_MSR_DCTS 0x01 /* Delta CTS */ | ||
121 | |||
122 | /* | ||
123 | * Line Status Register (LSR) | ||
124 | */ | ||
125 | #define MCT_U232_LSR_INDEX 1 /* data[index] */ | ||
126 | #define MCT_U232_LSR_ERR 0x80 /* OE | PE | FE | BI */ | ||
127 | #define MCT_U232_LSR_TEMT 0x40 /* transmit register empty */ | ||
128 | #define MCT_U232_LSR_THRE 0x20 /* transmit holding register empty */ | ||
129 | #define MCT_U232_LSR_BI 0x10 /* break indicator */ | ||
130 | #define MCT_U232_LSR_FE 0x08 /* framing error */ | ||
131 | #define MCT_U232_LSR_OE 0x02 /* overrun error */ | ||
132 | #define MCT_U232_LSR_PE 0x04 /* parity error */ | ||
133 | #define MCT_U232_LSR_OE 0x02 /* overrun error */ | ||
134 | #define MCT_U232_LSR_DR 0x01 /* receive data ready */ | ||
135 | |||
136 | |||
137 | /* ----------------------------------------------------------------------------- | ||
138 | * Technical Specification reverse engineered with SniffUSB on Windows98 | ||
139 | * ===================================================================== | ||
140 | * | ||
141 | * The technical details of the device have been acquired be using "SniffUSB" | ||
142 | * and the vendor-supplied device driver (version 2.3A) under Windows98. To | ||
143 | * identify the USB vendor-specific requests and to assign them to terminal | ||
144 | * settings (flow control, baud rate, etc.) the program "SerialSettings" from | ||
145 | * William G. Greathouse has been proven to be very useful. I also used the | ||
146 | * Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and | ||
147 | * observations are summarized below: | ||
148 | * | ||
149 | * The USB requests seem to be directly mapped to the registers of a 8250, | ||
150 | * 16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output | ||
151 | * devices") contains a comprehensive description of UARTs and its registers. | ||
152 | * The bit descriptions are actually taken from there. | ||
153 | * | ||
154 | * | ||
155 | * Baud rate (divisor) | ||
156 | * ------------------- | ||
157 | * | ||
158 | * BmRequestType: 0x40 (0100 0000B) | ||
159 | * bRequest: 0x05 | ||
160 | * wValue: 0x0000 | ||
161 | * wIndex: 0x0000 | ||
162 | * wLength: 0x0004 | ||
163 | * Data: divisor = 115200 / baud_rate | ||
164 | * | ||
165 | * SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4 | ||
166 | * shown above, observations with a Belkin F5U109 adapter, using the | ||
167 | * MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for | ||
168 | * Win98/Me"), show this request has a length of 1 byte, presumably because | ||
169 | * of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter | ||
170 | * use a baud-rate code instead of a conventional RS-232 baud rate divisor. | ||
171 | * The current source code for this driver does not reflect this fact, but | ||
172 | * the driver works fine with this adapter/driver combination nonetheless. | ||
173 | * | ||
174 | * | ||
175 | * Line Control Register (LCR) | ||
176 | * --------------------------- | ||
177 | * | ||
178 | * BmRequestType: 0x40 (0100 0000B) 0xc0 (1100 0000B) | ||
179 | * bRequest: 0x07 0x06 | ||
180 | * wValue: 0x0000 | ||
181 | * wIndex: 0x0000 | ||
182 | * wLength: 0x0001 | ||
183 | * Data: LCR (see below) | ||
184 | * | ||
185 | * Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data | ||
186 | * transmit/receive register (THR/RBR) and the Interrupt Enable Register | ||
187 | * (IER) is disabled. Any access to these ports is now redirected to the | ||
188 | * Divisor Latch Registers. Setting this bit, loading the Divisor | ||
189 | * Registers, and clearing DLAB should be done with interrupts disabled. | ||
190 | * Bit 6: Set Break. When set to "1", the transmitter begins to transmit | ||
191 | * continuous Spacing until this bit is set to "0". This overrides any | ||
192 | * bits of characters that are being transmitted. | ||
193 | * Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity | ||
194 | * to always be "1" or "0", based on the value of Bit 4. | ||
195 | * Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0", | ||
196 | * setting this bit causes even parity to be transmitted and expected. | ||
197 | * Otherwise, odd parity is used. | ||
198 | * Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted | ||
199 | * between the last bit of the data and the Stop Bit. The UART will also | ||
200 | * expect parity to be present in the received data. | ||
201 | * Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words, | ||
202 | * 1.5 Stop Bits are transmitted and expected in each data word. For | ||
203 | * 6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected. | ||
204 | * When this bit is set to "0", one Stop Bit is used on each data word. | ||
205 | * Bit 1: Word Length Select Bit #1 (WLSB1) | ||
206 | * Bit 0: Word Length Select Bit #0 (WLSB0) | ||
207 | * Together these bits specify the number of bits in each data word. | ||
208 | * 1 0 Word Length | ||
209 | * 0 0 5 Data Bits | ||
210 | * 0 1 6 Data Bits | ||
211 | * 1 0 7 Data Bits | ||
212 | * 1 1 8 Data Bits | ||
213 | * | ||
214 | * SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs | ||
215 | * in the Win98 driver: the break does not work (bit 6 is not asserted) and the | ||
216 | * stick parity bit is not cleared when set once. The LCR can also be read | ||
217 | * back with USB request 6 but this has never been observed with SniffUSB. | ||
218 | * | ||
219 | * | ||
220 | * Modem Control Register (MCR) | ||
221 | * ---------------------------- | ||
222 | * | ||
223 | * BmRequestType: 0x40 (0100 0000B) | ||
224 | * bRequest: 0x0a | ||
225 | * wValue: 0x0000 | ||
226 | * wIndex: 0x0000 | ||
227 | * wLength: 0x0001 | ||
228 | * Data: MCR (Bit 4..7, see below) | ||
229 | * | ||
230 | * Bit 7: Reserved, always 0. | ||
231 | * Bit 6: Reserved, always 0. | ||
232 | * Bit 5: Reserved, always 0. | ||
233 | * Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver | ||
234 | * are internally connected together to allow diagnostic operations. In | ||
235 | * addition, the UART modem control outputs are connected to the UART | ||
236 | * modem control inputs. CTS is connected to RTS, DTR is connected to | ||
237 | * DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD. | ||
238 | * Bit 3: OUT 2. An auxiliary output that the host processor may set high or | ||
239 | * low. In the IBM PC serial adapter (and most clones), OUT 2 is used | ||
240 | * to tri-state (disable) the interrupt signal from the | ||
241 | * 8250/16450/16550 UART. | ||
242 | * Bit 2: OUT 1. An auxiliary output that the host processor may set high or | ||
243 | * low. This output is not used on the IBM PC serial adapter. | ||
244 | * Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS | ||
245 | * line is Low (Active). | ||
246 | * Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART | ||
247 | * -DTR line is Low (Active). | ||
248 | * | ||
249 | * SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been | ||
250 | * seen _always_ set. | ||
251 | * | ||
252 | * | ||
253 | * Modem Status Register (MSR) | ||
254 | * --------------------------- | ||
255 | * | ||
256 | * BmRequestType: 0xc0 (1100 0000B) | ||
257 | * bRequest: 0x02 | ||
258 | * wValue: 0x0000 | ||
259 | * wIndex: 0x0000 | ||
260 | * wLength: 0x0001 | ||
261 | * Data: MSR (see below) | ||
262 | * | ||
263 | * Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the | ||
264 | * UART. | ||
265 | * Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART. | ||
266 | * Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART. | ||
267 | * Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART. | ||
268 | * Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has | ||
269 | * changed state one more more times since the last time the MSR was | ||
270 | * read by the host. | ||
271 | * Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has | ||
272 | * had a low to high transition since the last time the MSR was read by | ||
273 | * the host. | ||
274 | * Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed | ||
275 | * state one more more times since the last time the MSR was read by the | ||
276 | * host. | ||
277 | * Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed | ||
278 | * state one more times since the last time the MSR was read by the | ||
279 | * host. | ||
280 | * | ||
281 | * SniffUSB observations: the MSR is also returned as first byte on the | ||
282 | * interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB | ||
283 | * request to read MSR cannot be applied during normal device operation. | ||
284 | * | ||
285 | * | ||
286 | * Line Status Register (LSR) | ||
287 | * -------------------------- | ||
288 | * | ||
289 | * Bit 7 Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero. | ||
290 | * This bit is set to "1" when any of the bytes in the FIFO have one or | ||
291 | * more of the following error conditions: PE, FE, or BI. | ||
292 | * Bit 6 Transmitter Empty (TEMT). When set to "1", there are no words | ||
293 | * remaining in the transmit FIFO or the transmit shift register. The | ||
294 | * transmitter is completely idle. | ||
295 | * Bit 5 Transmitter Holding Register Empty (THRE). When set to "1", the FIFO | ||
296 | * (or holding register) now has room for at least one additional word | ||
297 | * to transmit. The transmitter may still be transmitting when this bit | ||
298 | * is set to "1". | ||
299 | * Bit 4 Break Interrupt (BI). The receiver has detected a Break signal. | ||
300 | * Bit 3 Framing Error (FE). A Start Bit was detected but the Stop Bit did not | ||
301 | * appear at the expected time. The received word is probably garbled. | ||
302 | * Bit 2 Parity Error (PE). The parity bit was incorrect for the word received. | ||
303 | * Bit 1 Overrun Error (OE). A new word was received and there was no room in | ||
304 | * the receive buffer. The newly-arrived word in the shift register is | ||
305 | * discarded. On 8250/16450 UARTs, the word in the holding register is | ||
306 | * discarded and the newly- arrived word is put in the holding register. | ||
307 | * Bit 0 Data Ready (DR). One or more words are in the receive FIFO that the | ||
308 | * host may read. A word must be completely received and moved from the | ||
309 | * shift register into the FIFO (or holding register for 8250/16450 | ||
310 | * designs) before this bit is set. | ||
311 | * | ||
312 | * SniffUSB observations: the LSR is returned as second byte on the interrupt-in | ||
313 | * endpoint 0x83 to signal error conditions. Such errors have been seen with | ||
314 | * minicom/zmodem transfers (CRC errors). | ||
315 | * | ||
316 | * | ||
317 | * Unknown #1 | ||
318 | * ------------------- | ||
319 | * | ||
320 | * BmRequestType: 0x40 (0100 0000B) | ||
321 | * bRequest: 0x0b | ||
322 | * wValue: 0x0000 | ||
323 | * wIndex: 0x0000 | ||
324 | * wLength: 0x0001 | ||
325 | * Data: 0x00 | ||
326 | * | ||
327 | * SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver | ||
328 | * (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request | ||
329 | * occurs immediately after a "Baud rate (divisor)" message. It was not | ||
330 | * observed at any other time. It is unclear what purpose this message | ||
331 | * serves. | ||
332 | * | ||
333 | * | ||
334 | * Unknown #2 | ||
335 | * ------------------- | ||
336 | * | ||
337 | * BmRequestType: 0x40 (0100 0000B) | ||
338 | * bRequest: 0x0c | ||
339 | * wValue: 0x0000 | ||
340 | * wIndex: 0x0000 | ||
341 | * wLength: 0x0001 | ||
342 | * Data: 0x00 | ||
343 | * | ||
344 | * SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver | ||
345 | * (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request | ||
346 | * occurs immediately after the 'Unknown #1' message (see above). It was | ||
347 | * not observed at any other time. It is unclear what other purpose (if | ||
348 | * any) this message might serve, but without it, the USB/RS-232 adapter | ||
349 | * will not write to RS-232 devices which do not assert the 'CTS' signal. | ||
350 | * | ||
351 | * | ||
352 | * Flow control | ||
353 | * ------------ | ||
354 | * | ||
355 | * SniffUSB observations: no flow control specific requests have been realized | ||
356 | * apart from DTR/RTS settings. Both signals are dropped for no flow control | ||
357 | * but asserted for hardware or software flow control. | ||
358 | * | ||
359 | * | ||
360 | * Endpoint usage | ||
361 | * -------------- | ||
362 | * | ||
363 | * SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint | ||
364 | * 0x81 is used to transmit and receive characters. The second interrupt-in | ||
365 | * endpoint 0x83 signals exceptional conditions like modem line changes and | ||
366 | * errors. The first byte returned is the MSR and the second byte the LSR. | ||
367 | * | ||
368 | * | ||
369 | * Other observations | ||
370 | * ------------------ | ||
371 | * | ||
372 | * Queued bulk transfers like used in visor.c did not work. | ||
373 | * | ||
374 | * | ||
375 | * Properties of the USB device used (as found in /var/log/messages) | ||
376 | * ----------------------------------------------------------------- | ||
377 | * | ||
378 | * Manufacturer: MCT Corporation. | ||
379 | * Product: USB-232 Interfact Controller | ||
380 | * SerialNumber: U2S22050 | ||
381 | * | ||
382 | * Length = 18 | ||
383 | * DescriptorType = 01 | ||
384 | * USB version = 1.00 | ||
385 | * Vendor:Product = 0711:0210 | ||
386 | * MaxPacketSize0 = 8 | ||
387 | * NumConfigurations = 1 | ||
388 | * Device version = 1.02 | ||
389 | * Device Class:SubClass:Protocol = 00:00:00 | ||
390 | * Per-interface classes | ||
391 | * Configuration: | ||
392 | * bLength = 9 | ||
393 | * bDescriptorType = 02 | ||
394 | * wTotalLength = 0027 | ||
395 | * bNumInterfaces = 01 | ||
396 | * bConfigurationValue = 01 | ||
397 | * iConfiguration = 00 | ||
398 | * bmAttributes = c0 | ||
399 | * MaxPower = 100mA | ||
400 | * | ||
401 | * Interface: 0 | ||
402 | * Alternate Setting: 0 | ||
403 | * bLength = 9 | ||
404 | * bDescriptorType = 04 | ||
405 | * bInterfaceNumber = 00 | ||
406 | * bAlternateSetting = 00 | ||
407 | * bNumEndpoints = 03 | ||
408 | * bInterface Class:SubClass:Protocol = 00:00:00 | ||
409 | * iInterface = 00 | ||
410 | * Endpoint: | ||
411 | * bLength = 7 | ||
412 | * bDescriptorType = 05 | ||
413 | * bEndpointAddress = 81 (in) | ||
414 | * bmAttributes = 03 (Interrupt) | ||
415 | * wMaxPacketSize = 0040 | ||
416 | * bInterval = 02 | ||
417 | * Endpoint: | ||
418 | * bLength = 7 | ||
419 | * bDescriptorType = 05 | ||
420 | * bEndpointAddress = 01 (out) | ||
421 | * bmAttributes = 02 (Bulk) | ||
422 | * wMaxPacketSize = 0040 | ||
423 | * bInterval = 00 | ||
424 | * Endpoint: | ||
425 | * bLength = 7 | ||
426 | * bDescriptorType = 05 | ||
427 | * bEndpointAddress = 83 (in) | ||
428 | * bmAttributes = 03 (Interrupt) | ||
429 | * wMaxPacketSize = 0002 | ||
430 | * bInterval = 02 | ||
431 | * | ||
432 | * | ||
433 | * Hardware details (added by Martin Hamilton, 2001/12/06) | ||
434 | * ----------------------------------------------------------------- | ||
435 | * | ||
436 | * This info was gleaned from opening a Belkin F5U109 DB9 USB serial | ||
437 | * adaptor, which turns out to simply be a re-badged U232-P9. We | ||
438 | * know this because there is a sticky label on the circuit board | ||
439 | * which says "U232-P9" ;-) | ||
440 | * | ||
441 | * The circuit board inside the adaptor contains a Philips PDIUSBD12 | ||
442 | * USB endpoint chip and a Phillips P87C52UBAA microcontroller with | ||
443 | * embedded UART. Exhaustive documentation for these is available at: | ||
444 | * | ||
445 | * http://www.semiconductors.philips.com/pip/p87c52ubaa | ||
446 | * http://www.semiconductors.philips.com/pip/pdiusbd12 | ||
447 | * | ||
448 | * Thanks to Julian Highfield for the pointer to the Philips database. | ||
449 | * | ||
450 | */ | ||
451 | |||
452 | #endif /* __LINUX_USB_SERIAL_MCT_U232_H */ | ||
453 | |||