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authorPeter Chen <peter.chen@freescale.com>2014-02-23 21:20:55 -0500
committerFelipe Balbi <balbi@ti.com>2014-03-05 15:40:07 -0500
commit1364414411acf0fe691ae7e045a64ee366692ba0 (patch)
tree460025e23a551838ba822eedcf4f3a6f3641f8e5 /drivers/usb/phy/phy-mxs-usb.c
parent2400780ea18acd8df5895c6946c5eec3bf2f8859 (diff)
usb: phy: mxs: Add auto clock and power setting
The auto setting is used to open related power and clocks automatically after receiving wakeup signal. With this feature, the PHY's clock and power can be recovered correctly from low power mode, it is guaranteed by IC logic. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/phy/phy-mxs-usb.c')
-rw-r--r--drivers/usb/phy/phy-mxs-usb.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index cf58d8ec9901..d7adca3738ff 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -31,6 +31,11 @@
31 31
32#define BM_USBPHY_CTRL_SFTRST BIT(31) 32#define BM_USBPHY_CTRL_SFTRST BIT(31)
33#define BM_USBPHY_CTRL_CLKGATE BIT(30) 33#define BM_USBPHY_CTRL_CLKGATE BIT(30)
34#define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS BIT(26)
35#define BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE BIT(25)
36#define BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD BIT(20)
37#define BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE BIT(19)
38#define BM_USBPHY_CTRL_ENAUTO_PWRON_PLL BIT(18)
34#define BM_USBPHY_CTRL_ENUTMILEVEL3 BIT(15) 39#define BM_USBPHY_CTRL_ENUTMILEVEL3 BIT(15)
35#define BM_USBPHY_CTRL_ENUTMILEVEL2 BIT(14) 40#define BM_USBPHY_CTRL_ENUTMILEVEL2 BIT(14)
36#define BM_USBPHY_CTRL_ENHOSTDISCONDETECT BIT(1) 41#define BM_USBPHY_CTRL_ENHOSTDISCONDETECT BIT(1)
@@ -96,9 +101,18 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
96 /* Power up the PHY */ 101 /* Power up the PHY */
97 writel(0, base + HW_USBPHY_PWD); 102 writel(0, base + HW_USBPHY_PWD);
98 103
99 /* enable FS/LS device */ 104 /*
100 writel(BM_USBPHY_CTRL_ENUTMILEVEL2 | 105 * USB PHY Ctrl Setting
101 BM_USBPHY_CTRL_ENUTMILEVEL3, 106 * - Auto clock/power on
107 * - Enable full/low speed support
108 */
109 writel(BM_USBPHY_CTRL_ENAUTOSET_USBCLKS |
110 BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE |
111 BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD |
112 BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE |
113 BM_USBPHY_CTRL_ENAUTO_PWRON_PLL |
114 BM_USBPHY_CTRL_ENUTMILEVEL2 |
115 BM_USBPHY_CTRL_ENUTMILEVEL3,
102 base + HW_USBPHY_CTRL_SET); 116 base + HW_USBPHY_CTRL_SET);
103 117
104 return 0; 118 return 0;