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authorDavid Brownell <dbrownell@users.sourceforge.net>2008-12-18 15:25:44 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2009-01-07 13:00:11 -0500
commit9ebd9616648bc0e47e7f8e1898c919305f1e6347 (patch)
treee781dffbb8139db3707b3f26419ea04abf00a1d1 /drivers/usb/otg
parent2a4f136fbdcd89d44d83ed54df2c492a89f5ba9c (diff)
USB: otg: twl4030 transceiver driver
Add driver for the high speed USB-OTG transceiver in TI's TWL4030 family of chips. Given this and various other pending patches, OMAP3 hardware like that from beagleboard.org, gumstix.com (Overo), and openpandora.org should now have basic USB host and peripheral connectivity with mainline kernels. Ditto for less widely-available boards. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/otg')
-rw-r--r--drivers/usb/otg/Kconfig10
-rw-r--r--drivers/usb/otg/Makefile1
-rw-r--r--drivers/usb/otg/twl4030-usb.c721
3 files changed, 732 insertions, 0 deletions
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index afe91bfea7f2..8e8dbdb9b39b 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -41,4 +41,14 @@ config ISP1301_OMAP
41 This driver can also be built as a module. If so, the module 41 This driver can also be built as a module. If so, the module
42 will be called isp1301_omap. 42 will be called isp1301_omap.
43 43
44config TWL4030_USB
45 tristate "TWL4030 USB Transceiver Driver"
46 depends on TWL4030_CORE
47 select USB_OTG_UTILS
48 help
49 Enable this to support the USB OTG transceiver on TWL4030
50 family chips (including the TWL5030 and TPS659x0 devices).
51 This transceiver supports high and full speed devices plus,
52 in host mode, low speed.
53
44endif # USB || OTG 54endif # USB || OTG
diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
index 7c80fc379e6a..d73c7cf5e2f7 100644
--- a/drivers/usb/otg/Makefile
+++ b/drivers/usb/otg/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_USB_OTG_UTILS) += otg.o
8# transceiver drivers 8# transceiver drivers
9obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o 9obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o
10obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o 10obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
11obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
11 12
12ccflags-$(CONFIG_USB_DEBUG) += -DDEBUG 13ccflags-$(CONFIG_USB_DEBUG) += -DDEBUG
13ccflags-$(CONFIG_USB_GADGET_DEBUG) += -DDEBUG 14ccflags-$(CONFIG_USB_GADGET_DEBUG) += -DDEBUG
diff --git a/drivers/usb/otg/twl4030-usb.c b/drivers/usb/otg/twl4030-usb.c
new file mode 100644
index 000000000000..416e4410be02
--- /dev/null
+++ b/drivers/usb/otg/twl4030-usb.c
@@ -0,0 +1,721 @@
1/*
2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
3 *
4 * Copyright (C) 2004-2007 Texas Instruments
5 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Felipe Balbi <felipe.balbi@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Current status:
23 * - HS USB ULPI mode works.
24 * - 3-pin mode support may be added in future.
25 */
26
27#include <linux/module.h>
28#include <linux/init.h>
29#include <linux/interrupt.h>
30#include <linux/platform_device.h>
31#include <linux/spinlock.h>
32#include <linux/workqueue.h>
33#include <linux/io.h>
34#include <linux/delay.h>
35#include <linux/usb/otg.h>
36#include <linux/i2c/twl4030.h>
37
38
39/* Register defines */
40
41#define VENDOR_ID_LO 0x00
42#define VENDOR_ID_HI 0x01
43#define PRODUCT_ID_LO 0x02
44#define PRODUCT_ID_HI 0x03
45
46#define FUNC_CTRL 0x04
47#define FUNC_CTRL_SET 0x05
48#define FUNC_CTRL_CLR 0x06
49#define FUNC_CTRL_SUSPENDM (1 << 6)
50#define FUNC_CTRL_RESET (1 << 5)
51#define FUNC_CTRL_OPMODE_MASK (3 << 3) /* bits 3 and 4 */
52#define FUNC_CTRL_OPMODE_NORMAL (0 << 3)
53#define FUNC_CTRL_OPMODE_NONDRIVING (1 << 3)
54#define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI (2 << 3)
55#define FUNC_CTRL_TERMSELECT (1 << 2)
56#define FUNC_CTRL_XCVRSELECT_MASK (3 << 0) /* bits 0 and 1 */
57#define FUNC_CTRL_XCVRSELECT_HS (0 << 0)
58#define FUNC_CTRL_XCVRSELECT_FS (1 << 0)
59#define FUNC_CTRL_XCVRSELECT_LS (2 << 0)
60#define FUNC_CTRL_XCVRSELECT_FS4LS (3 << 0)
61
62#define IFC_CTRL 0x07
63#define IFC_CTRL_SET 0x08
64#define IFC_CTRL_CLR 0x09
65#define IFC_CTRL_INTERFACE_PROTECT_DISABLE (1 << 7)
66#define IFC_CTRL_AUTORESUME (1 << 4)
67#define IFC_CTRL_CLOCKSUSPENDM (1 << 3)
68#define IFC_CTRL_CARKITMODE (1 << 2)
69#define IFC_CTRL_FSLSSERIALMODE_3PIN (1 << 1)
70
71#define TWL4030_OTG_CTRL 0x0A
72#define TWL4030_OTG_CTRL_SET 0x0B
73#define TWL4030_OTG_CTRL_CLR 0x0C
74#define TWL4030_OTG_CTRL_DRVVBUS (1 << 5)
75#define TWL4030_OTG_CTRL_CHRGVBUS (1 << 4)
76#define TWL4030_OTG_CTRL_DISCHRGVBUS (1 << 3)
77#define TWL4030_OTG_CTRL_DMPULLDOWN (1 << 2)
78#define TWL4030_OTG_CTRL_DPPULLDOWN (1 << 1)
79#define TWL4030_OTG_CTRL_IDPULLUP (1 << 0)
80
81#define USB_INT_EN_RISE 0x0D
82#define USB_INT_EN_RISE_SET 0x0E
83#define USB_INT_EN_RISE_CLR 0x0F
84#define USB_INT_EN_FALL 0x10
85#define USB_INT_EN_FALL_SET 0x11
86#define USB_INT_EN_FALL_CLR 0x12
87#define USB_INT_STS 0x13
88#define USB_INT_LATCH 0x14
89#define USB_INT_IDGND (1 << 4)
90#define USB_INT_SESSEND (1 << 3)
91#define USB_INT_SESSVALID (1 << 2)
92#define USB_INT_VBUSVALID (1 << 1)
93#define USB_INT_HOSTDISCONNECT (1 << 0)
94
95#define CARKIT_CTRL 0x19
96#define CARKIT_CTRL_SET 0x1A
97#define CARKIT_CTRL_CLR 0x1B
98#define CARKIT_CTRL_MICEN (1 << 6)
99#define CARKIT_CTRL_SPKRIGHTEN (1 << 5)
100#define CARKIT_CTRL_SPKLEFTEN (1 << 4)
101#define CARKIT_CTRL_RXDEN (1 << 3)
102#define CARKIT_CTRL_TXDEN (1 << 2)
103#define CARKIT_CTRL_IDGNDDRV (1 << 1)
104#define CARKIT_CTRL_CARKITPWR (1 << 0)
105#define CARKIT_PLS_CTRL 0x22
106#define CARKIT_PLS_CTRL_SET 0x23
107#define CARKIT_PLS_CTRL_CLR 0x24
108#define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
109#define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
110#define CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
111#define CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
112
113#define MCPC_CTRL 0x30
114#define MCPC_CTRL_SET 0x31
115#define MCPC_CTRL_CLR 0x32
116#define MCPC_CTRL_RTSOL (1 << 7)
117#define MCPC_CTRL_EXTSWR (1 << 6)
118#define MCPC_CTRL_EXTSWC (1 << 5)
119#define MCPC_CTRL_VOICESW (1 << 4)
120#define MCPC_CTRL_OUT64K (1 << 3)
121#define MCPC_CTRL_RTSCTSSW (1 << 2)
122#define MCPC_CTRL_HS_UART (1 << 0)
123
124#define MCPC_IO_CTRL 0x33
125#define MCPC_IO_CTRL_SET 0x34
126#define MCPC_IO_CTRL_CLR 0x35
127#define MCPC_IO_CTRL_MICBIASEN (1 << 5)
128#define MCPC_IO_CTRL_CTS_NPU (1 << 4)
129#define MCPC_IO_CTRL_RXD_PU (1 << 3)
130#define MCPC_IO_CTRL_TXDTYP (1 << 2)
131#define MCPC_IO_CTRL_CTSTYP (1 << 1)
132#define MCPC_IO_CTRL_RTSTYP (1 << 0)
133
134#define MCPC_CTRL2 0x36
135#define MCPC_CTRL2_SET 0x37
136#define MCPC_CTRL2_CLR 0x38
137#define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
138
139#define OTHER_FUNC_CTRL 0x80
140#define OTHER_FUNC_CTRL_SET 0x81
141#define OTHER_FUNC_CTRL_CLR 0x82
142#define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
143#define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
144
145#define OTHER_IFC_CTRL 0x83
146#define OTHER_IFC_CTRL_SET 0x84
147#define OTHER_IFC_CTRL_CLR 0x85
148#define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
149#define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
150#define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
151#define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
152#define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
153#define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
154
155#define OTHER_INT_EN_RISE 0x86
156#define OTHER_INT_EN_RISE_SET 0x87
157#define OTHER_INT_EN_RISE_CLR 0x88
158#define OTHER_INT_EN_FALL 0x89
159#define OTHER_INT_EN_FALL_SET 0x8A
160#define OTHER_INT_EN_FALL_CLR 0x8B
161#define OTHER_INT_STS 0x8C
162#define OTHER_INT_LATCH 0x8D
163#define OTHER_INT_VB_SESS_VLD (1 << 7)
164#define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
165#define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
166#define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
167#define OTHER_INT_MANU (1 << 1)
168#define OTHER_INT_ABNORMAL_STRESS (1 << 0)
169
170#define ID_STATUS 0x96
171#define ID_RES_FLOAT (1 << 4)
172#define ID_RES_440K (1 << 3)
173#define ID_RES_200K (1 << 2)
174#define ID_RES_102K (1 << 1)
175#define ID_RES_GND (1 << 0)
176
177#define POWER_CTRL 0xAC
178#define POWER_CTRL_SET 0xAD
179#define POWER_CTRL_CLR 0xAE
180#define POWER_CTRL_OTG_ENAB (1 << 5)
181
182#define OTHER_IFC_CTRL2 0xAF
183#define OTHER_IFC_CTRL2_SET 0xB0
184#define OTHER_IFC_CTRL2_CLR 0xB1
185#define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
186#define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
187#define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
188#define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
189#define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
190#define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
191
192#define REG_CTRL_EN 0xB2
193#define REG_CTRL_EN_SET 0xB3
194#define REG_CTRL_EN_CLR 0xB4
195#define REG_CTRL_ERROR 0xB5
196#define ULPI_I2C_CONFLICT_INTEN (1 << 0)
197
198#define OTHER_FUNC_CTRL2 0xB8
199#define OTHER_FUNC_CTRL2_SET 0xB9
200#define OTHER_FUNC_CTRL2_CLR 0xBA
201#define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
202
203/* following registers do not have separate _clr and _set registers */
204#define VBUS_DEBOUNCE 0xC0
205#define ID_DEBOUNCE 0xC1
206#define VBAT_TIMER 0xD3
207#define PHY_PWR_CTRL 0xFD
208#define PHY_PWR_PHYPWD (1 << 0)
209#define PHY_CLK_CTRL 0xFE
210#define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
211#define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
212#define REQ_PHY_DPLL_CLK (1 << 0)
213#define PHY_CLK_CTRL_STS 0xFF
214#define PHY_DPLL_CLK (1 << 0)
215
216/* In module TWL4030_MODULE_PM_MASTER */
217#define PROTECT_KEY 0x0E
218
219/* In module TWL4030_MODULE_PM_RECEIVER */
220#define VUSB_DEDICATED1 0x7D
221#define VUSB_DEDICATED2 0x7E
222#define VUSB1V5_DEV_GRP 0x71
223#define VUSB1V5_TYPE 0x72
224#define VUSB1V5_REMAP 0x73
225#define VUSB1V8_DEV_GRP 0x74
226#define VUSB1V8_TYPE 0x75
227#define VUSB1V8_REMAP 0x76
228#define VUSB3V1_DEV_GRP 0x77
229#define VUSB3V1_TYPE 0x78
230#define VUSB3V1_REMAP 0x79
231
232/* In module TWL4030_MODULE_INTBR */
233#define PMBR1 0x0D
234#define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
235
236
237
238enum linkstat {
239 USB_LINK_UNKNOWN = 0,
240 USB_LINK_NONE,
241 USB_LINK_VBUS,
242 USB_LINK_ID,
243};
244
245struct twl4030_usb {
246 struct otg_transceiver otg;
247 struct device *dev;
248
249 /* for vbus reporting with irqs disabled */
250 spinlock_t lock;
251
252 /* pin configuration */
253 enum twl4030_usb_mode usb_mode;
254
255 int irq;
256 u8 linkstat;
257 u8 asleep;
258 bool irq_enabled;
259};
260
261/* internal define on top of container_of */
262#define xceiv_to_twl(x) container_of((x), struct twl4030_usb, otg);
263
264/*-------------------------------------------------------------------------*/
265
266static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
267 u8 module, u8 data, u8 address)
268{
269 u8 check;
270
271 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
272 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
273 (check == data))
274 return 0;
275 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
276 1, module, address, check, data);
277
278 /* Failed once: Try again */
279 if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
280 (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
281 (check == data))
282 return 0;
283 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
284 2, module, address, check, data);
285
286 /* Failed again: Return error */
287 return -EBUSY;
288}
289
290#define twl4030_usb_write_verify(twl, address, data) \
291 twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
292
293static inline int twl4030_usb_write(struct twl4030_usb *twl,
294 u8 address, u8 data)
295{
296 int ret = 0;
297
298 ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
299 if (ret < 0)
300 dev_dbg(twl->dev,
301 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
302 return ret;
303}
304
305static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
306{
307 u8 data;
308 int ret = 0;
309
310 ret = twl4030_i2c_read_u8(module, &data, address);
311 if (ret >= 0)
312 ret = data;
313 else
314 dev_dbg(twl->dev,
315 "TWL4030:readb[0x%x,0x%x] Error %d\n",
316 module, address, ret);
317
318 return ret;
319}
320
321static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
322{
323 return twl4030_readb(twl, TWL4030_MODULE_USB, address);
324}
325
326/*-------------------------------------------------------------------------*/
327
328static inline int
329twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
330{
331 return twl4030_usb_write(twl, reg + 1, bits);
332}
333
334static inline int
335twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
336{
337 return twl4030_usb_write(twl, reg + 2, bits);
338}
339
340/*-------------------------------------------------------------------------*/
341
342static enum linkstat twl4030_usb_linkstat(struct twl4030_usb *twl)
343{
344 int status;
345 int linkstat = USB_LINK_UNKNOWN;
346
347 /* STS_HW_CONDITIONS */
348 status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER, 0x0f);
349 if (status < 0)
350 dev_err(twl->dev, "USB link status err %d\n", status);
351 else if (status & BIT(7))
352 linkstat = USB_LINK_VBUS;
353 else if (status & BIT(2))
354 linkstat = USB_LINK_ID;
355 else
356 linkstat = USB_LINK_NONE;
357
358 dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
359 status, status, linkstat);
360
361 /* REVISIT this assumes host and peripheral controllers
362 * are registered, and that both are active...
363 */
364
365 spin_lock_irq(&twl->lock);
366 twl->linkstat = linkstat;
367 if (linkstat == USB_LINK_ID) {
368 twl->otg.default_a = true;
369 twl->otg.state = OTG_STATE_A_IDLE;
370 } else {
371 twl->otg.default_a = false;
372 twl->otg.state = OTG_STATE_B_IDLE;
373 }
374 spin_unlock_irq(&twl->lock);
375
376 return linkstat;
377}
378
379static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
380{
381 twl->usb_mode = mode;
382
383 switch (mode) {
384 case T2_USB_MODE_ULPI:
385 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
386 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
387 twl4030_usb_clear_bits(twl, FUNC_CTRL,
388 FUNC_CTRL_XCVRSELECT_MASK |
389 FUNC_CTRL_OPMODE_MASK);
390 break;
391 case -1:
392 /* FIXME: power on defaults */
393 break;
394 default:
395 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
396 mode);
397 break;
398 };
399}
400
401static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
402{
403 unsigned long timeout;
404 int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
405
406 if (val >= 0) {
407 if (on) {
408 /* enable DPLL to access PHY registers over I2C */
409 val |= REQ_PHY_DPLL_CLK;
410 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
411 (u8)val) < 0);
412
413 timeout = jiffies + HZ;
414 while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
415 PHY_DPLL_CLK)
416 && time_before(jiffies, timeout))
417 udelay(10);
418 if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
419 PHY_DPLL_CLK))
420 dev_err(twl->dev, "Timeout setting T2 HSUSB "
421 "PHY DPLL clock\n");
422 } else {
423 /* let ULPI control the DPLL clock */
424 val &= ~REQ_PHY_DPLL_CLK;
425 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
426 (u8)val) < 0);
427 }
428 }
429}
430
431static void twl4030_phy_power(struct twl4030_usb *twl, int on)
432{
433 u8 pwr;
434
435 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
436 if (on) {
437 pwr &= ~PHY_PWR_PHYPWD;
438 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
439 twl4030_usb_write(twl, PHY_CLK_CTRL,
440 twl4030_usb_read(twl, PHY_CLK_CTRL) |
441 (PHY_CLK_CTRL_CLOCKGATING_EN |
442 PHY_CLK_CTRL_CLK32K_EN));
443 } else {
444 pwr |= PHY_PWR_PHYPWD;
445 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
446 }
447}
448
449static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
450{
451 if (twl->asleep)
452 return;
453
454 twl4030_phy_power(twl, 0);
455 twl->asleep = 1;
456}
457
458static void twl4030_phy_resume(struct twl4030_usb *twl)
459{
460 if (!twl->asleep)
461 return;
462
463 twl4030_phy_power(twl, 1);
464 twl4030_i2c_access(twl, 1);
465 twl4030_usb_set_mode(twl, twl->usb_mode);
466 if (twl->usb_mode == T2_USB_MODE_ULPI)
467 twl4030_i2c_access(twl, 0);
468 twl->asleep = 0;
469}
470
471static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
472{
473 /* Enable writing to power configuration registers */
474 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
475 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
476
477 /* put VUSB3V1 LDO in active state */
478 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
479
480 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
481 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
482
483 /* turn on 3.1V regulator */
484 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
485 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
486
487 /* turn on 1.5V regulator */
488 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
489 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
490
491 /* turn on 1.8V regulator */
492 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
493 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
494
495 /* disable access to power configuration registers */
496 twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY);
497}
498
499static ssize_t twl4030_usb_vbus_show(struct device *dev,
500 struct device_attribute *attr, char *buf)
501{
502 struct twl4030_usb *twl = dev_get_drvdata(dev);
503 unsigned long flags;
504 int ret = -EINVAL;
505
506 spin_lock_irqsave(&twl->lock, flags);
507 ret = sprintf(buf, "%s\n",
508 (twl->linkstat == USB_LINK_VBUS) ? "on" : "off");
509 spin_unlock_irqrestore(&twl->lock, flags);
510
511 return ret;
512}
513static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
514
515static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
516{
517 struct twl4030_usb *twl = _twl;
518 int status;
519
520#ifdef CONFIG_LOCKDEP
521 /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
522 * we don't want and can't tolerate. Although it might be
523 * friendlier not to borrow this thread context...
524 */
525 local_irq_enable();
526#endif
527
528 status = twl4030_usb_linkstat(twl);
529 if (status != USB_LINK_UNKNOWN) {
530
531 /* FIXME add a set_power() method so that B-devices can
532 * configure the charger appropriately. It's not always
533 * correct to consume VBUS power, and how much current to
534 * consume is a function of the USB configuration chosen
535 * by the host.
536 *
537 * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
538 * its disconnect() sibling, when changing to/from the
539 * USB_LINK_VBUS state. musb_hdrc won't care until it
540 * starts to handle softconnect right.
541 */
542 twl4030charger_usb_en(status == USB_LINK_VBUS);
543
544 if (status == USB_LINK_NONE)
545 twl4030_phy_suspend(twl, 0);
546 else
547 twl4030_phy_resume(twl);
548 }
549 sysfs_notify(&twl->dev->kobj, NULL, "vbus");
550
551 return IRQ_HANDLED;
552}
553
554static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
555{
556 struct twl4030_usb *twl = xceiv_to_twl(x);
557
558 if (suspend)
559 twl4030_phy_suspend(twl, 1);
560 else
561 twl4030_phy_resume(twl);
562
563 return 0;
564}
565
566static int twl4030_set_peripheral(struct otg_transceiver *x,
567 struct usb_gadget *gadget)
568{
569 struct twl4030_usb *twl;
570
571 if (!x)
572 return -ENODEV;
573
574 twl = xceiv_to_twl(x);
575 twl->otg.gadget = gadget;
576 if (!gadget)
577 twl->otg.state = OTG_STATE_UNDEFINED;
578
579 return 0;
580}
581
582static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
583{
584 struct twl4030_usb *twl;
585
586 if (!x)
587 return -ENODEV;
588
589 twl = xceiv_to_twl(x);
590 twl->otg.host = host;
591 if (!host)
592 twl->otg.state = OTG_STATE_UNDEFINED;
593
594 return 0;
595}
596
597static int __init twl4030_usb_probe(struct platform_device *pdev)
598{
599 struct twl4030_usb_data *pdata = pdev->dev.platform_data;
600 struct twl4030_usb *twl;
601 int status;
602
603 if (!pdata) {
604 dev_dbg(&pdev->dev, "platform_data not available\n");
605 return -EINVAL;
606 }
607
608 twl = kzalloc(sizeof *twl, GFP_KERNEL);
609 if (!twl)
610 return -ENOMEM;
611
612 twl->dev = &pdev->dev;
613 twl->irq = platform_get_irq(pdev, 0);
614 twl->otg.dev = twl->dev;
615 twl->otg.label = "twl4030";
616 twl->otg.set_host = twl4030_set_host;
617 twl->otg.set_peripheral = twl4030_set_peripheral;
618 twl->otg.set_suspend = twl4030_set_suspend;
619 twl->usb_mode = pdata->usb_mode;
620 twl->asleep = 1;
621
622 /* init spinlock for workqueue */
623 spin_lock_init(&twl->lock);
624
625 twl4030_usb_ldo_init(twl);
626 otg_set_transceiver(&twl->otg);
627
628 platform_set_drvdata(pdev, twl);
629 if (device_create_file(&pdev->dev, &dev_attr_vbus))
630 dev_warn(&pdev->dev, "could not create sysfs file\n");
631
632 /* Our job is to use irqs and status from the power module
633 * to keep the transceiver disabled when nothing's connected.
634 *
635 * FIXME we actually shouldn't start enabling it until the
636 * USB controller drivers have said they're ready, by calling
637 * set_host() and/or set_peripheral() ... OTG_capable boards
638 * need both handles, otherwise just one suffices.
639 */
640 twl->irq_enabled = true;
641 status = request_irq(twl->irq, twl4030_usb_irq,
642 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
643 "twl4030_usb", twl);
644 if (status < 0) {
645 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
646 twl->irq, status);
647 kfree(twl);
648 return status;
649 }
650
651 /* The IRQ handler just handles changes from the previous states
652 * of the ID and VBUS pins ... in probe() we must initialize that
653 * previous state. The easy way: fake an IRQ.
654 *
655 * REVISIT: a real IRQ might have happened already, if PREEMPT is
656 * enabled. Else the IRQ may not yet be configured or enabled,
657 * because of scheduling delays.
658 */
659 twl4030_usb_irq(twl->irq, twl);
660
661 dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
662 return 0;
663}
664
665static int __exit twl4030_usb_remove(struct platform_device *pdev)
666{
667 struct twl4030_usb *twl = platform_get_drvdata(pdev);
668 int val;
669
670 free_irq(twl->irq, twl);
671 device_remove_file(twl->dev, &dev_attr_vbus);
672
673 /* set transceiver mode to power on defaults */
674 twl4030_usb_set_mode(twl, -1);
675
676 /* autogate 60MHz ULPI clock,
677 * clear dpll clock request for i2c access,
678 * disable 32KHz
679 */
680 val = twl4030_usb_read(twl, PHY_CLK_CTRL);
681 if (val >= 0) {
682 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
683 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
684 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
685 }
686
687 /* disable complete OTG block */
688 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
689
690 twl4030_phy_power(twl, 0);
691
692 kfree(twl);
693
694 return 0;
695}
696
697static struct platform_driver twl4030_usb_driver = {
698 .probe = twl4030_usb_probe,
699 .remove = __exit_p(twl4030_usb_remove),
700 .driver = {
701 .name = "twl4030_usb",
702 .owner = THIS_MODULE,
703 },
704};
705
706static int __init twl4030_usb_init(void)
707{
708 return platform_driver_register(&twl4030_usb_driver);
709}
710subsys_initcall(twl4030_usb_init);
711
712static void __exit twl4030_usb_exit(void)
713{
714 platform_driver_unregister(&twl4030_usb_driver);
715}
716module_exit(twl4030_usb_exit);
717
718MODULE_ALIAS("platform:twl4030_usb");
719MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
720MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
721MODULE_LICENSE("GPL");