diff options
author | Per Forlin <per.forlin@linaro.org> | 2011-08-03 09:39:15 -0400 |
---|---|---|
committer | Felipe Balbi <balbi@ti.com> | 2011-08-12 04:52:47 -0400 |
commit | f847a79ab3c1faca3022061045cd22e4678c1b1c (patch) | |
tree | 9bff0c96c79ece10d07ce1c25238dcaa10cba022 /drivers/usb/musb | |
parent | afbd0749c0507d5fea980b3bfa76efc43af83d60 (diff) |
usb: musb: cppi: fix build errors due to DBG and missing musb variable
Replace DBG with dev_dbg and fix invalid access of musb->controller.
With this patch cppi_dma builds successfully.
Cc: <stable@kernel.org>
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/musb')
-rw-r--r-- | drivers/usb/musb/cppi_dma.c | 26 |
1 files changed, 17 insertions, 9 deletions
diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c index 149f3f310a0a..318fb4e8a885 100644 --- a/drivers/usb/musb/cppi_dma.c +++ b/drivers/usb/musb/cppi_dma.c | |||
@@ -226,8 +226,10 @@ static int cppi_controller_stop(struct dma_controller *c) | |||
226 | struct cppi *controller; | 226 | struct cppi *controller; |
227 | void __iomem *tibase; | 227 | void __iomem *tibase; |
228 | int i; | 228 | int i; |
229 | struct musb *musb; | ||
229 | 230 | ||
230 | controller = container_of(c, struct cppi, controller); | 231 | controller = container_of(c, struct cppi, controller); |
232 | musb = controller->musb; | ||
231 | 233 | ||
232 | tibase = controller->tibase; | 234 | tibase = controller->tibase; |
233 | /* DISABLE INDIVIDUAL CHANNEL Interrupts */ | 235 | /* DISABLE INDIVIDUAL CHANNEL Interrupts */ |
@@ -289,9 +291,11 @@ cppi_channel_allocate(struct dma_controller *c, | |||
289 | u8 index; | 291 | u8 index; |
290 | struct cppi_channel *cppi_ch; | 292 | struct cppi_channel *cppi_ch; |
291 | void __iomem *tibase; | 293 | void __iomem *tibase; |
294 | struct musb *musb; | ||
292 | 295 | ||
293 | controller = container_of(c, struct cppi, controller); | 296 | controller = container_of(c, struct cppi, controller); |
294 | tibase = controller->tibase; | 297 | tibase = controller->tibase; |
298 | musb = controller->musb; | ||
295 | 299 | ||
296 | /* ep0 doesn't use DMA; remember cppi indices are 0..N-1 */ | 300 | /* ep0 doesn't use DMA; remember cppi indices are 0..N-1 */ |
297 | index = ep->epnum - 1; | 301 | index = ep->epnum - 1; |
@@ -339,7 +343,8 @@ static void cppi_channel_release(struct dma_channel *channel) | |||
339 | c = container_of(channel, struct cppi_channel, channel); | 343 | c = container_of(channel, struct cppi_channel, channel); |
340 | tibase = c->controller->tibase; | 344 | tibase = c->controller->tibase; |
341 | if (!c->hw_ep) | 345 | if (!c->hw_ep) |
342 | dev_dbg(musb->controller, "releasing idle DMA channel %p\n", c); | 346 | dev_dbg(c->controller->musb->controller, |
347 | "releasing idle DMA channel %p\n", c); | ||
343 | else if (!c->transmit) | 348 | else if (!c->transmit) |
344 | core_rxirq_enable(tibase, c->index + 1); | 349 | core_rxirq_enable(tibase, c->index + 1); |
345 | 350 | ||
@@ -357,10 +362,11 @@ cppi_dump_rx(int level, struct cppi_channel *c, const char *tag) | |||
357 | 362 | ||
358 | musb_ep_select(base, c->index + 1); | 363 | musb_ep_select(base, c->index + 1); |
359 | 364 | ||
360 | DBG(level, "RX DMA%d%s: %d left, csr %04x, " | 365 | dev_dbg(c->controller->musb->controller, |
361 | "%08x H%08x S%08x C%08x, " | 366 | "RX DMA%d%s: %d left, csr %04x, " |
362 | "B%08x L%08x %08x .. %08x" | 367 | "%08x H%08x S%08x C%08x, " |
363 | "\n", | 368 | "B%08x L%08x %08x .. %08x" |
369 | "\n", | ||
364 | c->index, tag, | 370 | c->index, tag, |
365 | musb_readl(c->controller->tibase, | 371 | musb_readl(c->controller->tibase, |
366 | DAVINCI_RXCPPI_BUFCNT0_REG + 4 * c->index), | 372 | DAVINCI_RXCPPI_BUFCNT0_REG + 4 * c->index), |
@@ -387,10 +393,11 @@ cppi_dump_tx(int level, struct cppi_channel *c, const char *tag) | |||
387 | 393 | ||
388 | musb_ep_select(base, c->index + 1); | 394 | musb_ep_select(base, c->index + 1); |
389 | 395 | ||
390 | DBG(level, "TX DMA%d%s: csr %04x, " | 396 | dev_dbg(c->controller->musb->controller, |
391 | "H%08x S%08x C%08x %08x, " | 397 | "TX DMA%d%s: csr %04x, " |
392 | "F%08x L%08x .. %08x" | 398 | "H%08x S%08x C%08x %08x, " |
393 | "\n", | 399 | "F%08x L%08x .. %08x" |
400 | "\n", | ||
394 | c->index, tag, | 401 | c->index, tag, |
395 | musb_readw(c->hw_ep->regs, MUSB_TXCSR), | 402 | musb_readw(c->hw_ep->regs, MUSB_TXCSR), |
396 | 403 | ||
@@ -1022,6 +1029,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch) | |||
1022 | int i; | 1029 | int i; |
1023 | dma_addr_t safe2ack; | 1030 | dma_addr_t safe2ack; |
1024 | void __iomem *regs = rx->hw_ep->regs; | 1031 | void __iomem *regs = rx->hw_ep->regs; |
1032 | struct musb *musb = cppi->musb; | ||
1025 | 1033 | ||
1026 | cppi_dump_rx(6, rx, "/K"); | 1034 | cppi_dump_rx(6, rx, "/K"); |
1027 | 1035 | ||