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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2009-11-18 14:55:28 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2009-12-11 14:55:25 -0500
commit7723de7e19b744144975a09c81777ec0f14ac5b3 (patch)
treea81ccadfed2633fc8a5224adccf9f990614cb78e /drivers/usb/musb
parent46034dca515bc4ddca0399ae58106d1f5f0d809f (diff)
USB: musb_gadget: remove pointless loop
Remove the pointless 'do () while (0)' loop from musb_g_tx() -- it makes this function symmetric to musb_g_rx()... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/musb')
-rw-r--r--drivers/usb/musb/musb_gadget.c174
1 files changed, 82 insertions, 92 deletions
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index 173c963e7f02..07d5dc97ff5e 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -429,112 +429,102 @@ void musb_g_tx(struct musb *musb, u8 epnum)
429 DBG(4, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr); 429 DBG(4, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr);
430 430
431 dma = is_dma_capable() ? musb_ep->dma : NULL; 431 dma = is_dma_capable() ? musb_ep->dma : NULL;
432 do { 432
433 /* REVISIT for high bandwidth, MUSB_TXCSR_P_INCOMPTX 433 /*
434 * probably rates reporting as a host error 434 * REVISIT: for high bandwidth, MUSB_TXCSR_P_INCOMPTX
435 * probably rates reporting as a host error.
436 */
437 if (csr & MUSB_TXCSR_P_SENTSTALL) {
438 csr |= MUSB_TXCSR_P_WZC_BITS;
439 csr &= ~MUSB_TXCSR_P_SENTSTALL;
440 musb_writew(epio, MUSB_TXCSR, csr);
441 return;
442 }
443
444 if (csr & MUSB_TXCSR_P_UNDERRUN) {
445 /* We NAKed, no big deal... little reason to care. */
446 csr |= MUSB_TXCSR_P_WZC_BITS;
447 csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);
448 musb_writew(epio, MUSB_TXCSR, csr);
449 DBG(20, "underrun on ep%d, req %p\n", epnum, request);
450 }
451
452 if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
453 /*
454 * SHOULD NOT HAPPEN... has with CPPI though, after
455 * changing SENDSTALL (and other cases); harmless?
435 */ 456 */
436 if (csr & MUSB_TXCSR_P_SENTSTALL) { 457 DBG(5, "%s dma still busy?\n", musb_ep->end_point.name);
437 csr |= MUSB_TXCSR_P_WZC_BITS; 458 return;
438 csr &= ~MUSB_TXCSR_P_SENTSTALL; 459 }
439 musb_writew(epio, MUSB_TXCSR, csr);
440 break;
441 }
442 460
443 if (csr & MUSB_TXCSR_P_UNDERRUN) { 461 if (request) {
444 /* we NAKed, no big deal ... little reason to care */ 462 u8 is_dma = 0;
463
464 if (dma && (csr & MUSB_TXCSR_DMAENAB)) {
465 is_dma = 1;
445 csr |= MUSB_TXCSR_P_WZC_BITS; 466 csr |= MUSB_TXCSR_P_WZC_BITS;
446 csr &= ~(MUSB_TXCSR_P_UNDERRUN 467 csr &= ~(MUSB_TXCSR_DMAENAB | MUSB_TXCSR_P_UNDERRUN |
447 | MUSB_TXCSR_TXPKTRDY); 468 MUSB_TXCSR_TXPKTRDY);
448 musb_writew(epio, MUSB_TXCSR, csr); 469 musb_writew(epio, MUSB_TXCSR, csr);
449 DBG(20, "underrun on ep%d, req %p\n", epnum, request); 470 /* Ensure writebuffer is empty. */
471 csr = musb_readw(epio, MUSB_TXCSR);
472 request->actual += musb_ep->dma->actual_len;
473 DBG(4, "TXCSR%d %04x, DMA off, len %zu, req %p\n",
474 epnum, csr, musb_ep->dma->actual_len, request);
450 } 475 }
451 476
452 if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) { 477 if (is_dma || request->actual == request->length) {
453 /* SHOULD NOT HAPPEN ... has with cppi though, after 478 /*
454 * changing SENDSTALL (and other cases); harmless? 479 * First, maybe a terminating short packet. Some DMA
480 * engines might handle this by themselves.
455 */ 481 */
456 DBG(5, "%s dma still busy?\n", musb_ep->end_point.name); 482 if ((request->zero && request->length
457 break; 483 && request->length % musb_ep->packet_sz == 0)
458 }
459
460 if (request) {
461 u8 is_dma = 0;
462
463 if (dma && (csr & MUSB_TXCSR_DMAENAB)) {
464 is_dma = 1;
465 csr |= MUSB_TXCSR_P_WZC_BITS;
466 csr &= ~(MUSB_TXCSR_DMAENAB
467 | MUSB_TXCSR_P_UNDERRUN
468 | MUSB_TXCSR_TXPKTRDY);
469 musb_writew(epio, MUSB_TXCSR, csr);
470 /* ensure writebuffer is empty */
471 csr = musb_readw(epio, MUSB_TXCSR);
472 request->actual += musb_ep->dma->actual_len;
473 DBG(4, "TXCSR%d %04x, dma off, "
474 "len %zu, req %p\n",
475 epnum, csr,
476 musb_ep->dma->actual_len,
477 request);
478 }
479
480 if (is_dma || request->actual == request->length) {
481
482 /* First, maybe a terminating short packet.
483 * Some DMA engines might handle this by
484 * themselves.
485 */
486 if ((request->zero
487 && request->length
488 && (request->length
489 % musb_ep->packet_sz)
490 == 0)
491#ifdef CONFIG_USB_INVENTRA_DMA 484#ifdef CONFIG_USB_INVENTRA_DMA
492 || (is_dma && 485 || (is_dma && (!dma->desired_mode ||
493 ((!dma->desired_mode) || 486 (request->actual &
494 (request->actual & 487 (musb_ep->packet_sz - 1))))
495 (musb_ep->packet_sz - 1))))
496#endif 488#endif
497 ) { 489 ) {
498 /* on dma completion, fifo may not 490 /*
499 * be available yet ... 491 * On DMA completion, FIFO may not be
500 */ 492 * available yet...
501 if (csr & MUSB_TXCSR_TXPKTRDY)
502 break;
503
504 DBG(4, "sending zero pkt\n");
505 musb_writew(epio, MUSB_TXCSR,
506 MUSB_TXCSR_MODE
507 | MUSB_TXCSR_TXPKTRDY);
508 request->zero = 0;
509 }
510
511 /* ... or if not, then complete it */
512 musb_g_giveback(musb_ep, request, 0);
513
514 /* kickstart next transfer if appropriate;
515 * the packet that just completed might not
516 * be transmitted for hours or days.
517 * REVISIT for double buffering...
518 * FIXME revisit for stalls too...
519 */ 493 */
520 musb_ep_select(mbase, epnum); 494 if (csr & MUSB_TXCSR_TXPKTRDY)
521 csr = musb_readw(epio, MUSB_TXCSR); 495 return;
522 if (csr & MUSB_TXCSR_FIFONOTEMPTY) 496
523 break; 497 DBG(4, "sending zero pkt\n");
524 request = musb_ep->desc 498 musb_writew(epio, MUSB_TXCSR, MUSB_TXCSR_MODE
525 ? next_request(musb_ep) 499 | MUSB_TXCSR_TXPKTRDY);
526 : NULL; 500 request->zero = 0;
527 if (!request) {
528 DBG(4, "%s idle now\n",
529 musb_ep->end_point.name);
530 break;
531 }
532 } 501 }
533 502
534 txstate(musb, to_musb_request(request)); 503 /* ... or if not, then complete it. */
504 musb_g_giveback(musb_ep, request, 0);
505
506 /*
507 * Kickstart next transfer if appropriate;
508 * the packet that just completed might not
509 * be transmitted for hours or days.
510 * REVISIT for double buffering...
511 * FIXME revisit for stalls too...
512 */
513 musb_ep_select(mbase, epnum);
514 csr = musb_readw(epio, MUSB_TXCSR);
515 if (csr & MUSB_TXCSR_FIFONOTEMPTY)
516 return;
517
518 if (!musb_ep->desc) {
519 DBG(4, "%s idle now\n",
520 musb_ep->end_point.name);
521 return;
522 } else
523 request = next_request(musb_ep);
535 } 524 }
536 525
537 } while (0); 526 txstate(musb, to_musb_request(request));
527 }
538} 528}
539 529
540/* ------------------------------------------------------------ */ 530/* ------------------------------------------------------------ */
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