aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/usb/musb
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-03 11:48:58 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-03 11:48:58 -0500
commit7f5b09c15ab989ed5ce4adda0be42c1302df70b7 (patch)
tree9695b00983d1bd077ff91c463abcb136330cf344 /drivers/usb/musb
parent94468080220162f74dc6ce5c3e95e5fec8022902 (diff)
parentcedf8a78421943441b9011ce7bcdab55f07d2ea6 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (220 commits) USB: backlight, appledisplay: fix incomplete registration failure handling USB: pl2303: remove unnecessary reset of usb_device in urbs USB: ftdi_sio: remove obsolete check in unthrottle USB: ftdi_sio: remove unused tx_bytes counter USB: qcaux: driver for auxiliary serial ports on Qualcomm devices USB: pl2303: initial TIOCGSERIAL support USB: option: add Longcheer/Longsung vendor ID USB: fix I2C API usage in ohci-pnx4008. USB: usbmon: mask seconds properly in text API USB: sisusbvga: no unnecessary GFP_ATOMIC USB: storage: onetouch: unnecessary GFP_ATOMIC USB: serial: ftdi: add CONTEC vendor and product id USB: remove references to port->port.count from the serial drivers USB: tty: Prune uses of tty_request_room in the USB layer USB: tty: Add a function to insert a string of characters with the same flag USB: don't read past config->interface[] if usb_control_msg() fails in usb_reset_configuration() USB: tty: kill request_room for USB ACM class USB: tty: sort out the request_room handling for whiteheat USB: storage: fix misplaced parenthesis USB: vstusb.c: removal of driver for Vernier Software & Technology, Inc., devices and spectrometers ...
Diffstat (limited to 'drivers/usb/musb')
-rw-r--r--drivers/usb/musb/blackfin.c28
-rw-r--r--drivers/usb/musb/cppi_dma.c33
-rw-r--r--drivers/usb/musb/musb_core.c562
-rw-r--r--drivers/usb/musb/musb_core.h72
-rw-r--r--drivers/usb/musb/musb_gadget.c20
-rw-r--r--drivers/usb/musb/musb_host.c34
-rw-r--r--drivers/usb/musb/musb_regs.h101
-rw-r--r--drivers/usb/musb/musbhsdma.c25
-rw-r--r--drivers/usb/musb/musbhsdma.h17
-rw-r--r--drivers/usb/musb/omap2430.c48
-rw-r--r--drivers/usb/musb/omap2430.h32
-rw-r--r--drivers/usb/musb/tusb6010.c2
-rw-r--r--drivers/usb/musb/tusb6010_omap.c2
13 files changed, 660 insertions, 316 deletions
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
index ad26e6569665..bcee1339d4fd 100644
--- a/drivers/usb/musb/blackfin.c
+++ b/drivers/usb/musb/blackfin.c
@@ -30,7 +30,6 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
30 void __iomem *fifo = hw_ep->fifo; 30 void __iomem *fifo = hw_ep->fifo;
31 void __iomem *epio = hw_ep->regs; 31 void __iomem *epio = hw_ep->regs;
32 u8 epnum = hw_ep->epnum; 32 u8 epnum = hw_ep->epnum;
33 u16 dma_reg = 0;
34 33
35 prefetch((u8 *)src); 34 prefetch((u8 *)src);
36 35
@@ -42,15 +41,17 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
42 dump_fifo_data(src, len); 41 dump_fifo_data(src, len);
43 42
44 if (!ANOMALY_05000380 && epnum != 0) { 43 if (!ANOMALY_05000380 && epnum != 0) {
45 flush_dcache_range((unsigned int)src, 44 u16 dma_reg;
46 (unsigned int)(src + len)); 45
46 flush_dcache_range((unsigned long)src,
47 (unsigned long)(src + len));
47 48
48 /* Setup DMA address register */ 49 /* Setup DMA address register */
49 dma_reg = (u16) ((u32) src & 0xFFFF); 50 dma_reg = (u32)src;
50 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_LOW), dma_reg); 51 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_LOW), dma_reg);
51 SSYNC(); 52 SSYNC();
52 53
53 dma_reg = (u16) (((u32) src >> 16) & 0xFFFF); 54 dma_reg = (u32)src >> 16;
54 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_HIGH), dma_reg); 55 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_HIGH), dma_reg);
55 SSYNC(); 56 SSYNC();
56 57
@@ -79,12 +80,9 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
79 SSYNC(); 80 SSYNC();
80 81
81 if (unlikely((unsigned long)src & 0x01)) 82 if (unlikely((unsigned long)src & 0x01))
82 outsw_8((unsigned long)fifo, src, 83 outsw_8((unsigned long)fifo, src, (len + 1) >> 1);
83 len & 0x01 ? (len >> 1) + 1 : len >> 1);
84 else 84 else
85 outsw((unsigned long)fifo, src, 85 outsw((unsigned long)fifo, src, (len + 1) >> 1);
86 len & 0x01 ? (len >> 1) + 1 : len >> 1);
87
88 } 86 }
89} 87}
90/* 88/*
@@ -94,19 +92,19 @@ void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
94{ 92{
95 void __iomem *fifo = hw_ep->fifo; 93 void __iomem *fifo = hw_ep->fifo;
96 u8 epnum = hw_ep->epnum; 94 u8 epnum = hw_ep->epnum;
97 u16 dma_reg = 0;
98 95
99 if (ANOMALY_05000467 && epnum != 0) { 96 if (ANOMALY_05000467 && epnum != 0) {
97 u16 dma_reg;
100 98
101 invalidate_dcache_range((unsigned int)dst, 99 invalidate_dcache_range((unsigned long)dst,
102 (unsigned int)(dst + len)); 100 (unsigned long)(dst + len));
103 101
104 /* Setup DMA address register */ 102 /* Setup DMA address register */
105 dma_reg = (u16) ((u32) dst & 0xFFFF); 103 dma_reg = (u32)dst;
106 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_LOW), dma_reg); 104 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_LOW), dma_reg);
107 SSYNC(); 105 SSYNC();
108 106
109 dma_reg = (u16) (((u32) dst >> 16) & 0xFFFF); 107 dma_reg = (u32)dst >> 16;
110 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_HIGH), dma_reg); 108 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_HIGH), dma_reg);
111 SSYNC(); 109 SSYNC();
112 110
diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c
index a44a450c860d..3c69a76ec392 100644
--- a/drivers/usb/musb/cppi_dma.c
+++ b/drivers/usb/musb/cppi_dma.c
@@ -1191,8 +1191,13 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1191 1191
1192 bd = tx_ch->head; 1192 bd = tx_ch->head;
1193 1193
1194 /*
1195 * If Head is null then this could mean that a abort interrupt
1196 * that needs to be acknowledged.
1197 */
1194 if (NULL == bd) { 1198 if (NULL == bd) {
1195 DBG(1, "null BD\n"); 1199 DBG(1, "null BD\n");
1200 tx_ram->tx_complete = 0;
1196 continue; 1201 continue;
1197 } 1202 }
1198 1203
@@ -1412,15 +1417,6 @@ static int cppi_channel_abort(struct dma_channel *channel)
1412 1417
1413 if (cppi_ch->transmit) { 1418 if (cppi_ch->transmit) {
1414 struct cppi_tx_stateram __iomem *tx_ram; 1419 struct cppi_tx_stateram __iomem *tx_ram;
1415 int enabled;
1416
1417 /* mask interrupts raised to signal teardown complete. */
1418 enabled = musb_readl(tibase, DAVINCI_TXCPPI_INTENAB_REG)
1419 & (1 << cppi_ch->index);
1420 if (enabled)
1421 musb_writel(tibase, DAVINCI_TXCPPI_INTCLR_REG,
1422 (1 << cppi_ch->index));
1423
1424 /* REVISIT put timeouts on these controller handshakes */ 1420 /* REVISIT put timeouts on these controller handshakes */
1425 1421
1426 cppi_dump_tx(6, cppi_ch, " (teardown)"); 1422 cppi_dump_tx(6, cppi_ch, " (teardown)");
@@ -1435,7 +1431,6 @@ static int cppi_channel_abort(struct dma_channel *channel)
1435 do { 1431 do {
1436 value = musb_readl(&tx_ram->tx_complete, 0); 1432 value = musb_readl(&tx_ram->tx_complete, 0);
1437 } while (0xFFFFFFFC != value); 1433 } while (0xFFFFFFFC != value);
1438 musb_writel(&tx_ram->tx_complete, 0, 0xFFFFFFFC);
1439 1434
1440 /* FIXME clean up the transfer state ... here? 1435 /* FIXME clean up the transfer state ... here?
1441 * the completion routine should get called with 1436 * the completion routine should get called with
@@ -1448,23 +1443,15 @@ static int cppi_channel_abort(struct dma_channel *channel)
1448 musb_writew(regs, MUSB_TXCSR, value); 1443 musb_writew(regs, MUSB_TXCSR, value);
1449 musb_writew(regs, MUSB_TXCSR, value); 1444 musb_writew(regs, MUSB_TXCSR, value);
1450 1445
1451 /* While we scrub the TX state RAM, ensure that we clean 1446 /*
1452 * up any interrupt that's currently asserted:
1453 * 1. Write to completion Ptr value 0x1(bit 0 set) 1447 * 1. Write to completion Ptr value 0x1(bit 0 set)
1454 * (write back mode) 1448 * (write back mode)
1455 * 2. Write to completion Ptr value 0x0(bit 0 cleared) 1449 * 2. Wait for abort interrupt and then put the channel in
1456 * (compare mode) 1450 * compare mode by writing 1 to the tx_complete register.
1457 * Value written is compared(for bits 31:2) and when
1458 * equal, interrupt is deasserted.
1459 */ 1451 */
1460 cppi_reset_tx(tx_ram, 1); 1452 cppi_reset_tx(tx_ram, 1);
1461 musb_writel(&tx_ram->tx_complete, 0, 0); 1453 cppi_ch->head = 0;
1462 1454 musb_writel(&tx_ram->tx_complete, 0, 1);
1463 /* re-enable interrupt */
1464 if (enabled)
1465 musb_writel(tibase, DAVINCI_TXCPPI_INTENAB_REG,
1466 (1 << cppi_ch->index));
1467
1468 cppi_dump_tx(5, cppi_ch, " (done teardown)"); 1455 cppi_dump_tx(5, cppi_ch, " (done teardown)");
1469 1456
1470 /* REVISIT tx side _should_ clean up the same way 1457 /* REVISIT tx side _should_ clean up the same way
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 738efd8063b5..b4bbf8f2c238 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -557,6 +557,69 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
557 handled = IRQ_HANDLED; 557 handled = IRQ_HANDLED;
558 } 558 }
559 559
560
561 if (int_usb & MUSB_INTR_SUSPEND) {
562 DBG(1, "SUSPEND (%s) devctl %02x power %02x\n",
563 otg_state_string(musb), devctl, power);
564 handled = IRQ_HANDLED;
565
566 switch (musb->xceiv->state) {
567#ifdef CONFIG_USB_MUSB_OTG
568 case OTG_STATE_A_PERIPHERAL:
569 /* We also come here if the cable is removed, since
570 * this silicon doesn't report ID-no-longer-grounded.
571 *
572 * We depend on T(a_wait_bcon) to shut us down, and
573 * hope users don't do anything dicey during this
574 * undesired detour through A_WAIT_BCON.
575 */
576 musb_hnp_stop(musb);
577 usb_hcd_resume_root_hub(musb_to_hcd(musb));
578 musb_root_disconnect(musb);
579 musb_platform_try_idle(musb, jiffies
580 + msecs_to_jiffies(musb->a_wait_bcon
581 ? : OTG_TIME_A_WAIT_BCON));
582
583 break;
584#endif
585 case OTG_STATE_B_IDLE:
586 if (!musb->is_active)
587 break;
588 case OTG_STATE_B_PERIPHERAL:
589 musb_g_suspend(musb);
590 musb->is_active = is_otg_enabled(musb)
591 && musb->xceiv->gadget->b_hnp_enable;
592 if (musb->is_active) {
593#ifdef CONFIG_USB_MUSB_OTG
594 musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
595 DBG(1, "HNP: Setting timer for b_ase0_brst\n");
596 mod_timer(&musb->otg_timer, jiffies
597 + msecs_to_jiffies(
598 OTG_TIME_B_ASE0_BRST));
599#endif
600 }
601 break;
602 case OTG_STATE_A_WAIT_BCON:
603 if (musb->a_wait_bcon != 0)
604 musb_platform_try_idle(musb, jiffies
605 + msecs_to_jiffies(musb->a_wait_bcon));
606 break;
607 case OTG_STATE_A_HOST:
608 musb->xceiv->state = OTG_STATE_A_SUSPEND;
609 musb->is_active = is_otg_enabled(musb)
610 && musb->xceiv->host->b_hnp_enable;
611 break;
612 case OTG_STATE_B_HOST:
613 /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
614 DBG(1, "REVISIT: SUSPEND as B_HOST\n");
615 break;
616 default:
617 /* "should not happen" */
618 musb->is_active = 0;
619 break;
620 }
621 }
622
560 if (int_usb & MUSB_INTR_CONNECT) { 623 if (int_usb & MUSB_INTR_CONNECT) {
561 struct usb_hcd *hcd = musb_to_hcd(musb); 624 struct usb_hcd *hcd = musb_to_hcd(musb);
562 625
@@ -625,10 +688,61 @@ b_host:
625 } 688 }
626#endif /* CONFIG_USB_MUSB_HDRC_HCD */ 689#endif /* CONFIG_USB_MUSB_HDRC_HCD */
627 690
691 if ((int_usb & MUSB_INTR_DISCONNECT) && !musb->ignore_disconnect) {
692 DBG(1, "DISCONNECT (%s) as %s, devctl %02x\n",
693 otg_state_string(musb),
694 MUSB_MODE(musb), devctl);
695 handled = IRQ_HANDLED;
696
697 switch (musb->xceiv->state) {
698#ifdef CONFIG_USB_MUSB_HDRC_HCD
699 case OTG_STATE_A_HOST:
700 case OTG_STATE_A_SUSPEND:
701 usb_hcd_resume_root_hub(musb_to_hcd(musb));
702 musb_root_disconnect(musb);
703 if (musb->a_wait_bcon != 0 && is_otg_enabled(musb))
704 musb_platform_try_idle(musb, jiffies
705 + msecs_to_jiffies(musb->a_wait_bcon));
706 break;
707#endif /* HOST */
708#ifdef CONFIG_USB_MUSB_OTG
709 case OTG_STATE_B_HOST:
710 /* REVISIT this behaves for "real disconnect"
711 * cases; make sure the other transitions from
712 * from B_HOST act right too. The B_HOST code
713 * in hnp_stop() is currently not used...
714 */
715 musb_root_disconnect(musb);
716 musb_to_hcd(musb)->self.is_b_host = 0;
717 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
718 MUSB_DEV_MODE(musb);
719 musb_g_disconnect(musb);
720 break;
721 case OTG_STATE_A_PERIPHERAL:
722 musb_hnp_stop(musb);
723 musb_root_disconnect(musb);
724 /* FALLTHROUGH */
725 case OTG_STATE_B_WAIT_ACON:
726 /* FALLTHROUGH */
727#endif /* OTG */
728#ifdef CONFIG_USB_GADGET_MUSB_HDRC
729 case OTG_STATE_B_PERIPHERAL:
730 case OTG_STATE_B_IDLE:
731 musb_g_disconnect(musb);
732 break;
733#endif /* GADGET */
734 default:
735 WARNING("unhandled DISCONNECT transition (%s)\n",
736 otg_state_string(musb));
737 break;
738 }
739 }
740
628 /* mentor saves a bit: bus reset and babble share the same irq. 741 /* mentor saves a bit: bus reset and babble share the same irq.
629 * only host sees babble; only peripheral sees bus reset. 742 * only host sees babble; only peripheral sees bus reset.
630 */ 743 */
631 if (int_usb & MUSB_INTR_RESET) { 744 if (int_usb & MUSB_INTR_RESET) {
745 handled = IRQ_HANDLED;
632 if (is_host_capable() && (devctl & MUSB_DEVCTL_HM) != 0) { 746 if (is_host_capable() && (devctl & MUSB_DEVCTL_HM) != 0) {
633 /* 747 /*
634 * Looks like non-HS BABBLE can be ignored, but 748 * Looks like non-HS BABBLE can be ignored, but
@@ -641,7 +755,7 @@ b_host:
641 DBG(1, "BABBLE devctl: %02x\n", devctl); 755 DBG(1, "BABBLE devctl: %02x\n", devctl);
642 else { 756 else {
643 ERR("Stopping host session -- babble\n"); 757 ERR("Stopping host session -- babble\n");
644 musb_writeb(mbase, MUSB_DEVCTL, 0); 758 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
645 } 759 }
646 } else if (is_peripheral_capable()) { 760 } else if (is_peripheral_capable()) {
647 DBG(1, "BUS RESET as %s\n", otg_state_string(musb)); 761 DBG(1, "BUS RESET as %s\n", otg_state_string(musb));
@@ -686,29 +800,7 @@ b_host:
686 otg_state_string(musb)); 800 otg_state_string(musb));
687 } 801 }
688 } 802 }
689
690 handled = IRQ_HANDLED;
691 } 803 }
692 schedule_work(&musb->irq_work);
693
694 return handled;
695}
696
697/*
698 * Interrupt Service Routine to record USB "global" interrupts.
699 * Since these do not happen often and signify things of
700 * paramount importance, it seems OK to check them individually;
701 * the order of the tests is specified in the manual
702 *
703 * @param musb instance pointer
704 * @param int_usb register contents
705 * @param devctl
706 * @param power
707 */
708static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
709 u8 devctl, u8 power)
710{
711 irqreturn_t handled = IRQ_NONE;
712 804
713#if 0 805#if 0
714/* REVISIT ... this would be for multiplexing periodic endpoints, or 806/* REVISIT ... this would be for multiplexing periodic endpoints, or
@@ -755,117 +847,7 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
755 } 847 }
756#endif 848#endif
757 849
758 if ((int_usb & MUSB_INTR_DISCONNECT) && !musb->ignore_disconnect) { 850 schedule_work(&musb->irq_work);
759 DBG(1, "DISCONNECT (%s) as %s, devctl %02x\n",
760 otg_state_string(musb),
761 MUSB_MODE(musb), devctl);
762 handled = IRQ_HANDLED;
763
764 switch (musb->xceiv->state) {
765#ifdef CONFIG_USB_MUSB_HDRC_HCD
766 case OTG_STATE_A_HOST:
767 case OTG_STATE_A_SUSPEND:
768 usb_hcd_resume_root_hub(musb_to_hcd(musb));
769 musb_root_disconnect(musb);
770 if (musb->a_wait_bcon != 0 && is_otg_enabled(musb))
771 musb_platform_try_idle(musb, jiffies
772 + msecs_to_jiffies(musb->a_wait_bcon));
773 break;
774#endif /* HOST */
775#ifdef CONFIG_USB_MUSB_OTG
776 case OTG_STATE_B_HOST:
777 /* REVISIT this behaves for "real disconnect"
778 * cases; make sure the other transitions from
779 * from B_HOST act right too. The B_HOST code
780 * in hnp_stop() is currently not used...
781 */
782 musb_root_disconnect(musb);
783 musb_to_hcd(musb)->self.is_b_host = 0;
784 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
785 MUSB_DEV_MODE(musb);
786 musb_g_disconnect(musb);
787 break;
788 case OTG_STATE_A_PERIPHERAL:
789 musb_hnp_stop(musb);
790 musb_root_disconnect(musb);
791 /* FALLTHROUGH */
792 case OTG_STATE_B_WAIT_ACON:
793 /* FALLTHROUGH */
794#endif /* OTG */
795#ifdef CONFIG_USB_GADGET_MUSB_HDRC
796 case OTG_STATE_B_PERIPHERAL:
797 case OTG_STATE_B_IDLE:
798 musb_g_disconnect(musb);
799 break;
800#endif /* GADGET */
801 default:
802 WARNING("unhandled DISCONNECT transition (%s)\n",
803 otg_state_string(musb));
804 break;
805 }
806
807 schedule_work(&musb->irq_work);
808 }
809
810 if (int_usb & MUSB_INTR_SUSPEND) {
811 DBG(1, "SUSPEND (%s) devctl %02x power %02x\n",
812 otg_state_string(musb), devctl, power);
813 handled = IRQ_HANDLED;
814
815 switch (musb->xceiv->state) {
816#ifdef CONFIG_USB_MUSB_OTG
817 case OTG_STATE_A_PERIPHERAL:
818 /* We also come here if the cable is removed, since
819 * this silicon doesn't report ID-no-longer-grounded.
820 *
821 * We depend on T(a_wait_bcon) to shut us down, and
822 * hope users don't do anything dicey during this
823 * undesired detour through A_WAIT_BCON.
824 */
825 musb_hnp_stop(musb);
826 usb_hcd_resume_root_hub(musb_to_hcd(musb));
827 musb_root_disconnect(musb);
828 musb_platform_try_idle(musb, jiffies
829 + msecs_to_jiffies(musb->a_wait_bcon
830 ? : OTG_TIME_A_WAIT_BCON));
831 break;
832#endif
833 case OTG_STATE_B_PERIPHERAL:
834 musb_g_suspend(musb);
835 musb->is_active = is_otg_enabled(musb)
836 && musb->xceiv->gadget->b_hnp_enable;
837 if (musb->is_active) {
838#ifdef CONFIG_USB_MUSB_OTG
839 musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
840 DBG(1, "HNP: Setting timer for b_ase0_brst\n");
841 mod_timer(&musb->otg_timer, jiffies
842 + msecs_to_jiffies(
843 OTG_TIME_B_ASE0_BRST));
844#endif
845 }
846 break;
847 case OTG_STATE_A_WAIT_BCON:
848 if (musb->a_wait_bcon != 0)
849 musb_platform_try_idle(musb, jiffies
850 + msecs_to_jiffies(musb->a_wait_bcon));
851 break;
852 case OTG_STATE_A_HOST:
853 musb->xceiv->state = OTG_STATE_A_SUSPEND;
854 musb->is_active = is_otg_enabled(musb)
855 && musb->xceiv->host->b_hnp_enable;
856 break;
857 case OTG_STATE_B_HOST:
858 /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
859 DBG(1, "REVISIT: SUSPEND as B_HOST\n");
860 break;
861 default:
862 /* "should not happen" */
863 musb->is_active = 0;
864 break;
865 }
866 schedule_work(&musb->irq_work);
867 }
868
869 851
870 return handled; 852 return handled;
871} 853}
@@ -1095,6 +1077,36 @@ static struct fifo_cfg __initdata mode_4_cfg[] = {
1095{ .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, }, 1077{ .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1096}; 1078};
1097 1079
1080/* mode 5 - fits in 8KB */
1081static struct fifo_cfg __initdata mode_5_cfg[] = {
1082{ .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1083{ .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1084{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1085{ .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1086{ .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1087{ .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1088{ .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1089{ .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1090{ .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1091{ .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1092{ .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 32, },
1093{ .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 32, },
1094{ .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 32, },
1095{ .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 32, },
1096{ .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 32, },
1097{ .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 32, },
1098{ .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 32, },
1099{ .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 32, },
1100{ .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 32, },
1101{ .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 32, },
1102{ .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 32, },
1103{ .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 32, },
1104{ .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 32, },
1105{ .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 32, },
1106{ .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 512, },
1107{ .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1108{ .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1109};
1098 1110
1099/* 1111/*
1100 * configure a fifo; for non-shared endpoints, this may be called 1112 * configure a fifo; for non-shared endpoints, this may be called
@@ -1210,6 +1222,10 @@ static int __init ep_config_from_table(struct musb *musb)
1210 cfg = mode_4_cfg; 1222 cfg = mode_4_cfg;
1211 n = ARRAY_SIZE(mode_4_cfg); 1223 n = ARRAY_SIZE(mode_4_cfg);
1212 break; 1224 break;
1225 case 5:
1226 cfg = mode_5_cfg;
1227 n = ARRAY_SIZE(mode_5_cfg);
1228 break;
1213 } 1229 }
1214 1230
1215 printk(KERN_DEBUG "%s: setup fifo_mode %d\n", 1231 printk(KERN_DEBUG "%s: setup fifo_mode %d\n",
@@ -1314,9 +1330,6 @@ enum { MUSB_CONTROLLER_MHDRC, MUSB_CONTROLLER_HDRC, };
1314 */ 1330 */
1315static int __init musb_core_init(u16 musb_type, struct musb *musb) 1331static int __init musb_core_init(u16 musb_type, struct musb *musb)
1316{ 1332{
1317#ifdef MUSB_AHB_ID
1318 u32 data;
1319#endif
1320 u8 reg; 1333 u8 reg;
1321 char *type; 1334 char *type;
1322 char aInfo[90], aRevision[32], aDate[12]; 1335 char aInfo[90], aRevision[32], aDate[12];
@@ -1328,23 +1341,17 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
1328 reg = musb_read_configdata(mbase); 1341 reg = musb_read_configdata(mbase);
1329 1342
1330 strcpy(aInfo, (reg & MUSB_CONFIGDATA_UTMIDW) ? "UTMI-16" : "UTMI-8"); 1343 strcpy(aInfo, (reg & MUSB_CONFIGDATA_UTMIDW) ? "UTMI-16" : "UTMI-8");
1331 if (reg & MUSB_CONFIGDATA_DYNFIFO) 1344 if (reg & MUSB_CONFIGDATA_DYNFIFO) {
1332 strcat(aInfo, ", dyn FIFOs"); 1345 strcat(aInfo, ", dyn FIFOs");
1346 musb->dyn_fifo = true;
1347 }
1333 if (reg & MUSB_CONFIGDATA_MPRXE) { 1348 if (reg & MUSB_CONFIGDATA_MPRXE) {
1334 strcat(aInfo, ", bulk combine"); 1349 strcat(aInfo, ", bulk combine");
1335#ifdef C_MP_RX
1336 musb->bulk_combine = true; 1350 musb->bulk_combine = true;
1337#else
1338 strcat(aInfo, " (X)"); /* no driver support */
1339#endif
1340 } 1351 }
1341 if (reg & MUSB_CONFIGDATA_MPTXE) { 1352 if (reg & MUSB_CONFIGDATA_MPTXE) {
1342 strcat(aInfo, ", bulk split"); 1353 strcat(aInfo, ", bulk split");
1343#ifdef C_MP_TX
1344 musb->bulk_split = true; 1354 musb->bulk_split = true;
1345#else
1346 strcat(aInfo, " (X)"); /* no driver support */
1347#endif
1348 } 1355 }
1349 if (reg & MUSB_CONFIGDATA_HBRXE) { 1356 if (reg & MUSB_CONFIGDATA_HBRXE) {
1350 strcat(aInfo, ", HB-ISO Rx"); 1357 strcat(aInfo, ", HB-ISO Rx");
@@ -1360,20 +1367,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
1360 printk(KERN_DEBUG "%s: ConfigData=0x%02x (%s)\n", 1367 printk(KERN_DEBUG "%s: ConfigData=0x%02x (%s)\n",
1361 musb_driver_name, reg, aInfo); 1368 musb_driver_name, reg, aInfo);
1362 1369
1363#ifdef MUSB_AHB_ID
1364 data = musb_readl(mbase, 0x404);
1365 sprintf(aDate, "%04d-%02x-%02x", (data & 0xffff),
1366 (data >> 16) & 0xff, (data >> 24) & 0xff);
1367 /* FIXME ID2 and ID3 are unused */
1368 data = musb_readl(mbase, 0x408);
1369 printk(KERN_DEBUG "ID2=%lx\n", (long unsigned)data);
1370 data = musb_readl(mbase, 0x40c);
1371 printk(KERN_DEBUG "ID3=%lx\n", (long unsigned)data);
1372 reg = musb_readb(mbase, 0x400);
1373 musb_type = ('M' == reg) ? MUSB_CONTROLLER_MHDRC : MUSB_CONTROLLER_HDRC;
1374#else
1375 aDate[0] = 0; 1370 aDate[0] = 0;
1376#endif
1377 if (MUSB_CONTROLLER_MHDRC == musb_type) { 1371 if (MUSB_CONTROLLER_MHDRC == musb_type) {
1378 musb->is_multipoint = 1; 1372 musb->is_multipoint = 1;
1379 type = "M"; 1373 type = "M";
@@ -1404,21 +1398,10 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
1404 musb->nr_endpoints = 1; 1398 musb->nr_endpoints = 1;
1405 musb->epmask = 1; 1399 musb->epmask = 1;
1406 1400
1407 if (reg & MUSB_CONFIGDATA_DYNFIFO) { 1401 if (musb->dyn_fifo)
1408 if (musb->config->dyn_fifo) 1402 status = ep_config_from_table(musb);
1409 status = ep_config_from_table(musb); 1403 else
1410 else { 1404 status = ep_config_from_hw(musb);
1411 ERR("reconfigure software for Dynamic FIFOs\n");
1412 status = -ENODEV;
1413 }
1414 } else {
1415 if (!musb->config->dyn_fifo)
1416 status = ep_config_from_hw(musb);
1417 else {
1418 ERR("reconfigure software for static FIFOs\n");
1419 return -ENODEV;
1420 }
1421 }
1422 1405
1423 if (status < 0) 1406 if (status < 0)
1424 return status; 1407 return status;
@@ -1587,11 +1570,6 @@ irqreturn_t musb_interrupt(struct musb *musb)
1587 ep_num++; 1570 ep_num++;
1588 } 1571 }
1589 1572
1590 /* finish handling "global" interrupts after handling fifos */
1591 if (musb->int_usb)
1592 retval |= musb_stage2_irq(musb,
1593 musb->int_usb, devctl, power);
1594
1595 return retval; 1573 return retval;
1596} 1574}
1597 1575
@@ -1696,7 +1674,7 @@ musb_vbus_store(struct device *dev, struct device_attribute *attr,
1696 unsigned long val; 1674 unsigned long val;
1697 1675
1698 if (sscanf(buf, "%lu", &val) < 1) { 1676 if (sscanf(buf, "%lu", &val) < 1) {
1699 printk(KERN_ERR "Invalid VBUS timeout ms value\n"); 1677 dev_err(dev, "Invalid VBUS timeout ms value\n");
1700 return -EINVAL; 1678 return -EINVAL;
1701 } 1679 }
1702 1680
@@ -1746,7 +1724,7 @@ musb_srp_store(struct device *dev, struct device_attribute *attr,
1746 1724
1747 if (sscanf(buf, "%hu", &srp) != 1 1725 if (sscanf(buf, "%hu", &srp) != 1
1748 || (srp != 1)) { 1726 || (srp != 1)) {
1749 printk(KERN_ERR "SRP: Value must be 1\n"); 1727 dev_err(dev, "SRP: Value must be 1\n");
1750 return -EINVAL; 1728 return -EINVAL;
1751 } 1729 }
1752 1730
@@ -1759,6 +1737,19 @@ static DEVICE_ATTR(srp, 0644, NULL, musb_srp_store);
1759 1737
1760#endif /* CONFIG_USB_GADGET_MUSB_HDRC */ 1738#endif /* CONFIG_USB_GADGET_MUSB_HDRC */
1761 1739
1740static struct attribute *musb_attributes[] = {
1741 &dev_attr_mode.attr,
1742 &dev_attr_vbus.attr,
1743#ifdef CONFIG_USB_GADGET_MUSB_HDRC
1744 &dev_attr_srp.attr,
1745#endif
1746 NULL
1747};
1748
1749static const struct attribute_group musb_attr_group = {
1750 .attrs = musb_attributes,
1751};
1752
1762#endif /* sysfs */ 1753#endif /* sysfs */
1763 1754
1764/* Only used to provide driver mode change events */ 1755/* Only used to provide driver mode change events */
@@ -1833,11 +1824,7 @@ static void musb_free(struct musb *musb)
1833 */ 1824 */
1834 1825
1835#ifdef CONFIG_SYSFS 1826#ifdef CONFIG_SYSFS
1836 device_remove_file(musb->controller, &dev_attr_mode); 1827 sysfs_remove_group(&musb->controller->kobj, &musb_attr_group);
1837 device_remove_file(musb->controller, &dev_attr_vbus);
1838#ifdef CONFIG_USB_GADGET_MUSB_HDRC
1839 device_remove_file(musb->controller, &dev_attr_srp);
1840#endif
1841#endif 1828#endif
1842 1829
1843#ifdef CONFIG_USB_GADGET_MUSB_HDRC 1830#ifdef CONFIG_USB_GADGET_MUSB_HDRC
@@ -2017,22 +2004,10 @@ bad_config:
2017 musb->irq_wake = 0; 2004 musb->irq_wake = 0;
2018 } 2005 }
2019 2006
2020 pr_info("%s: USB %s mode controller at %p using %s, IRQ %d\n",
2021 musb_driver_name,
2022 ({char *s;
2023 switch (musb->board_mode) {
2024 case MUSB_HOST: s = "Host"; break;
2025 case MUSB_PERIPHERAL: s = "Peripheral"; break;
2026 default: s = "OTG"; break;
2027 }; s; }),
2028 ctrl,
2029 (is_dma_capable() && musb->dma_controller)
2030 ? "DMA" : "PIO",
2031 musb->nIrq);
2032
2033 /* host side needs more setup */ 2007 /* host side needs more setup */
2034 if (is_host_enabled(musb)) { 2008 if (is_host_enabled(musb)) {
2035 struct usb_hcd *hcd = musb_to_hcd(musb); 2009 struct usb_hcd *hcd = musb_to_hcd(musb);
2010 u8 busctl;
2036 2011
2037 otg_set_host(musb->xceiv, &hcd->self); 2012 otg_set_host(musb->xceiv, &hcd->self);
2038 2013
@@ -2040,6 +2015,13 @@ bad_config:
2040 hcd->self.otg_port = 1; 2015 hcd->self.otg_port = 1;
2041 musb->xceiv->host = &hcd->self; 2016 musb->xceiv->host = &hcd->self;
2042 hcd->power_budget = 2 * (plat->power ? : 250); 2017 hcd->power_budget = 2 * (plat->power ? : 250);
2018
2019 /* program PHY to use external vBus if required */
2020 if (plat->extvbus) {
2021 busctl = musb_readb(musb->mregs, MUSB_ULPI_BUSCONTROL);
2022 busctl |= MUSB_ULPI_USE_EXTVBUS;
2023 musb_writeb(musb->mregs, MUSB_ULPI_BUSCONTROL, busctl);
2024 }
2043 } 2025 }
2044 2026
2045 /* For the host-only role, we can activate right away. 2027 /* For the host-only role, we can activate right away.
@@ -2079,26 +2061,26 @@ bad_config:
2079 } 2061 }
2080 2062
2081#ifdef CONFIG_SYSFS 2063#ifdef CONFIG_SYSFS
2082 status = device_create_file(dev, &dev_attr_mode); 2064 status = sysfs_create_group(&musb->controller->kobj, &musb_attr_group);
2083 status = device_create_file(dev, &dev_attr_vbus);
2084#ifdef CONFIG_USB_GADGET_MUSB_HDRC
2085 status = device_create_file(dev, &dev_attr_srp);
2086#endif /* CONFIG_USB_GADGET_MUSB_HDRC */
2087 status = 0;
2088#endif 2065#endif
2089 if (status) 2066 if (status)
2090 goto fail2; 2067 goto fail2;
2091 2068
2069 dev_info(dev, "USB %s mode controller at %p using %s, IRQ %d\n",
2070 ({char *s;
2071 switch (musb->board_mode) {
2072 case MUSB_HOST: s = "Host"; break;
2073 case MUSB_PERIPHERAL: s = "Peripheral"; break;
2074 default: s = "OTG"; break;
2075 }; s; }),
2076 ctrl,
2077 (is_dma_capable() && musb->dma_controller)
2078 ? "DMA" : "PIO",
2079 musb->nIrq);
2080
2092 return 0; 2081 return 0;
2093 2082
2094fail2: 2083fail2:
2095#ifdef CONFIG_SYSFS
2096 device_remove_file(musb->controller, &dev_attr_mode);
2097 device_remove_file(musb->controller, &dev_attr_vbus);
2098#ifdef CONFIG_USB_GADGET_MUSB_HDRC
2099 device_remove_file(musb->controller, &dev_attr_srp);
2100#endif
2101#endif
2102 musb_platform_exit(musb); 2084 musb_platform_exit(musb);
2103fail: 2085fail:
2104 dev_err(musb->controller, 2086 dev_err(musb->controller,
@@ -2127,6 +2109,7 @@ static int __init musb_probe(struct platform_device *pdev)
2127{ 2109{
2128 struct device *dev = &pdev->dev; 2110 struct device *dev = &pdev->dev;
2129 int irq = platform_get_irq(pdev, 0); 2111 int irq = platform_get_irq(pdev, 0);
2112 int status;
2130 struct resource *iomem; 2113 struct resource *iomem;
2131 void __iomem *base; 2114 void __iomem *base;
2132 2115
@@ -2134,7 +2117,7 @@ static int __init musb_probe(struct platform_device *pdev)
2134 if (!iomem || irq == 0) 2117 if (!iomem || irq == 0)
2135 return -ENODEV; 2118 return -ENODEV;
2136 2119
2137 base = ioremap(iomem->start, iomem->end - iomem->start + 1); 2120 base = ioremap(iomem->start, resource_size(iomem));
2138 if (!base) { 2121 if (!base) {
2139 dev_err(dev, "ioremap failed\n"); 2122 dev_err(dev, "ioremap failed\n");
2140 return -ENOMEM; 2123 return -ENOMEM;
@@ -2144,7 +2127,12 @@ static int __init musb_probe(struct platform_device *pdev)
2144 /* clobbered by use_dma=n */ 2127 /* clobbered by use_dma=n */
2145 orig_dma_mask = dev->dma_mask; 2128 orig_dma_mask = dev->dma_mask;
2146#endif 2129#endif
2147 return musb_init_controller(dev, irq, base); 2130
2131 status = musb_init_controller(dev, irq, base);
2132 if (status < 0)
2133 iounmap(base);
2134
2135 return status;
2148} 2136}
2149 2137
2150static int __exit musb_remove(struct platform_device *pdev) 2138static int __exit musb_remove(struct platform_device *pdev)
@@ -2173,6 +2161,148 @@ static int __exit musb_remove(struct platform_device *pdev)
2173 2161
2174#ifdef CONFIG_PM 2162#ifdef CONFIG_PM
2175 2163
2164static struct musb_context_registers musb_context;
2165
2166void musb_save_context(struct musb *musb)
2167{
2168 int i;
2169 void __iomem *musb_base = musb->mregs;
2170
2171 if (is_host_enabled(musb)) {
2172 musb_context.frame = musb_readw(musb_base, MUSB_FRAME);
2173 musb_context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
2174 }
2175 musb_context.power = musb_readb(musb_base, MUSB_POWER);
2176 musb_context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE);
2177 musb_context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE);
2178 musb_context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE);
2179 musb_context.index = musb_readb(musb_base, MUSB_INDEX);
2180 musb_context.devctl = musb_readb(musb_base, MUSB_DEVCTL);
2181
2182 for (i = 0; i < MUSB_C_NUM_EPS; ++i) {
2183 musb_writeb(musb_base, MUSB_INDEX, i);
2184 musb_context.index_regs[i].txmaxp =
2185 musb_readw(musb_base, 0x10 + MUSB_TXMAXP);
2186 musb_context.index_regs[i].txcsr =
2187 musb_readw(musb_base, 0x10 + MUSB_TXCSR);
2188 musb_context.index_regs[i].rxmaxp =
2189 musb_readw(musb_base, 0x10 + MUSB_RXMAXP);
2190 musb_context.index_regs[i].rxcsr =
2191 musb_readw(musb_base, 0x10 + MUSB_RXCSR);
2192
2193 if (musb->dyn_fifo) {
2194 musb_context.index_regs[i].txfifoadd =
2195 musb_read_txfifoadd(musb_base);
2196 musb_context.index_regs[i].rxfifoadd =
2197 musb_read_rxfifoadd(musb_base);
2198 musb_context.index_regs[i].txfifosz =
2199 musb_read_txfifosz(musb_base);
2200 musb_context.index_regs[i].rxfifosz =
2201 musb_read_rxfifosz(musb_base);
2202 }
2203 if (is_host_enabled(musb)) {
2204 musb_context.index_regs[i].txtype =
2205 musb_readb(musb_base, 0x10 + MUSB_TXTYPE);
2206 musb_context.index_regs[i].txinterval =
2207 musb_readb(musb_base, 0x10 + MUSB_TXINTERVAL);
2208 musb_context.index_regs[i].rxtype =
2209 musb_readb(musb_base, 0x10 + MUSB_RXTYPE);
2210 musb_context.index_regs[i].rxinterval =
2211 musb_readb(musb_base, 0x10 + MUSB_RXINTERVAL);
2212
2213 musb_context.index_regs[i].txfunaddr =
2214 musb_read_txfunaddr(musb_base, i);
2215 musb_context.index_regs[i].txhubaddr =
2216 musb_read_txhubaddr(musb_base, i);
2217 musb_context.index_regs[i].txhubport =
2218 musb_read_txhubport(musb_base, i);
2219
2220 musb_context.index_regs[i].rxfunaddr =
2221 musb_read_rxfunaddr(musb_base, i);
2222 musb_context.index_regs[i].rxhubaddr =
2223 musb_read_rxhubaddr(musb_base, i);
2224 musb_context.index_regs[i].rxhubport =
2225 musb_read_rxhubport(musb_base, i);
2226 }
2227 }
2228
2229 musb_writeb(musb_base, MUSB_INDEX, musb_context.index);
2230
2231 musb_platform_save_context(musb, &musb_context);
2232}
2233
2234void musb_restore_context(struct musb *musb)
2235{
2236 int i;
2237 void __iomem *musb_base = musb->mregs;
2238 void __iomem *ep_target_regs;
2239
2240 musb_platform_restore_context(musb, &musb_context);
2241
2242 if (is_host_enabled(musb)) {
2243 musb_writew(musb_base, MUSB_FRAME, musb_context.frame);
2244 musb_writeb(musb_base, MUSB_TESTMODE, musb_context.testmode);
2245 }
2246 musb_writeb(musb_base, MUSB_POWER, musb_context.power);
2247 musb_writew(musb_base, MUSB_INTRTXE, musb_context.intrtxe);
2248 musb_writew(musb_base, MUSB_INTRRXE, musb_context.intrrxe);
2249 musb_writeb(musb_base, MUSB_INTRUSBE, musb_context.intrusbe);
2250 musb_writeb(musb_base, MUSB_DEVCTL, musb_context.devctl);
2251
2252 for (i = 0; i < MUSB_C_NUM_EPS; ++i) {
2253 musb_writeb(musb_base, MUSB_INDEX, i);
2254 musb_writew(musb_base, 0x10 + MUSB_TXMAXP,
2255 musb_context.index_regs[i].txmaxp);
2256 musb_writew(musb_base, 0x10 + MUSB_TXCSR,
2257 musb_context.index_regs[i].txcsr);
2258 musb_writew(musb_base, 0x10 + MUSB_RXMAXP,
2259 musb_context.index_regs[i].rxmaxp);
2260 musb_writew(musb_base, 0x10 + MUSB_RXCSR,
2261 musb_context.index_regs[i].rxcsr);
2262
2263 if (musb->dyn_fifo) {
2264 musb_write_txfifosz(musb_base,
2265 musb_context.index_regs[i].txfifosz);
2266 musb_write_rxfifosz(musb_base,
2267 musb_context.index_regs[i].rxfifosz);
2268 musb_write_txfifoadd(musb_base,
2269 musb_context.index_regs[i].txfifoadd);
2270 musb_write_rxfifoadd(musb_base,
2271 musb_context.index_regs[i].rxfifoadd);
2272 }
2273
2274 if (is_host_enabled(musb)) {
2275 musb_writeb(musb_base, 0x10 + MUSB_TXTYPE,
2276 musb_context.index_regs[i].txtype);
2277 musb_writeb(musb_base, 0x10 + MUSB_TXINTERVAL,
2278 musb_context.index_regs[i].txinterval);
2279 musb_writeb(musb_base, 0x10 + MUSB_RXTYPE,
2280 musb_context.index_regs[i].rxtype);
2281 musb_writeb(musb_base, 0x10 + MUSB_RXINTERVAL,
2282
2283 musb_context.index_regs[i].rxinterval);
2284 musb_write_txfunaddr(musb_base, i,
2285 musb_context.index_regs[i].txfunaddr);
2286 musb_write_txhubaddr(musb_base, i,
2287 musb_context.index_regs[i].txhubaddr);
2288 musb_write_txhubport(musb_base, i,
2289 musb_context.index_regs[i].txhubport);
2290
2291 ep_target_regs =
2292 musb_read_target_reg_base(i, musb_base);
2293
2294 musb_write_rxfunaddr(ep_target_regs,
2295 musb_context.index_regs[i].rxfunaddr);
2296 musb_write_rxhubaddr(ep_target_regs,
2297 musb_context.index_regs[i].rxhubaddr);
2298 musb_write_rxhubport(ep_target_regs,
2299 musb_context.index_regs[i].rxhubport);
2300 }
2301 }
2302
2303 musb_writeb(musb_base, MUSB_INDEX, musb_context.index);
2304}
2305
2176static int musb_suspend(struct device *dev) 2306static int musb_suspend(struct device *dev)
2177{ 2307{
2178 struct platform_device *pdev = to_platform_device(dev); 2308 struct platform_device *pdev = to_platform_device(dev);
@@ -2194,6 +2324,8 @@ static int musb_suspend(struct device *dev)
2194 */ 2324 */
2195 } 2325 }
2196 2326
2327 musb_save_context(musb);
2328
2197 if (musb->set_clock) 2329 if (musb->set_clock)
2198 musb->set_clock(musb->clock, 0); 2330 musb->set_clock(musb->clock, 0);
2199 else 2331 else
@@ -2215,6 +2347,8 @@ static int musb_resume_noirq(struct device *dev)
2215 else 2347 else
2216 clk_enable(musb->clock); 2348 clk_enable(musb->clock);
2217 2349
2350 musb_restore_context(musb);
2351
2218 /* for static cmos like DaVinci, register values were preserved 2352 /* for static cmos like DaVinci, register values were preserved
2219 * unless for some reason the whole soc powered down or the USB 2353 * unless for some reason the whole soc powered down or the USB
2220 * module got reset through the PSC (vs just being disabled). 2354 * module got reset through the PSC (vs just being disabled).
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 5514c7ee85bd..d849fb81c131 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -52,6 +52,15 @@ struct musb;
52struct musb_hw_ep; 52struct musb_hw_ep;
53struct musb_ep; 53struct musb_ep;
54 54
55/* Helper defines for struct musb->hwvers */
56#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
57#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
58#define MUSB_HWVERS_RC 0x8000
59#define MUSB_HWVERS_1300 0x52C
60#define MUSB_HWVERS_1400 0x590
61#define MUSB_HWVERS_1800 0x720
62#define MUSB_HWVERS_1900 0x784
63#define MUSB_HWVERS_2000 0x800
55 64
56#include "musb_debug.h" 65#include "musb_debug.h"
57#include "musb_dma.h" 66#include "musb_dma.h"
@@ -322,13 +331,6 @@ struct musb {
322 struct clk *clock; 331 struct clk *clock;
323 irqreturn_t (*isr)(int, void *); 332 irqreturn_t (*isr)(int, void *);
324 struct work_struct irq_work; 333 struct work_struct irq_work;
325#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
326#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
327#define MUSB_HWVERS_RC 0x8000
328#define MUSB_HWVERS_1300 0x52C
329#define MUSB_HWVERS_1400 0x590
330#define MUSB_HWVERS_1800 0x720
331#define MUSB_HWVERS_2000 0x800
332 u16 hwvers; 334 u16 hwvers;
333 335
334/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 336/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
@@ -411,22 +413,15 @@ struct musb {
411 413
412 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 414 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
413 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 415 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
416 unsigned dyn_fifo:1; /* dynamic FIFO supported? */
414 417
415#ifdef C_MP_TX 418 unsigned bulk_split:1;
416 unsigned bulk_split:1;
417#define can_bulk_split(musb,type) \ 419#define can_bulk_split(musb,type) \
418 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 420 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
419#else
420#define can_bulk_split(musb, type) 0
421#endif
422 421
423#ifdef C_MP_RX 422 unsigned bulk_combine:1;
424 unsigned bulk_combine:1;
425#define can_bulk_combine(musb,type) \ 423#define can_bulk_combine(musb,type) \
426 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 424 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
427#else
428#define can_bulk_combine(musb, type) 0
429#endif
430 425
431#ifdef CONFIG_USB_GADGET_MUSB_HDRC 426#ifdef CONFIG_USB_GADGET_MUSB_HDRC
432 /* is_suspended means USB B_PERIPHERAL suspend */ 427 /* is_suspended means USB B_PERIPHERAL suspend */
@@ -461,6 +456,45 @@ struct musb {
461#endif 456#endif
462}; 457};
463 458
459#ifdef CONFIG_PM
460struct musb_csr_regs {
461 /* FIFO registers */
462 u16 txmaxp, txcsr, rxmaxp, rxcsr;
463 u16 rxfifoadd, txfifoadd;
464 u8 txtype, txinterval, rxtype, rxinterval;
465 u8 rxfifosz, txfifosz;
466 u8 txfunaddr, txhubaddr, txhubport;
467 u8 rxfunaddr, rxhubaddr, rxhubport;
468};
469
470struct musb_context_registers {
471
472#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP2430)
473 u32 otg_sysconfig, otg_forcestandby;
474#endif
475 u8 power;
476 u16 intrtxe, intrrxe;
477 u8 intrusbe;
478 u16 frame;
479 u8 index, testmode;
480
481 u8 devctl, misc;
482
483 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
484};
485
486#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP2430)
487extern void musb_platform_save_context(struct musb *musb,
488 struct musb_context_registers *musb_context);
489extern void musb_platform_restore_context(struct musb *musb,
490 struct musb_context_registers *musb_context);
491#else
492#define musb_platform_save_context(m, x) do {} while (0)
493#define musb_platform_restore_context(m, x) do {} while (0)
494#endif
495
496#endif
497
464static inline void musb_set_vbus(struct musb *musb, int is_on) 498static inline void musb_set_vbus(struct musb *musb, int is_on)
465{ 499{
466 musb->board_set_vbus(musb, is_on); 500 musb->board_set_vbus(musb, is_on);
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index cbcf14a236e6..a9f288cd70ed 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -895,7 +895,14 @@ static int musb_gadget_enable(struct usb_ep *ep,
895 /* REVISIT if can_bulk_split(), use by updating "tmp"; 895 /* REVISIT if can_bulk_split(), use by updating "tmp";
896 * likewise high bandwidth periodic tx 896 * likewise high bandwidth periodic tx
897 */ 897 */
898 musb_writew(regs, MUSB_TXMAXP, tmp); 898 /* Set TXMAXP with the FIFO size of the endpoint
899 * to disable double buffering mode. Currently, It seems that double
900 * buffering has problem if musb RTL revision number < 2.0.
901 */
902 if (musb->hwvers < MUSB_HWVERS_2000)
903 musb_writew(regs, MUSB_TXMAXP, hw_ep->max_packet_sz_tx);
904 else
905 musb_writew(regs, MUSB_TXMAXP, tmp);
899 906
900 csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG; 907 csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG;
901 if (musb_readw(regs, MUSB_TXCSR) 908 if (musb_readw(regs, MUSB_TXCSR)
@@ -925,7 +932,13 @@ static int musb_gadget_enable(struct usb_ep *ep,
925 /* REVISIT if can_bulk_combine() use by updating "tmp" 932 /* REVISIT if can_bulk_combine() use by updating "tmp"
926 * likewise high bandwidth periodic rx 933 * likewise high bandwidth periodic rx
927 */ 934 */
928 musb_writew(regs, MUSB_RXMAXP, tmp); 935 /* Set RXMAXP with the FIFO size of the endpoint
936 * to disable double buffering mode.
937 */
938 if (musb->hwvers < MUSB_HWVERS_2000)
939 musb_writew(regs, MUSB_RXMAXP, hw_ep->max_packet_sz_rx);
940 else
941 musb_writew(regs, MUSB_RXMAXP, tmp);
929 942
930 /* force shared fifo to OUT-only mode */ 943 /* force shared fifo to OUT-only mode */
931 if (hw_ep->is_shared_fifo) { 944 if (hw_ep->is_shared_fifo) {
@@ -1697,8 +1710,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1697 return -EINVAL; 1710 return -EINVAL;
1698 1711
1699 /* driver must be initialized to support peripheral mode */ 1712 /* driver must be initialized to support peripheral mode */
1700 if (!musb || !(musb->board_mode == MUSB_OTG 1713 if (!musb) {
1701 || musb->board_mode != MUSB_OTG)) {
1702 DBG(1, "%s, no dev??\n", __func__); 1714 DBG(1, "%s, no dev??\n", __func__);
1703 return -ENODEV; 1715 return -ENODEV;
1704 } 1716 }
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 74c4c3698f1e..3421cf9858b5 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -605,8 +605,14 @@ musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep)
605 musb_writeb(ep->regs, MUSB_RXTYPE, qh->type_reg); 605 musb_writeb(ep->regs, MUSB_RXTYPE, qh->type_reg);
606 musb_writeb(ep->regs, MUSB_RXINTERVAL, qh->intv_reg); 606 musb_writeb(ep->regs, MUSB_RXINTERVAL, qh->intv_reg);
607 /* NOTE: bulk combining rewrites high bits of maxpacket */ 607 /* NOTE: bulk combining rewrites high bits of maxpacket */
608 musb_writew(ep->regs, MUSB_RXMAXP, 608 /* Set RXMAXP with the FIFO size of the endpoint
609 qh->maxpacket | ((qh->hb_mult - 1) << 11)); 609 * to disable double buffer mode.
610 */
611 if (musb->hwvers < MUSB_HWVERS_2000)
612 musb_writew(ep->regs, MUSB_RXMAXP, ep->max_packet_sz_rx);
613 else
614 musb_writew(ep->regs, MUSB_RXMAXP,
615 qh->maxpacket | ((qh->hb_mult - 1) << 11));
610 616
611 ep->rx_reinit = 0; 617 ep->rx_reinit = 0;
612} 618}
@@ -1771,6 +1777,9 @@ static int musb_schedule(
1771 int best_end, epnum; 1777 int best_end, epnum;
1772 struct musb_hw_ep *hw_ep = NULL; 1778 struct musb_hw_ep *hw_ep = NULL;
1773 struct list_head *head = NULL; 1779 struct list_head *head = NULL;
1780 u8 toggle;
1781 u8 txtype;
1782 struct urb *urb = next_urb(qh);
1774 1783
1775 /* use fixed hardware for control and bulk */ 1784 /* use fixed hardware for control and bulk */
1776 if (qh->type == USB_ENDPOINT_XFER_CONTROL) { 1785 if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
@@ -1809,6 +1818,27 @@ static int musb_schedule(
1809 diff -= (qh->maxpacket * qh->hb_mult); 1818 diff -= (qh->maxpacket * qh->hb_mult);
1810 1819
1811 if (diff >= 0 && best_diff > diff) { 1820 if (diff >= 0 && best_diff > diff) {
1821
1822 /*
1823 * Mentor controller has a bug in that if we schedule
1824 * a BULK Tx transfer on an endpoint that had earlier
1825 * handled ISOC then the BULK transfer has to start on
1826 * a zero toggle. If the BULK transfer starts on a 1
1827 * toggle then this transfer will fail as the mentor
1828 * controller starts the Bulk transfer on a 0 toggle
1829 * irrespective of the programming of the toggle bits
1830 * in the TXCSR register. Check for this condition
1831 * while allocating the EP for a Tx Bulk transfer. If
1832 * so skip this EP.
1833 */
1834 hw_ep = musb->endpoints + epnum;
1835 toggle = usb_gettoggle(urb->dev, qh->epnum, !is_in);
1836 txtype = (musb_readb(hw_ep->regs, MUSB_TXTYPE)
1837 >> 4) & 0x3;
1838 if (!is_in && (qh->type == USB_ENDPOINT_XFER_BULK) &&
1839 toggle && (txtype == USB_ENDPOINT_XFER_ISOC))
1840 continue;
1841
1812 best_diff = diff; 1842 best_diff = diff;
1813 best_end = epnum; 1843 best_end = epnum;
1814 } 1844 }
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index 473a94ef905f..292894a2c247 100644
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
@@ -72,6 +72,10 @@
72#define MUSB_DEVCTL_HR 0x02 72#define MUSB_DEVCTL_HR 0x02
73#define MUSB_DEVCTL_SESSION 0x01 73#define MUSB_DEVCTL_SESSION 0x01
74 74
75/* MUSB ULPI VBUSCONTROL */
76#define MUSB_ULPI_USE_EXTVBUS 0x01
77#define MUSB_ULPI_USE_EXTVBUSIND 0x02
78
75/* TESTMODE */ 79/* TESTMODE */
76#define MUSB_TEST_FORCE_HOST 0x80 80#define MUSB_TEST_FORCE_HOST 0x80
77#define MUSB_TEST_FIFO_ACCESS 0x40 81#define MUSB_TEST_FIFO_ACCESS 0x40
@@ -246,6 +250,7 @@
246 250
247/* REVISIT: vctrl/vstatus: optional vendor utmi+phy register at 0x68 */ 251/* REVISIT: vctrl/vstatus: optional vendor utmi+phy register at 0x68 */
248#define MUSB_HWVERS 0x6C /* 8 bit */ 252#define MUSB_HWVERS 0x6C /* 8 bit */
253#define MUSB_ULPI_BUSCONTROL 0x70 /* 8 bit */
249 254
250#define MUSB_EPINFO 0x78 /* 8 bit */ 255#define MUSB_EPINFO 0x78 /* 8 bit */
251#define MUSB_RAMINFO 0x79 /* 8 bit */ 256#define MUSB_RAMINFO 0x79 /* 8 bit */
@@ -321,6 +326,26 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
321 musb_writew(mbase, MUSB_RXFIFOADD, c_off); 326 musb_writew(mbase, MUSB_RXFIFOADD, c_off);
322} 327}
323 328
329static inline u8 musb_read_txfifosz(void __iomem *mbase)
330{
331 return musb_readb(mbase, MUSB_TXFIFOSZ);
332}
333
334static inline u16 musb_read_txfifoadd(void __iomem *mbase)
335{
336 return musb_readw(mbase, MUSB_TXFIFOADD);
337}
338
339static inline u8 musb_read_rxfifosz(void __iomem *mbase)
340{
341 return musb_readb(mbase, MUSB_RXFIFOSZ);
342}
343
344static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
345{
346 return musb_readw(mbase, MUSB_RXFIFOADD);
347}
348
324static inline u8 musb_read_configdata(void __iomem *mbase) 349static inline u8 musb_read_configdata(void __iomem *mbase)
325{ 350{
326 musb_writeb(mbase, MUSB_INDEX, 0); 351 musb_writeb(mbase, MUSB_INDEX, 0);
@@ -376,6 +401,36 @@ static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum,
376 qh_h_port_reg); 401 qh_h_port_reg);
377} 402}
378 403
404static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)
405{
406 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXFUNCADDR));
407}
408
409static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)
410{
411 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXHUBADDR));
412}
413
414static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)
415{
416 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXHUBPORT));
417}
418
419static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum)
420{
421 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXFUNCADDR));
422}
423
424static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum)
425{
426 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBADDR));
427}
428
429static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum)
430{
431 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBPORT));
432}
433
379#else /* CONFIG_BLACKFIN */ 434#else /* CONFIG_BLACKFIN */
380 435
381#define USB_BASE USB_FADDR 436#define USB_BASE USB_FADDR
@@ -455,6 +510,22 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
455{ 510{
456} 511}
457 512
513static inline u8 musb_read_txfifosz(void __iomem *mbase)
514{
515}
516
517static inline u16 musb_read_txfifoadd(void __iomem *mbase)
518{
519}
520
521static inline u8 musb_read_rxfifosz(void __iomem *mbase)
522{
523}
524
525static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
526{
527}
528
458static inline u8 musb_read_configdata(void __iomem *mbase) 529static inline u8 musb_read_configdata(void __iomem *mbase)
459{ 530{
460 return 0; 531 return 0;
@@ -462,7 +533,11 @@ static inline u8 musb_read_configdata(void __iomem *mbase)
462 533
463static inline u16 musb_read_hwvers(void __iomem *mbase) 534static inline u16 musb_read_hwvers(void __iomem *mbase)
464{ 535{
465 return 0; 536 /*
537 * This register is invisible on Blackfin, actually the MUSB
538 * RTL version of Blackfin is 1.9, so just harcode its value.
539 */
540 return MUSB_HWVERS_1900;
466} 541}
467 542
468static inline void __iomem *musb_read_target_reg_base(u8 i, void __iomem *mbase) 543static inline void __iomem *musb_read_target_reg_base(u8 i, void __iomem *mbase)
@@ -500,6 +575,30 @@ static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum,
500{ 575{
501} 576}
502 577
578static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)
579{
580}
581
582static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)
583{
584}
585
586static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)
587{
588}
589
590static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum)
591{
592}
593
594static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum)
595{
596}
597
598static inline void musb_read_txhubport(void __iomem *mbase, u8 epnum)
599{
600}
601
503#endif /* CONFIG_BLACKFIN */ 602#endif /* CONFIG_BLACKFIN */
504 603
505#endif /* __MUSB_REGS_H__ */ 604#endif /* __MUSB_REGS_H__ */
diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c
index a237550f91bf..2fa7d5c00f31 100644
--- a/drivers/usb/musb/musbhsdma.c
+++ b/drivers/usb/musb/musbhsdma.c
@@ -250,20 +250,39 @@ static irqreturn_t dma_controller_irq(int irq, void *private_data)
250 u8 bchannel; 250 u8 bchannel;
251 u8 int_hsdma; 251 u8 int_hsdma;
252 252
253 u32 addr; 253 u32 addr, count;
254 u16 csr; 254 u16 csr;
255 255
256 spin_lock_irqsave(&musb->lock, flags); 256 spin_lock_irqsave(&musb->lock, flags);
257 257
258 int_hsdma = musb_readb(mbase, MUSB_HSDMA_INTR); 258 int_hsdma = musb_readb(mbase, MUSB_HSDMA_INTR);
259 if (!int_hsdma)
260 goto done;
261 259
262#ifdef CONFIG_BLACKFIN 260#ifdef CONFIG_BLACKFIN
263 /* Clear DMA interrupt flags */ 261 /* Clear DMA interrupt flags */
264 musb_writeb(mbase, MUSB_HSDMA_INTR, int_hsdma); 262 musb_writeb(mbase, MUSB_HSDMA_INTR, int_hsdma);
265#endif 263#endif
266 264
265 if (!int_hsdma) {
266 DBG(2, "spurious DMA irq\n");
267
268 for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) {
269 musb_channel = (struct musb_dma_channel *)
270 &(controller->channel[bchannel]);
271 channel = &musb_channel->channel;
272 if (channel->status == MUSB_DMA_STATUS_BUSY) {
273 count = musb_read_hsdma_count(mbase, bchannel);
274
275 if (count == 0)
276 int_hsdma |= (1 << bchannel);
277 }
278 }
279
280 DBG(2, "int_hsdma = 0x%x\n", int_hsdma);
281
282 if (!int_hsdma)
283 goto done;
284 }
285
267 for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) { 286 for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) {
268 if (int_hsdma & (1 << bchannel)) { 287 if (int_hsdma & (1 << bchannel)) {
269 musb_channel = (struct musb_dma_channel *) 288 musb_channel = (struct musb_dma_channel *)
diff --git a/drivers/usb/musb/musbhsdma.h b/drivers/usb/musb/musbhsdma.h
index 1299d92dc83f..613f95a058f7 100644
--- a/drivers/usb/musb/musbhsdma.h
+++ b/drivers/usb/musb/musbhsdma.h
@@ -55,6 +55,10 @@
55 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDRESS), \ 55 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDRESS), \
56 addr) 56 addr)
57 57
58#define musb_read_hsdma_count(mbase, bchannel) \
59 musb_readl(mbase, \
60 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT))
61
58#define musb_write_hsdma_count(mbase, bchannel, len) \ 62#define musb_write_hsdma_count(mbase, bchannel, len) \
59 musb_writel(mbase, \ 63 musb_writel(mbase, \
60 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT), \ 64 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT), \
@@ -96,6 +100,19 @@ static inline void musb_write_hsdma_addr(void __iomem *mbase,
96 ((u16)(((u32) dma_addr >> 16) & 0xFFFF))); 100 ((u16)(((u32) dma_addr >> 16) & 0xFFFF)));
97} 101}
98 102
103static inline u32 musb_read_hsdma_count(void __iomem *mbase, u8 bchannel)
104{
105 u32 count = musb_readw(mbase,
106 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT_HIGH));
107
108 count = count << 16;
109
110 count |= musb_readw(mbase,
111 MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT_LOW));
112
113 return count;
114}
115
99static inline void musb_write_hsdma_count(void __iomem *mbase, 116static inline void musb_write_hsdma_count(void __iomem *mbase,
100 u8 bchannel, u32 len) 117 u8 bchannel, u32 len)
101{ 118{
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 83beeac5e7bf..3fe16867b5a8 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -220,7 +220,7 @@ int __init musb_platform_init(struct musb *musb)
220 220
221 musb_platform_resume(musb); 221 musb_platform_resume(musb);
222 222
223 l = omap_readl(OTG_SYSCONFIG); 223 l = musb_readl(musb->mregs, OTG_SYSCONFIG);
224 l &= ~ENABLEWAKEUP; /* disable wakeup */ 224 l &= ~ENABLEWAKEUP; /* disable wakeup */
225 l &= ~NOSTDBY; /* remove possible nostdby */ 225 l &= ~NOSTDBY; /* remove possible nostdby */
226 l |= SMARTSTDBY; /* enable smart standby */ 226 l |= SMARTSTDBY; /* enable smart standby */
@@ -233,17 +233,19 @@ int __init musb_platform_init(struct musb *musb)
233 */ 233 */
234 if (!cpu_is_omap3430()) 234 if (!cpu_is_omap3430())
235 l |= AUTOIDLE; /* enable auto idle */ 235 l |= AUTOIDLE; /* enable auto idle */
236 omap_writel(l, OTG_SYSCONFIG); 236 musb_writel(musb->mregs, OTG_SYSCONFIG, l);
237 237
238 l = omap_readl(OTG_INTERFSEL); 238 l = musb_readl(musb->mregs, OTG_INTERFSEL);
239 l |= ULPI_12PIN; 239 l |= ULPI_12PIN;
240 omap_writel(l, OTG_INTERFSEL); 240 musb_writel(musb->mregs, OTG_INTERFSEL, l);
241 241
242 pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, " 242 pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
243 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n", 243 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
244 omap_readl(OTG_REVISION), omap_readl(OTG_SYSCONFIG), 244 musb_readl(musb->mregs, OTG_REVISION),
245 omap_readl(OTG_SYSSTATUS), omap_readl(OTG_INTERFSEL), 245 musb_readl(musb->mregs, OTG_SYSCONFIG),
246 omap_readl(OTG_SIMENABLE)); 246 musb_readl(musb->mregs, OTG_SYSSTATUS),
247 musb_readl(musb->mregs, OTG_INTERFSEL),
248 musb_readl(musb->mregs, OTG_SIMENABLE));
247 249
248 omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1); 250 omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
249 251
@@ -255,6 +257,22 @@ int __init musb_platform_init(struct musb *musb)
255 return 0; 257 return 0;
256} 258}
257 259
260#ifdef CONFIG_PM
261void musb_platform_save_context(struct musb *musb,
262 struct musb_context_registers *musb_context)
263{
264 musb_context->otg_sysconfig = musb_readl(musb->mregs, OTG_SYSCONFIG);
265 musb_context->otg_forcestandby = musb_readl(musb->mregs, OTG_FORCESTDBY);
266}
267
268void musb_platform_restore_context(struct musb *musb,
269 struct musb_context_registers *musb_context)
270{
271 musb_writel(musb->mregs, OTG_SYSCONFIG, musb_context->otg_sysconfig);
272 musb_writel(musb->mregs, OTG_FORCESTDBY, musb_context->otg_forcestandby);
273}
274#endif
275
258int musb_platform_suspend(struct musb *musb) 276int musb_platform_suspend(struct musb *musb)
259{ 277{
260 u32 l; 278 u32 l;
@@ -263,13 +281,13 @@ int musb_platform_suspend(struct musb *musb)
263 return 0; 281 return 0;
264 282
265 /* in any role */ 283 /* in any role */
266 l = omap_readl(OTG_FORCESTDBY); 284 l = musb_readl(musb->mregs, OTG_FORCESTDBY);
267 l |= ENABLEFORCE; /* enable MSTANDBY */ 285 l |= ENABLEFORCE; /* enable MSTANDBY */
268 omap_writel(l, OTG_FORCESTDBY); 286 musb_writel(musb->mregs, OTG_FORCESTDBY, l);
269 287
270 l = omap_readl(OTG_SYSCONFIG); 288 l = musb_readl(musb->mregs, OTG_SYSCONFIG);
271 l |= ENABLEWAKEUP; /* enable wakeup */ 289 l |= ENABLEWAKEUP; /* enable wakeup */
272 omap_writel(l, OTG_SYSCONFIG); 290 musb_writel(musb->mregs, OTG_SYSCONFIG, l);
273 291
274 otg_set_suspend(musb->xceiv, 1); 292 otg_set_suspend(musb->xceiv, 1);
275 293
@@ -295,13 +313,13 @@ static int musb_platform_resume(struct musb *musb)
295 else 313 else
296 clk_enable(musb->clock); 314 clk_enable(musb->clock);
297 315
298 l = omap_readl(OTG_SYSCONFIG); 316 l = musb_readl(musb->mregs, OTG_SYSCONFIG);
299 l &= ~ENABLEWAKEUP; /* disable wakeup */ 317 l &= ~ENABLEWAKEUP; /* disable wakeup */
300 omap_writel(l, OTG_SYSCONFIG); 318 musb_writel(musb->mregs, OTG_SYSCONFIG, l);
301 319
302 l = omap_readl(OTG_FORCESTDBY); 320 l = musb_readl(musb->mregs, OTG_FORCESTDBY);
303 l &= ~ENABLEFORCE; /* disable MSTANDBY */ 321 l &= ~ENABLEFORCE; /* disable MSTANDBY */
304 omap_writel(l, OTG_FORCESTDBY); 322 musb_writel(musb->mregs, OTG_FORCESTDBY, l);
305 323
306 return 0; 324 return 0;
307} 325}
diff --git a/drivers/usb/musb/omap2430.h b/drivers/usb/musb/omap2430.h
index fbede7798aed..40b3c02ae9f0 100644
--- a/drivers/usb/musb/omap2430.h
+++ b/drivers/usb/musb/omap2430.h
@@ -10,47 +10,43 @@
10#ifndef __MUSB_OMAP243X_H__ 10#ifndef __MUSB_OMAP243X_H__
11#define __MUSB_OMAP243X_H__ 11#define __MUSB_OMAP243X_H__
12 12
13#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
14#include <mach/hardware.h>
15#include <plat/usb.h> 13#include <plat/usb.h>
16 14
17/* 15/*
18 * OMAP2430-specific definitions 16 * OMAP2430-specific definitions
19 */ 17 */
20 18
21#define MENTOR_BASE_OFFSET 0 19#define OTG_REVISION 0x400
22#if defined(CONFIG_ARCH_OMAP2430) 20
23#define OMAP_HSOTG_BASE (OMAP243X_HS_BASE) 21#define OTG_SYSCONFIG 0x404
24#elif defined(CONFIG_ARCH_OMAP3430)
25#define OMAP_HSOTG_BASE (OMAP34XX_HSUSB_OTG_BASE)
26#endif
27#define OMAP_HSOTG(offset) (OMAP_HSOTG_BASE + 0x400 + (offset))
28#define OTG_REVISION OMAP_HSOTG(0x0)
29#define OTG_SYSCONFIG OMAP_HSOTG(0x4)
30# define MIDLEMODE 12 /* bit position */ 22# define MIDLEMODE 12 /* bit position */
31# define FORCESTDBY (0 << MIDLEMODE) 23# define FORCESTDBY (0 << MIDLEMODE)
32# define NOSTDBY (1 << MIDLEMODE) 24# define NOSTDBY (1 << MIDLEMODE)
33# define SMARTSTDBY (2 << MIDLEMODE) 25# define SMARTSTDBY (2 << MIDLEMODE)
26
34# define SIDLEMODE 3 /* bit position */ 27# define SIDLEMODE 3 /* bit position */
35# define FORCEIDLE (0 << SIDLEMODE) 28# define FORCEIDLE (0 << SIDLEMODE)
36# define NOIDLE (1 << SIDLEMODE) 29# define NOIDLE (1 << SIDLEMODE)
37# define SMARTIDLE (2 << SIDLEMODE) 30# define SMARTIDLE (2 << SIDLEMODE)
31
38# define ENABLEWAKEUP (1 << 2) 32# define ENABLEWAKEUP (1 << 2)
39# define SOFTRST (1 << 1) 33# define SOFTRST (1 << 1)
40# define AUTOIDLE (1 << 0) 34# define AUTOIDLE (1 << 0)
41#define OTG_SYSSTATUS OMAP_HSOTG(0x8) 35
36#define OTG_SYSSTATUS 0x408
42# define RESETDONE (1 << 0) 37# define RESETDONE (1 << 0)
43#define OTG_INTERFSEL OMAP_HSOTG(0xc) 38
39#define OTG_INTERFSEL 0x40c
44# define EXTCP (1 << 2) 40# define EXTCP (1 << 2)
45# define PHYSEL 0 /* bit position */ 41# define PHYSEL 0 /* bit position */
46# define UTMI_8BIT (0 << PHYSEL) 42# define UTMI_8BIT (0 << PHYSEL)
47# define ULPI_12PIN (1 << PHYSEL) 43# define ULPI_12PIN (1 << PHYSEL)
48# define ULPI_8PIN (2 << PHYSEL) 44# define ULPI_8PIN (2 << PHYSEL)
49#define OTG_SIMENABLE OMAP_HSOTG(0x10) 45
46#define OTG_SIMENABLE 0x410
50# define TM1 (1 << 0) 47# define TM1 (1 << 0)
51#define OTG_FORCESTDBY OMAP_HSOTG(0x14)
52# define ENABLEFORCE (1 << 0)
53 48
54#endif /* CONFIG_ARCH_OMAP2430 */ 49#define OTG_FORCESTDBY 0x414
50# define ENABLEFORCE (1 << 0)
55 51
56#endif /* __MUSB_OMAP243X_H__ */ 52#endif /* __MUSB_OMAP243X_H__ */
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
index 88b587c703e9..ab776a8d98ca 100644
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -1118,7 +1118,7 @@ int __init musb_platform_init(struct musb *musb)
1118 } 1118 }
1119 musb->sync = mem->start; 1119 musb->sync = mem->start;
1120 1120
1121 sync = ioremap(mem->start, mem->end - mem->start + 1); 1121 sync = ioremap(mem->start, resource_size(mem));
1122 if (!sync) { 1122 if (!sync) {
1123 pr_debug("ioremap for sync failed\n"); 1123 pr_debug("ioremap for sync failed\n");
1124 ret = -ENOMEM; 1124 ret = -ENOMEM;
diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
index e13c77052e5e..1c868096bd6f 100644
--- a/drivers/usb/musb/tusb6010_omap.c
+++ b/drivers/usb/musb/tusb6010_omap.c
@@ -648,7 +648,7 @@ void dma_controller_destroy(struct dma_controller *c)
648 } 648 }
649 } 649 }
650 650
651 if (!tusb_dma->multichannel && tusb_dma && tusb_dma->ch >= 0) 651 if (tusb_dma && !tusb_dma->multichannel && tusb_dma->ch >= 0)
652 omap_free_dma(tusb_dma->ch); 652 omap_free_dma(tusb_dma->ch);
653 653
654 kfree(tusb_dma); 654 kfree(tusb_dma);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 14:47:02 -0500