aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/usb/musb
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-14 17:57:16 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-14 17:57:16 -0500
commite7cf773d431a63a2417902696fcc9e0ebdc83bbe (patch)
tree86dbdceb7d91226507a3af0d57e03b0ca664b22e /drivers/usb/musb
parent7a02d089695a1217992434f03a78aa32bad85b5c (diff)
parent81e1dadfb5b2d47aa513ad60b1c9cf0ea17b6514 (diff)
Merge tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB updates from Greg KH: "Here's the big set of USB and PHY patches for 3.19-rc1. The normal churn in the USB gadget area is in here, as well as xhci and other individual USB driver updates. The PHY tree is also in here, as there were dependancies on the USB tree. All of these have been in linux-next" * tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (351 commits) arm: omap3: twl: remove usb phy init data usbip: fix error handling in stub_probe() usb: gadget: udc: missing curly braces USB: mos7720: delete some unneeded code wusb: replace memset by memzero_explicit usbip: remove unneeded structure usb: xhci: fix comment for PORT_DEV_REMOVE xhci: don't use the same variable for stopped and halted rings current TD xhci: clear extra bits from slot context when setting max exit latency xhci: cleanup finish_td function USB: adutux: NULL dereferences on disconnect usb: chipidea: fix platform_no_drv_owner.cocci warnings usb: chipidea: Fixed a few typos in comments Documentation: bindings: add doc for the USB2 ChipIdea USB driver usb: chipidea: add a usb2 driver for ci13xxx usb: chipidea: fix phy handling usb: chipidea: remove duplicate dev_set_drvdata for host_start usb: chipidea: parameter 'mode' isn't needed for hw_device_reset usb: chipidea: add controller reset API usb: chipidea: remove flag CI_HDRC_REQUIRE_TRANSCEIVER ...
Diffstat (limited to 'drivers/usb/musb')
-rw-r--r--drivers/usb/musb/Kconfig5
-rw-r--r--drivers/usb/musb/am35x.c32
-rw-r--r--drivers/usb/musb/blackfin.c74
-rw-r--r--drivers/usb/musb/da8xx.c30
-rw-r--r--drivers/usb/musb/davinci.c22
-rw-r--r--drivers/usb/musb/jz4740.c2
-rw-r--r--drivers/usb/musb/musb_core.c335
-rw-r--r--drivers/usb/musb/musb_core.h87
-rw-r--r--drivers/usb/musb/musb_cppi41.c10
-rw-r--r--drivers/usb/musb/musb_debugfs.c57
-rw-r--r--drivers/usb/musb/musb_dsps.c37
-rw-r--r--drivers/usb/musb/musb_gadget.c58
-rw-r--r--drivers/usb/musb/musb_host.c8
-rw-r--r--drivers/usb/musb/musb_io.h106
-rw-r--r--drivers/usb/musb/musb_regs.h26
-rw-r--r--drivers/usb/musb/musb_virthub.c23
-rw-r--r--drivers/usb/musb/musbhsdma.c7
-rw-r--r--drivers/usb/musb/omap2430.c52
-rw-r--r--drivers/usb/musb/tusb6010.c102
-rw-r--r--drivers/usb/musb/ux500.c16
-rw-r--r--drivers/usb/musb/ux500_dma.c11
21 files changed, 632 insertions, 468 deletions
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 06cc5d6ea681..9d68372dd9aa 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -58,8 +58,7 @@ config USB_MUSB_DUAL_ROLE
58 58
59endchoice 59endchoice
60 60
61choice 61comment "Platform Glue Layer"
62 prompt "Platform Glue Layer"
63 62
64config USB_MUSB_DAVINCI 63config USB_MUSB_DAVINCI
65 tristate "DaVinci" 64 tristate "DaVinci"
@@ -101,8 +100,6 @@ config USB_MUSB_JZ4740
101 depends on USB_MUSB_GADGET 100 depends on USB_MUSB_GADGET
102 depends on USB_OTG_BLACKLIST_HUB 101 depends on USB_OTG_BLACKLIST_HUB
103 102
104endchoice
105
106config USB_MUSB_AM335X_CHILD 103config USB_MUSB_AM335X_CHILD
107 tristate 104 tristate
108 105
diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
index a2735df24cc6..220fd4d3b41c 100644
--- a/drivers/usb/musb/am35x.c
+++ b/drivers/usb/musb/am35x.c
@@ -149,25 +149,25 @@ static void otg_timer(unsigned long _musb)
149 */ 149 */
150 devctl = musb_readb(mregs, MUSB_DEVCTL); 150 devctl = musb_readb(mregs, MUSB_DEVCTL);
151 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 151 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
152 usb_otg_state_string(musb->xceiv->state)); 152 usb_otg_state_string(musb->xceiv->otg->state));
153 153
154 spin_lock_irqsave(&musb->lock, flags); 154 spin_lock_irqsave(&musb->lock, flags);
155 switch (musb->xceiv->state) { 155 switch (musb->xceiv->otg->state) {
156 case OTG_STATE_A_WAIT_BCON: 156 case OTG_STATE_A_WAIT_BCON:
157 devctl &= ~MUSB_DEVCTL_SESSION; 157 devctl &= ~MUSB_DEVCTL_SESSION;
158 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 158 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
159 159
160 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 160 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
161 if (devctl & MUSB_DEVCTL_BDEVICE) { 161 if (devctl & MUSB_DEVCTL_BDEVICE) {
162 musb->xceiv->state = OTG_STATE_B_IDLE; 162 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
163 MUSB_DEV_MODE(musb); 163 MUSB_DEV_MODE(musb);
164 } else { 164 } else {
165 musb->xceiv->state = OTG_STATE_A_IDLE; 165 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
166 MUSB_HST_MODE(musb); 166 MUSB_HST_MODE(musb);
167 } 167 }
168 break; 168 break;
169 case OTG_STATE_A_WAIT_VFALL: 169 case OTG_STATE_A_WAIT_VFALL:
170 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 170 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
171 musb_writel(musb->ctrl_base, CORE_INTR_SRC_SET_REG, 171 musb_writel(musb->ctrl_base, CORE_INTR_SRC_SET_REG,
172 MUSB_INTR_VBUSERROR << AM35X_INTR_USB_SHIFT); 172 MUSB_INTR_VBUSERROR << AM35X_INTR_USB_SHIFT);
173 break; 173 break;
@@ -176,7 +176,7 @@ static void otg_timer(unsigned long _musb)
176 if (devctl & MUSB_DEVCTL_BDEVICE) 176 if (devctl & MUSB_DEVCTL_BDEVICE)
177 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 177 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
178 else 178 else
179 musb->xceiv->state = OTG_STATE_A_IDLE; 179 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
180 break; 180 break;
181 default: 181 default:
182 break; 182 break;
@@ -193,9 +193,9 @@ static void am35x_musb_try_idle(struct musb *musb, unsigned long timeout)
193 193
194 /* Never idle if active, or when VBUS timeout is not set as host */ 194 /* Never idle if active, or when VBUS timeout is not set as host */
195 if (musb->is_active || (musb->a_wait_bcon == 0 && 195 if (musb->is_active || (musb->a_wait_bcon == 0 &&
196 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 196 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
197 dev_dbg(musb->controller, "%s active, deleting timer\n", 197 dev_dbg(musb->controller, "%s active, deleting timer\n",
198 usb_otg_state_string(musb->xceiv->state)); 198 usb_otg_state_string(musb->xceiv->otg->state));
199 del_timer(&otg_workaround); 199 del_timer(&otg_workaround);
200 last_timer = jiffies; 200 last_timer = jiffies;
201 return; 201 return;
@@ -208,7 +208,7 @@ static void am35x_musb_try_idle(struct musb *musb, unsigned long timeout)
208 last_timer = timeout; 208 last_timer = timeout;
209 209
210 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 210 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
211 usb_otg_state_string(musb->xceiv->state), 211 usb_otg_state_string(musb->xceiv->otg->state),
212 jiffies_to_msecs(timeout - jiffies)); 212 jiffies_to_msecs(timeout - jiffies));
213 mod_timer(&otg_workaround, timeout); 213 mod_timer(&otg_workaround, timeout);
214} 214}
@@ -278,27 +278,27 @@ static irqreturn_t am35x_musb_interrupt(int irq, void *hci)
278 * devctl. 278 * devctl.
279 */ 279 */
280 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 280 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
281 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 281 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
282 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 282 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
283 WARNING("VBUS error workaround (delay coming)\n"); 283 WARNING("VBUS error workaround (delay coming)\n");
284 } else if (drvvbus) { 284 } else if (drvvbus) {
285 MUSB_HST_MODE(musb); 285 MUSB_HST_MODE(musb);
286 otg->default_a = 1; 286 otg->default_a = 1;
287 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 287 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
288 portstate(musb->port1_status |= USB_PORT_STAT_POWER); 288 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
289 del_timer(&otg_workaround); 289 del_timer(&otg_workaround);
290 } else { 290 } else {
291 musb->is_active = 0; 291 musb->is_active = 0;
292 MUSB_DEV_MODE(musb); 292 MUSB_DEV_MODE(musb);
293 otg->default_a = 0; 293 otg->default_a = 0;
294 musb->xceiv->state = OTG_STATE_B_IDLE; 294 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
295 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); 295 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
296 } 296 }
297 297
298 /* NOTE: this must complete power-on within 100 ms. */ 298 /* NOTE: this must complete power-on within 100 ms. */
299 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 299 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
300 drvvbus ? "on" : "off", 300 drvvbus ? "on" : "off",
301 usb_otg_state_string(musb->xceiv->state), 301 usb_otg_state_string(musb->xceiv->otg->state),
302 err ? " ERROR" : "", 302 err ? " ERROR" : "",
303 devctl); 303 devctl);
304 ret = IRQ_HANDLED; 304 ret = IRQ_HANDLED;
@@ -324,7 +324,7 @@ eoi:
324 } 324 }
325 325
326 /* Poll for ID change */ 326 /* Poll for ID change */
327 if (musb->xceiv->state == OTG_STATE_B_IDLE) 327 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
328 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 328 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
329 329
330 spin_unlock_irqrestore(&musb->lock, flags); 330 spin_unlock_irqrestore(&musb->lock, flags);
@@ -408,7 +408,7 @@ static int am35x_musb_exit(struct musb *musb)
408} 408}
409 409
410/* AM35x supports only 32bit read operation */ 410/* AM35x supports only 32bit read operation */
411void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 411static void am35x_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
412{ 412{
413 void __iomem *fifo = hw_ep->fifo; 413 void __iomem *fifo = hw_ep->fifo;
414 u32 val; 414 u32 val;
@@ -438,9 +438,11 @@ void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
438} 438}
439 439
440static const struct musb_platform_ops am35x_ops = { 440static const struct musb_platform_ops am35x_ops = {
441 .quirks = MUSB_INDEXED_EP,
441 .init = am35x_musb_init, 442 .init = am35x_musb_init,
442 .exit = am35x_musb_exit, 443 .exit = am35x_musb_exit,
443 444
445 .read_fifo = am35x_read_fifo,
444 .enable = am35x_musb_enable, 446 .enable = am35x_musb_enable,
445 .disable = am35x_musb_disable, 447 .disable = am35x_musb_disable,
446 448
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
index ac4422b33dcd..a441a2de8619 100644
--- a/drivers/usb/musb/blackfin.c
+++ b/drivers/usb/musb/blackfin.c
@@ -33,10 +33,45 @@ struct bfin_glue {
33}; 33};
34#define glue_to_musb(g) platform_get_drvdata(g->musb) 34#define glue_to_musb(g) platform_get_drvdata(g->musb)
35 35
36static u32 bfin_fifo_offset(u8 epnum)
37{
38 return USB_OFFSET(USB_EP0_FIFO) + (epnum * 8);
39}
40
41static u8 bfin_readb(const void __iomem *addr, unsigned offset)
42{
43 return (u8)(bfin_read16(addr + offset));
44}
45
46static u16 bfin_readw(const void __iomem *addr, unsigned offset)
47{
48 return bfin_read16(addr + offset);
49}
50
51static u32 bfin_readl(const void __iomem *addr, unsigned offset)
52{
53 return (u32)(bfin_read16(addr + offset));
54}
55
56static void bfin_writeb(void __iomem *addr, unsigned offset, u8 data)
57{
58 bfin_write16(addr + offset, (u16)data);
59}
60
61static void bfin_writew(void __iomem *addr, unsigned offset, u16 data)
62{
63 bfin_write16(addr + offset, data);
64}
65
66static void binf_writel(void __iomem *addr, unsigned offset, u32 data)
67{
68 bfin_write16(addr + offset, (u16)data);
69}
70
36/* 71/*
37 * Load an endpoint's FIFO 72 * Load an endpoint's FIFO
38 */ 73 */
39void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src) 74static void bfin_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
40{ 75{
41 struct musb *musb = hw_ep->musb; 76 struct musb *musb = hw_ep->musb;
42 void __iomem *fifo = hw_ep->fifo; 77 void __iomem *fifo = hw_ep->fifo;
@@ -100,7 +135,7 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
100/* 135/*
101 * Unload an endpoint's FIFO 136 * Unload an endpoint's FIFO
102 */ 137 */
103void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 138static void bfin_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
104{ 139{
105 struct musb *musb = hw_ep->musb; 140 struct musb *musb = hw_ep->musb;
106 void __iomem *fifo = hw_ep->fifo; 141 void __iomem *fifo = hw_ep->fifo;
@@ -185,8 +220,8 @@ static irqreturn_t blackfin_interrupt(int irq, void *__hci)
185 } 220 }
186 221
187 /* Start sampling ID pin, when plug is removed from MUSB */ 222 /* Start sampling ID pin, when plug is removed from MUSB */
188 if ((musb->xceiv->state == OTG_STATE_B_IDLE 223 if ((musb->xceiv->otg->state == OTG_STATE_B_IDLE
189 || musb->xceiv->state == OTG_STATE_A_WAIT_BCON) || 224 || musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON) ||
190 (musb->int_usb & MUSB_INTR_DISCONNECT && is_host_active(musb))) { 225 (musb->int_usb & MUSB_INTR_DISCONNECT && is_host_active(musb))) {
191 mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY); 226 mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
192 musb->a_wait_bcon = TIMER_DELAY; 227 musb->a_wait_bcon = TIMER_DELAY;
@@ -205,7 +240,7 @@ static void musb_conn_timer_handler(unsigned long _musb)
205 static u8 toggle; 240 static u8 toggle;
206 241
207 spin_lock_irqsave(&musb->lock, flags); 242 spin_lock_irqsave(&musb->lock, flags);
208 switch (musb->xceiv->state) { 243 switch (musb->xceiv->otg->state) {
209 case OTG_STATE_A_IDLE: 244 case OTG_STATE_A_IDLE:
210 case OTG_STATE_A_WAIT_BCON: 245 case OTG_STATE_A_WAIT_BCON:
211 /* Start a new session */ 246 /* Start a new session */
@@ -219,7 +254,7 @@ static void musb_conn_timer_handler(unsigned long _musb)
219 254
220 if (!(val & MUSB_DEVCTL_BDEVICE)) { 255 if (!(val & MUSB_DEVCTL_BDEVICE)) {
221 gpio_set_value(musb->config->gpio_vrsel, 1); 256 gpio_set_value(musb->config->gpio_vrsel, 1);
222 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 257 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
223 } else { 258 } else {
224 gpio_set_value(musb->config->gpio_vrsel, 0); 259 gpio_set_value(musb->config->gpio_vrsel, 0);
225 /* Ignore VBUSERROR and SUSPEND IRQ */ 260 /* Ignore VBUSERROR and SUSPEND IRQ */
@@ -229,7 +264,7 @@ static void musb_conn_timer_handler(unsigned long _musb)
229 264
230 val = MUSB_INTR_SUSPEND | MUSB_INTR_VBUSERROR; 265 val = MUSB_INTR_SUSPEND | MUSB_INTR_VBUSERROR;
231 musb_writeb(musb->mregs, MUSB_INTRUSB, val); 266 musb_writeb(musb->mregs, MUSB_INTRUSB, val);
232 musb->xceiv->state = OTG_STATE_B_IDLE; 267 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
233 } 268 }
234 mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY); 269 mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
235 break; 270 break;
@@ -245,7 +280,7 @@ static void musb_conn_timer_handler(unsigned long _musb)
245 280
246 if (!(val & MUSB_DEVCTL_BDEVICE)) { 281 if (!(val & MUSB_DEVCTL_BDEVICE)) {
247 gpio_set_value(musb->config->gpio_vrsel, 1); 282 gpio_set_value(musb->config->gpio_vrsel, 1);
248 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 283 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
249 } else { 284 } else {
250 gpio_set_value(musb->config->gpio_vrsel, 0); 285 gpio_set_value(musb->config->gpio_vrsel, 0);
251 286
@@ -280,13 +315,13 @@ static void musb_conn_timer_handler(unsigned long _musb)
280 break; 315 break;
281 default: 316 default:
282 dev_dbg(musb->controller, "%s state not handled\n", 317 dev_dbg(musb->controller, "%s state not handled\n",
283 usb_otg_state_string(musb->xceiv->state)); 318 usb_otg_state_string(musb->xceiv->otg->state));
284 break; 319 break;
285 } 320 }
286 spin_unlock_irqrestore(&musb->lock, flags); 321 spin_unlock_irqrestore(&musb->lock, flags);
287 322
288 dev_dbg(musb->controller, "state is %s\n", 323 dev_dbg(musb->controller, "state is %s\n",
289 usb_otg_state_string(musb->xceiv->state)); 324 usb_otg_state_string(musb->xceiv->otg->state));
290} 325}
291 326
292static void bfin_musb_enable(struct musb *musb) 327static void bfin_musb_enable(struct musb *musb)
@@ -307,7 +342,7 @@ static void bfin_musb_set_vbus(struct musb *musb, int is_on)
307 342
308 dev_dbg(musb->controller, "VBUS %s, devctl %02x " 343 dev_dbg(musb->controller, "VBUS %s, devctl %02x "
309 /* otg %3x conf %08x prcm %08x */ "\n", 344 /* otg %3x conf %08x prcm %08x */ "\n",
310 usb_otg_state_string(musb->xceiv->state), 345 usb_otg_state_string(musb->xceiv->otg->state),
311 musb_readb(musb->mregs, MUSB_DEVCTL)); 346 musb_readb(musb->mregs, MUSB_DEVCTL));
312} 347}
313 348
@@ -433,6 +468,15 @@ static const struct musb_platform_ops bfin_ops = {
433 .init = bfin_musb_init, 468 .init = bfin_musb_init,
434 .exit = bfin_musb_exit, 469 .exit = bfin_musb_exit,
435 470
471 .readb = bfin_readb,
472 .writeb = bfin_writeb,
473 .readw = bfin_readw,
474 .writew = bfin_writew,
475 .readl = bfin_readl,
476 .writel = bfin_writel,
477 .fifo_mode = 2,
478 .read_fifo = bfin_read_fifo,
479 .write_fifo = bfin_write_fifo,
436 .enable = bfin_musb_enable, 480 .enable = bfin_musb_enable,
437 .disable = bfin_musb_disable, 481 .disable = bfin_musb_disable,
438 482
@@ -456,16 +500,12 @@ static int bfin_probe(struct platform_device *pdev)
456 int ret = -ENOMEM; 500 int ret = -ENOMEM;
457 501
458 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 502 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
459 if (!glue) { 503 if (!glue)
460 dev_err(&pdev->dev, "failed to allocate glue context\n");
461 goto err0; 504 goto err0;
462 }
463 505
464 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 506 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
465 if (!musb) { 507 if (!musb)
466 dev_err(&pdev->dev, "failed to allocate musb device\n");
467 goto err0; 508 goto err0;
468 }
469 509
470 musb->dev.parent = &pdev->dev; 510 musb->dev.parent = &pdev->dev;
471 musb->dev.dma_mask = &bfin_dmamask; 511 musb->dev.dma_mask = &bfin_dmamask;
diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
index 058775e647ad..9a9c82a4d35d 100644
--- a/drivers/usb/musb/da8xx.c
+++ b/drivers/usb/musb/da8xx.c
@@ -198,20 +198,20 @@ static void otg_timer(unsigned long _musb)
198 */ 198 */
199 devctl = musb_readb(mregs, MUSB_DEVCTL); 199 devctl = musb_readb(mregs, MUSB_DEVCTL);
200 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 200 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
201 usb_otg_state_string(musb->xceiv->state)); 201 usb_otg_state_string(musb->xceiv->otg->state));
202 202
203 spin_lock_irqsave(&musb->lock, flags); 203 spin_lock_irqsave(&musb->lock, flags);
204 switch (musb->xceiv->state) { 204 switch (musb->xceiv->otg->state) {
205 case OTG_STATE_A_WAIT_BCON: 205 case OTG_STATE_A_WAIT_BCON:
206 devctl &= ~MUSB_DEVCTL_SESSION; 206 devctl &= ~MUSB_DEVCTL_SESSION;
207 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 207 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
208 208
209 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 209 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
210 if (devctl & MUSB_DEVCTL_BDEVICE) { 210 if (devctl & MUSB_DEVCTL_BDEVICE) {
211 musb->xceiv->state = OTG_STATE_B_IDLE; 211 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
212 MUSB_DEV_MODE(musb); 212 MUSB_DEV_MODE(musb);
213 } else { 213 } else {
214 musb->xceiv->state = OTG_STATE_A_IDLE; 214 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
215 MUSB_HST_MODE(musb); 215 MUSB_HST_MODE(musb);
216 } 216 }
217 break; 217 break;
@@ -226,7 +226,7 @@ static void otg_timer(unsigned long _musb)
226 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 226 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
227 break; 227 break;
228 } 228 }
229 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 229 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
230 musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG, 230 musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG,
231 MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT); 231 MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
232 break; 232 break;
@@ -248,7 +248,7 @@ static void otg_timer(unsigned long _musb)
248 if (devctl & MUSB_DEVCTL_BDEVICE) 248 if (devctl & MUSB_DEVCTL_BDEVICE)
249 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 249 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
250 else 250 else
251 musb->xceiv->state = OTG_STATE_A_IDLE; 251 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
252 break; 252 break;
253 default: 253 default:
254 break; 254 break;
@@ -265,9 +265,9 @@ static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
265 265
266 /* Never idle if active, or when VBUS timeout is not set as host */ 266 /* Never idle if active, or when VBUS timeout is not set as host */
267 if (musb->is_active || (musb->a_wait_bcon == 0 && 267 if (musb->is_active || (musb->a_wait_bcon == 0 &&
268 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 268 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
269 dev_dbg(musb->controller, "%s active, deleting timer\n", 269 dev_dbg(musb->controller, "%s active, deleting timer\n",
270 usb_otg_state_string(musb->xceiv->state)); 270 usb_otg_state_string(musb->xceiv->otg->state));
271 del_timer(&otg_workaround); 271 del_timer(&otg_workaround);
272 last_timer = jiffies; 272 last_timer = jiffies;
273 return; 273 return;
@@ -280,7 +280,7 @@ static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
280 last_timer = timeout; 280 last_timer = timeout;
281 281
282 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 282 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
283 usb_otg_state_string(musb->xceiv->state), 283 usb_otg_state_string(musb->xceiv->otg->state),
284 jiffies_to_msecs(timeout - jiffies)); 284 jiffies_to_msecs(timeout - jiffies));
285 mod_timer(&otg_workaround, timeout); 285 mod_timer(&otg_workaround, timeout);
286} 286}
@@ -341,26 +341,26 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
341 * devctl. 341 * devctl.
342 */ 342 */
343 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 343 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
344 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 344 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
345 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 345 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
346 WARNING("VBUS error workaround (delay coming)\n"); 346 WARNING("VBUS error workaround (delay coming)\n");
347 } else if (drvvbus) { 347 } else if (drvvbus) {
348 MUSB_HST_MODE(musb); 348 MUSB_HST_MODE(musb);
349 otg->default_a = 1; 349 otg->default_a = 1;
350 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 350 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
351 portstate(musb->port1_status |= USB_PORT_STAT_POWER); 351 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
352 del_timer(&otg_workaround); 352 del_timer(&otg_workaround);
353 } else { 353 } else {
354 musb->is_active = 0; 354 musb->is_active = 0;
355 MUSB_DEV_MODE(musb); 355 MUSB_DEV_MODE(musb);
356 otg->default_a = 0; 356 otg->default_a = 0;
357 musb->xceiv->state = OTG_STATE_B_IDLE; 357 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
358 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); 358 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
359 } 359 }
360 360
361 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 361 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
362 drvvbus ? "on" : "off", 362 drvvbus ? "on" : "off",
363 usb_otg_state_string(musb->xceiv->state), 363 usb_otg_state_string(musb->xceiv->otg->state),
364 err ? " ERROR" : "", 364 err ? " ERROR" : "",
365 devctl); 365 devctl);
366 ret = IRQ_HANDLED; 366 ret = IRQ_HANDLED;
@@ -375,7 +375,7 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
375 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); 375 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
376 376
377 /* Poll for ID change */ 377 /* Poll for ID change */
378 if (musb->xceiv->state == OTG_STATE_B_IDLE) 378 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
379 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 379 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
380 380
381 spin_unlock_irqrestore(&musb->lock, flags); 381 spin_unlock_irqrestore(&musb->lock, flags);
@@ -458,9 +458,11 @@ static int da8xx_musb_exit(struct musb *musb)
458} 458}
459 459
460static const struct musb_platform_ops da8xx_ops = { 460static const struct musb_platform_ops da8xx_ops = {
461 .quirks = MUSB_INDEXED_EP,
461 .init = da8xx_musb_init, 462 .init = da8xx_musb_init,
462 .exit = da8xx_musb_exit, 463 .exit = da8xx_musb_exit,
463 464
465 .fifo_mode = 2,
464 .enable = da8xx_musb_enable, 466 .enable = da8xx_musb_enable,
465 .disable = da8xx_musb_disable, 467 .disable = da8xx_musb_disable,
466 468
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index 110b78415bf0..3c1d9b211b51 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -214,10 +214,10 @@ static void otg_timer(unsigned long _musb)
214 */ 214 */
215 devctl = musb_readb(mregs, MUSB_DEVCTL); 215 devctl = musb_readb(mregs, MUSB_DEVCTL);
216 dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl, 216 dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
217 usb_otg_state_string(musb->xceiv->state)); 217 usb_otg_state_string(musb->xceiv->otg->state));
218 218
219 spin_lock_irqsave(&musb->lock, flags); 219 spin_lock_irqsave(&musb->lock, flags);
220 switch (musb->xceiv->state) { 220 switch (musb->xceiv->otg->state) {
221 case OTG_STATE_A_WAIT_VFALL: 221 case OTG_STATE_A_WAIT_VFALL:
222 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL 222 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
223 * seems to mis-handle session "start" otherwise (or in our 223 * seems to mis-handle session "start" otherwise (or in our
@@ -228,7 +228,7 @@ static void otg_timer(unsigned long _musb)
228 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 228 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
229 break; 229 break;
230 } 230 }
231 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 231 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
232 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, 232 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
233 MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT); 233 MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
234 break; 234 break;
@@ -251,7 +251,7 @@ static void otg_timer(unsigned long _musb)
251 if (devctl & MUSB_DEVCTL_BDEVICE) 251 if (devctl & MUSB_DEVCTL_BDEVICE)
252 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 252 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
253 else 253 else
254 musb->xceiv->state = OTG_STATE_A_IDLE; 254 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
255 break; 255 break;
256 default: 256 default:
257 break; 257 break;
@@ -325,20 +325,20 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
325 * to stop registering in devctl. 325 * to stop registering in devctl.
326 */ 326 */
327 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 327 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
328 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 328 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
329 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 329 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
330 WARNING("VBUS error workaround (delay coming)\n"); 330 WARNING("VBUS error workaround (delay coming)\n");
331 } else if (drvvbus) { 331 } else if (drvvbus) {
332 MUSB_HST_MODE(musb); 332 MUSB_HST_MODE(musb);
333 otg->default_a = 1; 333 otg->default_a = 1;
334 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 334 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
335 portstate(musb->port1_status |= USB_PORT_STAT_POWER); 335 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
336 del_timer(&otg_workaround); 336 del_timer(&otg_workaround);
337 } else { 337 } else {
338 musb->is_active = 0; 338 musb->is_active = 0;
339 MUSB_DEV_MODE(musb); 339 MUSB_DEV_MODE(musb);
340 otg->default_a = 0; 340 otg->default_a = 0;
341 musb->xceiv->state = OTG_STATE_B_IDLE; 341 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
342 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); 342 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
343 } 343 }
344 344
@@ -348,7 +348,7 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
348 davinci_musb_source_power(musb, drvvbus, 0); 348 davinci_musb_source_power(musb, drvvbus, 0);
349 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 349 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
350 drvvbus ? "on" : "off", 350 drvvbus ? "on" : "off",
351 usb_otg_state_string(musb->xceiv->state), 351 usb_otg_state_string(musb->xceiv->otg->state),
352 err ? " ERROR" : "", 352 err ? " ERROR" : "",
353 devctl); 353 devctl);
354 retval = IRQ_HANDLED; 354 retval = IRQ_HANDLED;
@@ -361,7 +361,7 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
361 musb_writel(tibase, DAVINCI_USB_EOI_REG, 0); 361 musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
362 362
363 /* poll for ID change */ 363 /* poll for ID change */
364 if (musb->xceiv->state == OTG_STATE_B_IDLE) 364 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
365 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 365 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
366 366
367 spin_unlock_irqrestore(&musb->lock, flags); 367 spin_unlock_irqrestore(&musb->lock, flags);
@@ -520,10 +520,8 @@ static int davinci_probe(struct platform_device *pdev)
520 int ret = -ENOMEM; 520 int ret = -ENOMEM;
521 521
522 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 522 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
523 if (!glue) { 523 if (!glue)
524 dev_err(&pdev->dev, "failed to allocate glue context\n");
525 goto err0; 524 goto err0;
526 }
527 525
528 clk = devm_clk_get(&pdev->dev, "usb"); 526 clk = devm_clk_get(&pdev->dev, "usb");
529 if (IS_ERR(clk)) { 527 if (IS_ERR(clk)) {
diff --git a/drivers/usb/musb/jz4740.c b/drivers/usb/musb/jz4740.c
index d1187290d4e3..bb7b26325a74 100644
--- a/drivers/usb/musb/jz4740.c
+++ b/drivers/usb/musb/jz4740.c
@@ -106,6 +106,8 @@ static int jz4740_musb_exit(struct musb *musb)
106} 106}
107 107
108static const struct musb_platform_ops jz4740_musb_ops = { 108static const struct musb_platform_ops jz4740_musb_ops = {
109 .quirks = MUSB_INDEXED_EP,
110 .fifo_mode = 2,
109 .init = jz4740_musb_init, 111 .init = jz4740_musb_init,
110 .exit = jz4740_musb_exit, 112 .exit = jz4740_musb_exit,
111}; 113};
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index b841ee0bff06..55fe0ff6fd87 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -224,12 +224,67 @@ static struct usb_phy_io_ops musb_ulpi_access = {
224 224
225/*-------------------------------------------------------------------------*/ 225/*-------------------------------------------------------------------------*/
226 226
227#if !defined(CONFIG_USB_MUSB_TUSB6010) && !defined(CONFIG_USB_MUSB_BLACKFIN) 227static u32 musb_default_fifo_offset(u8 epnum)
228{
229 return 0x20 + (epnum * 4);
230}
231
232/* "flat" mapping: each endpoint has its own i/o address */
233static void musb_flat_ep_select(void __iomem *mbase, u8 epnum)
234{
235}
236
237static u32 musb_flat_ep_offset(u8 epnum, u16 offset)
238{
239 return 0x100 + (0x10 * epnum) + offset;
240}
241
242/* "indexed" mapping: INDEX register controls register bank select */
243static void musb_indexed_ep_select(void __iomem *mbase, u8 epnum)
244{
245 musb_writeb(mbase, MUSB_INDEX, epnum);
246}
247
248static u32 musb_indexed_ep_offset(u8 epnum, u16 offset)
249{
250 return 0x10 + offset;
251}
252
253static u8 musb_default_readb(const void __iomem *addr, unsigned offset)
254{
255 return __raw_readb(addr + offset);
256}
257
258static void musb_default_writeb(void __iomem *addr, unsigned offset, u8 data)
259{
260 __raw_writeb(data, addr + offset);
261}
262
263static u16 musb_default_readw(const void __iomem *addr, unsigned offset)
264{
265 return __raw_readw(addr + offset);
266}
267
268static void musb_default_writew(void __iomem *addr, unsigned offset, u16 data)
269{
270 __raw_writew(data, addr + offset);
271}
272
273static u32 musb_default_readl(const void __iomem *addr, unsigned offset)
274{
275 return __raw_readl(addr + offset);
276}
277
278static void musb_default_writel(void __iomem *addr, unsigned offset, u32 data)
279{
280 __raw_writel(data, addr + offset);
281}
228 282
229/* 283/*
230 * Load an endpoint's FIFO 284 * Load an endpoint's FIFO
231 */ 285 */
232void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src) 286static void musb_default_write_fifo(struct musb_hw_ep *hw_ep, u16 len,
287 const u8 *src)
233{ 288{
234 struct musb *musb = hw_ep->musb; 289 struct musb *musb = hw_ep->musb;
235 void __iomem *fifo = hw_ep->fifo; 290 void __iomem *fifo = hw_ep->fifo;
@@ -270,11 +325,10 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
270 } 325 }
271} 326}
272 327
273#if !defined(CONFIG_USB_MUSB_AM35X)
274/* 328/*
275 * Unload an endpoint's FIFO 329 * Unload an endpoint's FIFO
276 */ 330 */
277void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 331static void musb_default_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
278{ 332{
279 struct musb *musb = hw_ep->musb; 333 struct musb *musb = hw_ep->musb;
280 void __iomem *fifo = hw_ep->fifo; 334 void __iomem *fifo = hw_ep->fifo;
@@ -312,10 +366,40 @@ void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
312 ioread8_rep(fifo, dst, len); 366 ioread8_rep(fifo, dst, len);
313 } 367 }
314} 368}
315#endif
316 369
317#endif /* normal PIO */ 370/*
371 * Old style IO functions
372 */
373u8 (*musb_readb)(const void __iomem *addr, unsigned offset);
374EXPORT_SYMBOL_GPL(musb_readb);
375
376void (*musb_writeb)(void __iomem *addr, unsigned offset, u8 data);
377EXPORT_SYMBOL_GPL(musb_writeb);
378
379u16 (*musb_readw)(const void __iomem *addr, unsigned offset);
380EXPORT_SYMBOL_GPL(musb_readw);
381
382void (*musb_writew)(void __iomem *addr, unsigned offset, u16 data);
383EXPORT_SYMBOL_GPL(musb_writew);
384
385u32 (*musb_readl)(const void __iomem *addr, unsigned offset);
386EXPORT_SYMBOL_GPL(musb_readl);
318 387
388void (*musb_writel)(void __iomem *addr, unsigned offset, u32 data);
389EXPORT_SYMBOL_GPL(musb_writel);
390
391/*
392 * New style IO functions
393 */
394void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
395{
396 return hw_ep->musb->io.read_fifo(hw_ep, len, dst);
397}
398
399void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
400{
401 return hw_ep->musb->io.write_fifo(hw_ep, len, src);
402}
319 403
320/*-------------------------------------------------------------------------*/ 404/*-------------------------------------------------------------------------*/
321 405
@@ -360,23 +444,23 @@ static void musb_otg_timer_func(unsigned long data)
360 unsigned long flags; 444 unsigned long flags;
361 445
362 spin_lock_irqsave(&musb->lock, flags); 446 spin_lock_irqsave(&musb->lock, flags);
363 switch (musb->xceiv->state) { 447 switch (musb->xceiv->otg->state) {
364 case OTG_STATE_B_WAIT_ACON: 448 case OTG_STATE_B_WAIT_ACON:
365 dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n"); 449 dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n");
366 musb_g_disconnect(musb); 450 musb_g_disconnect(musb);
367 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 451 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
368 musb->is_active = 0; 452 musb->is_active = 0;
369 break; 453 break;
370 case OTG_STATE_A_SUSPEND: 454 case OTG_STATE_A_SUSPEND:
371 case OTG_STATE_A_WAIT_BCON: 455 case OTG_STATE_A_WAIT_BCON:
372 dev_dbg(musb->controller, "HNP: %s timeout\n", 456 dev_dbg(musb->controller, "HNP: %s timeout\n",
373 usb_otg_state_string(musb->xceiv->state)); 457 usb_otg_state_string(musb->xceiv->otg->state));
374 musb_platform_set_vbus(musb, 0); 458 musb_platform_set_vbus(musb, 0);
375 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 459 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
376 break; 460 break;
377 default: 461 default:
378 dev_dbg(musb->controller, "HNP: Unhandled mode %s\n", 462 dev_dbg(musb->controller, "HNP: Unhandled mode %s\n",
379 usb_otg_state_string(musb->xceiv->state)); 463 usb_otg_state_string(musb->xceiv->otg->state));
380 } 464 }
381 spin_unlock_irqrestore(&musb->lock, flags); 465 spin_unlock_irqrestore(&musb->lock, flags);
382} 466}
@@ -391,19 +475,19 @@ void musb_hnp_stop(struct musb *musb)
391 u8 reg; 475 u8 reg;
392 476
393 dev_dbg(musb->controller, "HNP: stop from %s\n", 477 dev_dbg(musb->controller, "HNP: stop from %s\n",
394 usb_otg_state_string(musb->xceiv->state)); 478 usb_otg_state_string(musb->xceiv->otg->state));
395 479
396 switch (musb->xceiv->state) { 480 switch (musb->xceiv->otg->state) {
397 case OTG_STATE_A_PERIPHERAL: 481 case OTG_STATE_A_PERIPHERAL:
398 musb_g_disconnect(musb); 482 musb_g_disconnect(musb);
399 dev_dbg(musb->controller, "HNP: back to %s\n", 483 dev_dbg(musb->controller, "HNP: back to %s\n",
400 usb_otg_state_string(musb->xceiv->state)); 484 usb_otg_state_string(musb->xceiv->otg->state));
401 break; 485 break;
402 case OTG_STATE_B_HOST: 486 case OTG_STATE_B_HOST:
403 dev_dbg(musb->controller, "HNP: Disabling HR\n"); 487 dev_dbg(musb->controller, "HNP: Disabling HR\n");
404 if (hcd) 488 if (hcd)
405 hcd->self.is_b_host = 0; 489 hcd->self.is_b_host = 0;
406 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 490 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
407 MUSB_DEV_MODE(musb); 491 MUSB_DEV_MODE(musb);
408 reg = musb_readb(mbase, MUSB_POWER); 492 reg = musb_readb(mbase, MUSB_POWER);
409 reg |= MUSB_POWER_SUSPENDM; 493 reg |= MUSB_POWER_SUSPENDM;
@@ -412,7 +496,7 @@ void musb_hnp_stop(struct musb *musb)
412 break; 496 break;
413 default: 497 default:
414 dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n", 498 dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n",
415 usb_otg_state_string(musb->xceiv->state)); 499 usb_otg_state_string(musb->xceiv->otg->state));
416 } 500 }
417 501
418 /* 502 /*
@@ -423,6 +507,7 @@ void musb_hnp_stop(struct musb *musb)
423 musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16); 507 musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16);
424} 508}
425 509
510static void musb_generic_disable(struct musb *musb);
426/* 511/*
427 * Interrupt Service Routine to record USB "global" interrupts. 512 * Interrupt Service Routine to record USB "global" interrupts.
428 * Since these do not happen often and signify things of 513 * Since these do not happen often and signify things of
@@ -449,13 +534,13 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
449 */ 534 */
450 if (int_usb & MUSB_INTR_RESUME) { 535 if (int_usb & MUSB_INTR_RESUME) {
451 handled = IRQ_HANDLED; 536 handled = IRQ_HANDLED;
452 dev_dbg(musb->controller, "RESUME (%s)\n", usb_otg_state_string(musb->xceiv->state)); 537 dev_dbg(musb->controller, "RESUME (%s)\n", usb_otg_state_string(musb->xceiv->otg->state));
453 538
454 if (devctl & MUSB_DEVCTL_HM) { 539 if (devctl & MUSB_DEVCTL_HM) {
455 void __iomem *mbase = musb->mregs; 540 void __iomem *mbase = musb->mregs;
456 u8 power; 541 u8 power;
457 542
458 switch (musb->xceiv->state) { 543 switch (musb->xceiv->otg->state) {
459 case OTG_STATE_A_SUSPEND: 544 case OTG_STATE_A_SUSPEND:
460 /* remote wakeup? later, GetPortStatus 545 /* remote wakeup? later, GetPortStatus
461 * will stop RESUME signaling 546 * will stop RESUME signaling
@@ -478,29 +563,26 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
478 | MUSB_PORT_STAT_RESUME; 563 | MUSB_PORT_STAT_RESUME;
479 musb->rh_timer = jiffies 564 musb->rh_timer = jiffies
480 + msecs_to_jiffies(20); 565 + msecs_to_jiffies(20);
481 schedule_delayed_work( 566 musb->need_finish_resume = 1;
482 &musb->finish_resume_work,
483 msecs_to_jiffies(20));
484 567
485 musb->xceiv->state = OTG_STATE_A_HOST; 568 musb->xceiv->otg->state = OTG_STATE_A_HOST;
486 musb->is_active = 1; 569 musb->is_active = 1;
487 musb_host_resume_root_hub(musb);
488 break; 570 break;
489 case OTG_STATE_B_WAIT_ACON: 571 case OTG_STATE_B_WAIT_ACON:
490 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 572 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
491 musb->is_active = 1; 573 musb->is_active = 1;
492 MUSB_DEV_MODE(musb); 574 MUSB_DEV_MODE(musb);
493 break; 575 break;
494 default: 576 default:
495 WARNING("bogus %s RESUME (%s)\n", 577 WARNING("bogus %s RESUME (%s)\n",
496 "host", 578 "host",
497 usb_otg_state_string(musb->xceiv->state)); 579 usb_otg_state_string(musb->xceiv->otg->state));
498 } 580 }
499 } else { 581 } else {
500 switch (musb->xceiv->state) { 582 switch (musb->xceiv->otg->state) {
501 case OTG_STATE_A_SUSPEND: 583 case OTG_STATE_A_SUSPEND:
502 /* possibly DISCONNECT is upcoming */ 584 /* possibly DISCONNECT is upcoming */
503 musb->xceiv->state = OTG_STATE_A_HOST; 585 musb->xceiv->otg->state = OTG_STATE_A_HOST;
504 musb_host_resume_root_hub(musb); 586 musb_host_resume_root_hub(musb);
505 break; 587 break;
506 case OTG_STATE_B_WAIT_ACON: 588 case OTG_STATE_B_WAIT_ACON:
@@ -523,7 +605,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
523 default: 605 default:
524 WARNING("bogus %s RESUME (%s)\n", 606 WARNING("bogus %s RESUME (%s)\n",
525 "peripheral", 607 "peripheral",
526 usb_otg_state_string(musb->xceiv->state)); 608 usb_otg_state_string(musb->xceiv->otg->state));
527 } 609 }
528 } 610 }
529 } 611 }
@@ -539,7 +621,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
539 } 621 }
540 622
541 dev_dbg(musb->controller, "SESSION_REQUEST (%s)\n", 623 dev_dbg(musb->controller, "SESSION_REQUEST (%s)\n",
542 usb_otg_state_string(musb->xceiv->state)); 624 usb_otg_state_string(musb->xceiv->otg->state));
543 625
544 /* IRQ arrives from ID pin sense or (later, if VBUS power 626 /* IRQ arrives from ID pin sense or (later, if VBUS power
545 * is removed) SRP. responses are time critical: 627 * is removed) SRP. responses are time critical:
@@ -550,7 +632,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
550 */ 632 */
551 musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 633 musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
552 musb->ep0_stage = MUSB_EP0_START; 634 musb->ep0_stage = MUSB_EP0_START;
553 musb->xceiv->state = OTG_STATE_A_IDLE; 635 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
554 MUSB_HST_MODE(musb); 636 MUSB_HST_MODE(musb);
555 musb_platform_set_vbus(musb, 1); 637 musb_platform_set_vbus(musb, 1);
556 638
@@ -576,7 +658,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
576 * REVISIT: do delays from lots of DEBUG_KERNEL checks 658 * REVISIT: do delays from lots of DEBUG_KERNEL checks
577 * make trouble here, keeping VBUS < 4.4V ? 659 * make trouble here, keeping VBUS < 4.4V ?
578 */ 660 */
579 switch (musb->xceiv->state) { 661 switch (musb->xceiv->otg->state) {
580 case OTG_STATE_A_HOST: 662 case OTG_STATE_A_HOST:
581 /* recovery is dicey once we've gotten past the 663 /* recovery is dicey once we've gotten past the
582 * initial stages of enumeration, but if VBUS 664 * initial stages of enumeration, but if VBUS
@@ -605,7 +687,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
605 687
606 dev_printk(ignore ? KERN_DEBUG : KERN_ERR, musb->controller, 688 dev_printk(ignore ? KERN_DEBUG : KERN_ERR, musb->controller,
607 "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n", 689 "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n",
608 usb_otg_state_string(musb->xceiv->state), 690 usb_otg_state_string(musb->xceiv->otg->state),
609 devctl, 691 devctl,
610 ({ char *s; 692 ({ char *s;
611 switch (devctl & MUSB_DEVCTL_VBUS) { 693 switch (devctl & MUSB_DEVCTL_VBUS) {
@@ -630,10 +712,10 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
630 712
631 if (int_usb & MUSB_INTR_SUSPEND) { 713 if (int_usb & MUSB_INTR_SUSPEND) {
632 dev_dbg(musb->controller, "SUSPEND (%s) devctl %02x\n", 714 dev_dbg(musb->controller, "SUSPEND (%s) devctl %02x\n",
633 usb_otg_state_string(musb->xceiv->state), devctl); 715 usb_otg_state_string(musb->xceiv->otg->state), devctl);
634 handled = IRQ_HANDLED; 716 handled = IRQ_HANDLED;
635 717
636 switch (musb->xceiv->state) { 718 switch (musb->xceiv->otg->state) {
637 case OTG_STATE_A_PERIPHERAL: 719 case OTG_STATE_A_PERIPHERAL:
638 /* We also come here if the cable is removed, since 720 /* We also come here if the cable is removed, since
639 * this silicon doesn't report ID-no-longer-grounded. 721 * this silicon doesn't report ID-no-longer-grounded.
@@ -657,7 +739,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
657 musb_g_suspend(musb); 739 musb_g_suspend(musb);
658 musb->is_active = musb->g.b_hnp_enable; 740 musb->is_active = musb->g.b_hnp_enable;
659 if (musb->is_active) { 741 if (musb->is_active) {
660 musb->xceiv->state = OTG_STATE_B_WAIT_ACON; 742 musb->xceiv->otg->state = OTG_STATE_B_WAIT_ACON;
661 dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n"); 743 dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n");
662 mod_timer(&musb->otg_timer, jiffies 744 mod_timer(&musb->otg_timer, jiffies
663 + msecs_to_jiffies( 745 + msecs_to_jiffies(
@@ -670,7 +752,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
670 + msecs_to_jiffies(musb->a_wait_bcon)); 752 + msecs_to_jiffies(musb->a_wait_bcon));
671 break; 753 break;
672 case OTG_STATE_A_HOST: 754 case OTG_STATE_A_HOST:
673 musb->xceiv->state = OTG_STATE_A_SUSPEND; 755 musb->xceiv->otg->state = OTG_STATE_A_SUSPEND;
674 musb->is_active = musb->hcd->self.b_hnp_enable; 756 musb->is_active = musb->hcd->self.b_hnp_enable;
675 break; 757 break;
676 case OTG_STATE_B_HOST: 758 case OTG_STATE_B_HOST:
@@ -713,7 +795,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
713 musb->port1_status |= USB_PORT_STAT_LOW_SPEED; 795 musb->port1_status |= USB_PORT_STAT_LOW_SPEED;
714 796
715 /* indicate new connection to OTG machine */ 797 /* indicate new connection to OTG machine */
716 switch (musb->xceiv->state) { 798 switch (musb->xceiv->otg->state) {
717 case OTG_STATE_B_PERIPHERAL: 799 case OTG_STATE_B_PERIPHERAL:
718 if (int_usb & MUSB_INTR_SUSPEND) { 800 if (int_usb & MUSB_INTR_SUSPEND) {
719 dev_dbg(musb->controller, "HNP: SUSPEND+CONNECT, now b_host\n"); 801 dev_dbg(musb->controller, "HNP: SUSPEND+CONNECT, now b_host\n");
@@ -725,7 +807,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
725 case OTG_STATE_B_WAIT_ACON: 807 case OTG_STATE_B_WAIT_ACON:
726 dev_dbg(musb->controller, "HNP: CONNECT, now b_host\n"); 808 dev_dbg(musb->controller, "HNP: CONNECT, now b_host\n");
727b_host: 809b_host:
728 musb->xceiv->state = OTG_STATE_B_HOST; 810 musb->xceiv->otg->state = OTG_STATE_B_HOST;
729 if (musb->hcd) 811 if (musb->hcd)
730 musb->hcd->self.is_b_host = 1; 812 musb->hcd->self.is_b_host = 1;
731 del_timer(&musb->otg_timer); 813 del_timer(&musb->otg_timer);
@@ -733,7 +815,7 @@ b_host:
733 default: 815 default:
734 if ((devctl & MUSB_DEVCTL_VBUS) 816 if ((devctl & MUSB_DEVCTL_VBUS)
735 == (3 << MUSB_DEVCTL_VBUS_SHIFT)) { 817 == (3 << MUSB_DEVCTL_VBUS_SHIFT)) {
736 musb->xceiv->state = OTG_STATE_A_HOST; 818 musb->xceiv->otg->state = OTG_STATE_A_HOST;
737 if (hcd) 819 if (hcd)
738 hcd->self.is_b_host = 0; 820 hcd->self.is_b_host = 0;
739 } 821 }
@@ -743,16 +825,16 @@ b_host:
743 musb_host_poke_root_hub(musb); 825 musb_host_poke_root_hub(musb);
744 826
745 dev_dbg(musb->controller, "CONNECT (%s) devctl %02x\n", 827 dev_dbg(musb->controller, "CONNECT (%s) devctl %02x\n",
746 usb_otg_state_string(musb->xceiv->state), devctl); 828 usb_otg_state_string(musb->xceiv->otg->state), devctl);
747 } 829 }
748 830
749 if (int_usb & MUSB_INTR_DISCONNECT) { 831 if (int_usb & MUSB_INTR_DISCONNECT) {
750 dev_dbg(musb->controller, "DISCONNECT (%s) as %s, devctl %02x\n", 832 dev_dbg(musb->controller, "DISCONNECT (%s) as %s, devctl %02x\n",
751 usb_otg_state_string(musb->xceiv->state), 833 usb_otg_state_string(musb->xceiv->otg->state),
752 MUSB_MODE(musb), devctl); 834 MUSB_MODE(musb), devctl);
753 handled = IRQ_HANDLED; 835 handled = IRQ_HANDLED;
754 836
755 switch (musb->xceiv->state) { 837 switch (musb->xceiv->otg->state) {
756 case OTG_STATE_A_HOST: 838 case OTG_STATE_A_HOST:
757 case OTG_STATE_A_SUSPEND: 839 case OTG_STATE_A_SUSPEND:
758 musb_host_resume_root_hub(musb); 840 musb_host_resume_root_hub(musb);
@@ -770,7 +852,7 @@ b_host:
770 musb_root_disconnect(musb); 852 musb_root_disconnect(musb);
771 if (musb->hcd) 853 if (musb->hcd)
772 musb->hcd->self.is_b_host = 0; 854 musb->hcd->self.is_b_host = 0;
773 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 855 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
774 MUSB_DEV_MODE(musb); 856 MUSB_DEV_MODE(musb);
775 musb_g_disconnect(musb); 857 musb_g_disconnect(musb);
776 break; 858 break;
@@ -786,7 +868,7 @@ b_host:
786 break; 868 break;
787 default: 869 default:
788 WARNING("unhandled DISCONNECT transition (%s)\n", 870 WARNING("unhandled DISCONNECT transition (%s)\n",
789 usb_otg_state_string(musb->xceiv->state)); 871 usb_otg_state_string(musb->xceiv->otg->state));
790 break; 872 break;
791 } 873 }
792 } 874 }
@@ -812,15 +894,15 @@ b_host:
812 } 894 }
813 } else { 895 } else {
814 dev_dbg(musb->controller, "BUS RESET as %s\n", 896 dev_dbg(musb->controller, "BUS RESET as %s\n",
815 usb_otg_state_string(musb->xceiv->state)); 897 usb_otg_state_string(musb->xceiv->otg->state));
816 switch (musb->xceiv->state) { 898 switch (musb->xceiv->otg->state) {
817 case OTG_STATE_A_SUSPEND: 899 case OTG_STATE_A_SUSPEND:
818 musb_g_reset(musb); 900 musb_g_reset(musb);
819 /* FALLTHROUGH */ 901 /* FALLTHROUGH */
820 case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */ 902 case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */
821 /* never use invalid T(a_wait_bcon) */ 903 /* never use invalid T(a_wait_bcon) */
822 dev_dbg(musb->controller, "HNP: in %s, %d msec timeout\n", 904 dev_dbg(musb->controller, "HNP: in %s, %d msec timeout\n",
823 usb_otg_state_string(musb->xceiv->state), 905 usb_otg_state_string(musb->xceiv->otg->state),
824 TA_WAIT_BCON(musb)); 906 TA_WAIT_BCON(musb));
825 mod_timer(&musb->otg_timer, jiffies 907 mod_timer(&musb->otg_timer, jiffies
826 + msecs_to_jiffies(TA_WAIT_BCON(musb))); 908 + msecs_to_jiffies(TA_WAIT_BCON(musb)));
@@ -831,27 +913,29 @@ b_host:
831 break; 913 break;
832 case OTG_STATE_B_WAIT_ACON: 914 case OTG_STATE_B_WAIT_ACON:
833 dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n", 915 dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n",
834 usb_otg_state_string(musb->xceiv->state)); 916 usb_otg_state_string(musb->xceiv->otg->state));
835 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 917 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
836 musb_g_reset(musb); 918 musb_g_reset(musb);
837 break; 919 break;
838 case OTG_STATE_B_IDLE: 920 case OTG_STATE_B_IDLE:
839 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 921 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
840 /* FALLTHROUGH */ 922 /* FALLTHROUGH */
841 case OTG_STATE_B_PERIPHERAL: 923 case OTG_STATE_B_PERIPHERAL:
842 musb_g_reset(musb); 924 musb_g_reset(musb);
843 break; 925 break;
844 default: 926 default:
845 dev_dbg(musb->controller, "Unhandled BUS RESET as %s\n", 927 dev_dbg(musb->controller, "Unhandled BUS RESET as %s\n",
846 usb_otg_state_string(musb->xceiv->state)); 928 usb_otg_state_string(musb->xceiv->otg->state));
847 } 929 }
848 } 930 }
849 } 931 }
850 932
851 /* handle babble condition */ 933 /* handle babble condition */
852 if (int_usb & MUSB_INTR_BABBLE && is_host_active(musb)) 934 if (int_usb & MUSB_INTR_BABBLE && is_host_active(musb)) {
935 musb_generic_disable(musb);
853 schedule_delayed_work(&musb->recover_work, 936 schedule_delayed_work(&musb->recover_work,
854 msecs_to_jiffies(100)); 937 msecs_to_jiffies(100));
938 }
855 939
856#if 0 940#if 0
857/* REVISIT ... this would be for multiplexing periodic endpoints, or 941/* REVISIT ... this would be for multiplexing periodic endpoints, or
@@ -1032,21 +1116,7 @@ static void musb_shutdown(struct platform_device *pdev)
1032 * We don't currently use dynamic fifo setup capability to do anything 1116 * We don't currently use dynamic fifo setup capability to do anything
1033 * more than selecting one of a bunch of predefined configurations. 1117 * more than selecting one of a bunch of predefined configurations.
1034 */ 1118 */
1035#if defined(CONFIG_USB_MUSB_TUSB6010) \ 1119static ushort fifo_mode;
1036 || defined(CONFIG_USB_MUSB_TUSB6010_MODULE) \
1037 || defined(CONFIG_USB_MUSB_OMAP2PLUS) \
1038 || defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE) \
1039 || defined(CONFIG_USB_MUSB_AM35X) \
1040 || defined(CONFIG_USB_MUSB_AM35X_MODULE) \
1041 || defined(CONFIG_USB_MUSB_DSPS) \
1042 || defined(CONFIG_USB_MUSB_DSPS_MODULE)
1043static ushort fifo_mode = 4;
1044#elif defined(CONFIG_USB_MUSB_UX500) \
1045 || defined(CONFIG_USB_MUSB_UX500_MODULE)
1046static ushort fifo_mode = 5;
1047#else
1048static ushort fifo_mode = 2;
1049#endif
1050 1120
1051/* "modprobe ... fifo_mode=1" etc */ 1121/* "modprobe ... fifo_mode=1" etc */
1052module_param(fifo_mode, ushort, 0); 1122module_param(fifo_mode, ushort, 0);
@@ -1456,20 +1526,25 @@ static int musb_core_init(u16 musb_type, struct musb *musb)
1456 for (i = 0; i < musb->nr_endpoints; i++) { 1526 for (i = 0; i < musb->nr_endpoints; i++) {
1457 struct musb_hw_ep *hw_ep = musb->endpoints + i; 1527 struct musb_hw_ep *hw_ep = musb->endpoints + i;
1458 1528
1459 hw_ep->fifo = MUSB_FIFO_OFFSET(i) + mbase; 1529 hw_ep->fifo = musb->io.fifo_offset(i) + mbase;
1460#if defined(CONFIG_USB_MUSB_TUSB6010) || defined (CONFIG_USB_MUSB_TUSB6010_MODULE) 1530#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
1461 hw_ep->fifo_async = musb->async + 0x400 + MUSB_FIFO_OFFSET(i); 1531 if (musb->io.quirks & MUSB_IN_TUSB) {
1462 hw_ep->fifo_sync = musb->sync + 0x400 + MUSB_FIFO_OFFSET(i); 1532 hw_ep->fifo_async = musb->async + 0x400 +
1463 hw_ep->fifo_sync_va = 1533 musb->io.fifo_offset(i);
1464 musb->sync_va + 0x400 + MUSB_FIFO_OFFSET(i); 1534 hw_ep->fifo_sync = musb->sync + 0x400 +
1465 1535 musb->io.fifo_offset(i);
1466 if (i == 0) 1536 hw_ep->fifo_sync_va =
1467 hw_ep->conf = mbase - 0x400 + TUSB_EP0_CONF; 1537 musb->sync_va + 0x400 + musb->io.fifo_offset(i);
1468 else 1538
1469 hw_ep->conf = mbase + 0x400 + (((i - 1) & 0xf) << 2); 1539 if (i == 0)
1540 hw_ep->conf = mbase - 0x400 + TUSB_EP0_CONF;
1541 else
1542 hw_ep->conf = mbase + 0x400 +
1543 (((i - 1) & 0xf) << 2);
1544 }
1470#endif 1545#endif
1471 1546
1472 hw_ep->regs = MUSB_EP_OFFSET(i, 0) + mbase; 1547 hw_ep->regs = musb->io.ep_offset(i, 0) + mbase;
1473 hw_ep->target_regs = musb_read_target_reg_base(i, mbase); 1548 hw_ep->target_regs = musb_read_target_reg_base(i, mbase);
1474 hw_ep->rx_reinit = 1; 1549 hw_ep->rx_reinit = 1;
1475 hw_ep->tx_reinit = 1; 1550 hw_ep->tx_reinit = 1;
@@ -1630,7 +1705,7 @@ musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
1630 int ret = -EINVAL; 1705 int ret = -EINVAL;
1631 1706
1632 spin_lock_irqsave(&musb->lock, flags); 1707 spin_lock_irqsave(&musb->lock, flags);
1633 ret = sprintf(buf, "%s\n", usb_otg_state_string(musb->xceiv->state)); 1708 ret = sprintf(buf, "%s\n", usb_otg_state_string(musb->xceiv->otg->state));
1634 spin_unlock_irqrestore(&musb->lock, flags); 1709 spin_unlock_irqrestore(&musb->lock, flags);
1635 1710
1636 return ret; 1711 return ret;
@@ -1675,7 +1750,7 @@ musb_vbus_store(struct device *dev, struct device_attribute *attr,
1675 spin_lock_irqsave(&musb->lock, flags); 1750 spin_lock_irqsave(&musb->lock, flags);
1676 /* force T(a_wait_bcon) to be zero/unlimited *OR* valid */ 1751 /* force T(a_wait_bcon) to be zero/unlimited *OR* valid */
1677 musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ; 1752 musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ;
1678 if (musb->xceiv->state == OTG_STATE_A_WAIT_BCON) 1753 if (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)
1679 musb->is_active = 0; 1754 musb->is_active = 0;
1680 musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); 1755 musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val));
1681 spin_unlock_irqrestore(&musb->lock, flags); 1756 spin_unlock_irqrestore(&musb->lock, flags);
@@ -1743,8 +1818,8 @@ static void musb_irq_work(struct work_struct *data)
1743{ 1818{
1744 struct musb *musb = container_of(data, struct musb, irq_work); 1819 struct musb *musb = container_of(data, struct musb, irq_work);
1745 1820
1746 if (musb->xceiv->state != musb->xceiv_old_state) { 1821 if (musb->xceiv->otg->state != musb->xceiv_old_state) {
1747 musb->xceiv_old_state = musb->xceiv->state; 1822 musb->xceiv_old_state = musb->xceiv->otg->state;
1748 sysfs_notify(&musb->controller->kobj, NULL, "mode"); 1823 sysfs_notify(&musb->controller->kobj, NULL, "mode");
1749 } 1824 }
1750} 1825}
@@ -1903,6 +1978,18 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
1903 musb->ops = plat->platform_ops; 1978 musb->ops = plat->platform_ops;
1904 musb->port_mode = plat->mode; 1979 musb->port_mode = plat->mode;
1905 1980
1981 /*
1982 * Initialize the default IO functions. At least omap2430 needs
1983 * these early. We initialize the platform specific IO functions
1984 * later on.
1985 */
1986 musb_readb = musb_default_readb;
1987 musb_writeb = musb_default_writeb;
1988 musb_readw = musb_default_readw;
1989 musb_writew = musb_default_writew;
1990 musb_readl = musb_default_readl;
1991 musb_writel = musb_default_writel;
1992
1906 /* The musb_platform_init() call: 1993 /* The musb_platform_init() call:
1907 * - adjusts musb->mregs 1994 * - adjusts musb->mregs
1908 * - sets the musb->isr 1995 * - sets the musb->isr
@@ -1924,6 +2011,57 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
1924 goto fail2; 2011 goto fail2;
1925 } 2012 }
1926 2013
2014 if (musb->ops->quirks)
2015 musb->io.quirks = musb->ops->quirks;
2016
2017 /* At least tusb6010 has it's own offsets.. */
2018 if (musb->ops->ep_offset)
2019 musb->io.ep_offset = musb->ops->ep_offset;
2020 if (musb->ops->ep_select)
2021 musb->io.ep_select = musb->ops->ep_select;
2022
2023 /* ..and some devices use indexed offset or flat offset */
2024 if (musb->io.quirks & MUSB_INDEXED_EP) {
2025 musb->io.ep_offset = musb_indexed_ep_offset;
2026 musb->io.ep_select = musb_indexed_ep_select;
2027 } else {
2028 musb->io.ep_offset = musb_flat_ep_offset;
2029 musb->io.ep_select = musb_flat_ep_select;
2030 }
2031
2032 if (musb->ops->fifo_mode)
2033 fifo_mode = musb->ops->fifo_mode;
2034 else
2035 fifo_mode = 4;
2036
2037 if (musb->ops->fifo_offset)
2038 musb->io.fifo_offset = musb->ops->fifo_offset;
2039 else
2040 musb->io.fifo_offset = musb_default_fifo_offset;
2041
2042 if (musb->ops->readb)
2043 musb_readb = musb->ops->readb;
2044 if (musb->ops->writeb)
2045 musb_writeb = musb->ops->writeb;
2046 if (musb->ops->readw)
2047 musb_readw = musb->ops->readw;
2048 if (musb->ops->writew)
2049 musb_writew = musb->ops->writew;
2050 if (musb->ops->readl)
2051 musb_readl = musb->ops->readl;
2052 if (musb->ops->writel)
2053 musb_writel = musb->ops->writel;
2054
2055 if (musb->ops->read_fifo)
2056 musb->io.read_fifo = musb->ops->read_fifo;
2057 else
2058 musb->io.read_fifo = musb_default_read_fifo;
2059
2060 if (musb->ops->write_fifo)
2061 musb->io.write_fifo = musb->ops->write_fifo;
2062 else
2063 musb->io.write_fifo = musb_default_write_fifo;
2064
1927 if (!musb->xceiv->io_ops) { 2065 if (!musb->xceiv->io_ops) {
1928 musb->xceiv->io_dev = musb->controller; 2066 musb->xceiv->io_dev = musb->controller;
1929 musb->xceiv->io_priv = musb->mregs; 2067 musb->xceiv->io_priv = musb->mregs;
@@ -1983,10 +2121,10 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
1983 2121
1984 if (musb->xceiv->otg->default_a) { 2122 if (musb->xceiv->otg->default_a) {
1985 MUSB_HST_MODE(musb); 2123 MUSB_HST_MODE(musb);
1986 musb->xceiv->state = OTG_STATE_A_IDLE; 2124 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
1987 } else { 2125 } else {
1988 MUSB_DEV_MODE(musb); 2126 MUSB_DEV_MODE(musb);
1989 musb->xceiv->state = OTG_STATE_B_IDLE; 2127 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
1990 } 2128 }
1991 2129
1992 switch (musb->port_mode) { 2130 switch (musb->port_mode) {
@@ -2080,10 +2218,10 @@ static int musb_probe(struct platform_device *pdev)
2080 struct resource *iomem; 2218 struct resource *iomem;
2081 void __iomem *base; 2219 void __iomem *base;
2082 2220
2083 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2221 if (irq <= 0)
2084 if (!iomem || irq <= 0)
2085 return -ENODEV; 2222 return -ENODEV;
2086 2223
2224 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2087 base = devm_ioremap_resource(dev, iomem); 2225 base = devm_ioremap_resource(dev, iomem);
2088 if (IS_ERR(base)) 2226 if (IS_ERR(base))
2089 return PTR_ERR(base); 2227 return PTR_ERR(base);
@@ -2297,9 +2435,11 @@ static int musb_suspend(struct device *dev)
2297 return 0; 2435 return 0;
2298} 2436}
2299 2437
2300static int musb_resume_noirq(struct device *dev) 2438static int musb_resume(struct device *dev)
2301{ 2439{
2302 struct musb *musb = dev_to_musb(dev); 2440 struct musb *musb = dev_to_musb(dev);
2441 u8 devctl;
2442 u8 mask;
2303 2443
2304 /* 2444 /*
2305 * For static cmos like DaVinci, register values were preserved 2445 * For static cmos like DaVinci, register values were preserved
@@ -2313,6 +2453,23 @@ static int musb_resume_noirq(struct device *dev)
2313 2453
2314 musb_restore_context(musb); 2454 musb_restore_context(musb);
2315 2455
2456 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
2457 mask = MUSB_DEVCTL_BDEVICE | MUSB_DEVCTL_FSDEV | MUSB_DEVCTL_LSDEV;
2458 if ((devctl & mask) != (musb->context.devctl & mask))
2459 musb->port1_status = 0;
2460 if (musb->need_finish_resume) {
2461 musb->need_finish_resume = 0;
2462 schedule_delayed_work(&musb->finish_resume_work,
2463 msecs_to_jiffies(20));
2464 }
2465
2466 /*
2467 * The USB HUB code expects the device to be in RPM_ACTIVE once it came
2468 * out of suspend
2469 */
2470 pm_runtime_disable(dev);
2471 pm_runtime_set_active(dev);
2472 pm_runtime_enable(dev);
2316 return 0; 2473 return 0;
2317} 2474}
2318 2475
@@ -2348,7 +2505,7 @@ static int musb_runtime_resume(struct device *dev)
2348 2505
2349static const struct dev_pm_ops musb_dev_pm_ops = { 2506static const struct dev_pm_ops musb_dev_pm_ops = {
2350 .suspend = musb_suspend, 2507 .suspend = musb_suspend,
2351 .resume_noirq = musb_resume_noirq, 2508 .resume = musb_resume,
2352 .runtime_suspend = musb_runtime_suspend, 2509 .runtime_suspend = musb_runtime_suspend,
2353 .runtime_resume = musb_runtime_resume, 2510 .runtime_resume = musb_runtime_resume,
2354}; 2511};
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 414e57a984bb..5e65958f7915 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -124,41 +124,6 @@ enum musb_g_ep0_state {
124#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 124#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
125#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 125#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
126 126
127
128/*************************** REGISTER ACCESS ********************************/
129
130/* Endpoint registers (other than dynfifo setup) can be accessed either
131 * directly with the "flat" model, or after setting up an index register.
132 */
133
134#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
135 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
136 || defined(CONFIG_ARCH_OMAP4)
137/* REVISIT indexed access seemed to
138 * misbehave (on DaVinci) for at least peripheral IN ...
139 */
140#define MUSB_FLAT_REG
141#endif
142
143/* TUSB mapping: "flat" plus ep0 special cases */
144#if defined(CONFIG_USB_MUSB_TUSB6010) || \
145 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
146#define musb_ep_select(_mbase, _epnum) \
147 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
148#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
149
150/* "flat" mapping: each endpoint has its own i/o address */
151#elif defined(MUSB_FLAT_REG)
152#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
153#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
154
155/* "indexed" mapping: INDEX register controls register bank select */
156#else
157#define musb_ep_select(_mbase, _epnum) \
158 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
159#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
160#endif
161
162/****************************** FUNCTIONS ********************************/ 127/****************************** FUNCTIONS ********************************/
163 128
164#define MUSB_HST_MODE(_musb)\ 129#define MUSB_HST_MODE(_musb)\
@@ -173,8 +138,25 @@ enum musb_g_ep0_state {
173 138
174/******************************** TYPES *************************************/ 139/******************************** TYPES *************************************/
175 140
141struct musb_io;
142
176/** 143/**
177 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 144 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
145 * @quirks: flags for platform specific quirks
146 * @enable: enable device
147 * @disable: disable device
148 * @ep_offset: returns the end point offset
149 * @ep_select: selects the specified end point
150 * @fifo_mode: sets the fifo mode
151 * @fifo_offset: returns the fifo offset
152 * @readb: read 8 bits
153 * @writeb: write 8 bits
154 * @readw: read 16 bits
155 * @writew: write 16 bits
156 * @readl: read 32 bits
157 * @writel: write 32 bits
158 * @read_fifo: reads the fifo
159 * @write_fifo: writes to fifo
178 * @init: turns on clocks, sets up platform-specific registers, etc 160 * @init: turns on clocks, sets up platform-specific registers, etc
179 * @exit: undoes @init 161 * @exit: undoes @init
180 * @set_mode: forcefully changes operating mode 162 * @set_mode: forcefully changes operating mode
@@ -184,12 +166,34 @@ enum musb_g_ep0_state {
184 * @adjust_channel_params: pre check for standard dma channel_program func 166 * @adjust_channel_params: pre check for standard dma channel_program func
185 */ 167 */
186struct musb_platform_ops { 168struct musb_platform_ops {
169
170#define MUSB_DMA_UX500 BIT(6)
171#define MUSB_DMA_CPPI41 BIT(5)
172#define MUSB_DMA_CPPI BIT(4)
173#define MUSB_DMA_TUSB_OMAP BIT(3)
174#define MUSB_DMA_INVENTRA BIT(2)
175#define MUSB_IN_TUSB BIT(1)
176#define MUSB_INDEXED_EP BIT(0)
177 u32 quirks;
178
187 int (*init)(struct musb *musb); 179 int (*init)(struct musb *musb);
188 int (*exit)(struct musb *musb); 180 int (*exit)(struct musb *musb);
189 181
190 void (*enable)(struct musb *musb); 182 void (*enable)(struct musb *musb);
191 void (*disable)(struct musb *musb); 183 void (*disable)(struct musb *musb);
192 184
185 u32 (*ep_offset)(u8 epnum, u16 offset);
186 void (*ep_select)(void __iomem *mbase, u8 epnum);
187 u16 fifo_mode;
188 u32 (*fifo_offset)(u8 epnum);
189 u8 (*readb)(const void __iomem *addr, unsigned offset);
190 void (*writeb)(void __iomem *addr, unsigned offset, u8 data);
191 u16 (*readw)(const void __iomem *addr, unsigned offset);
192 void (*writew)(void __iomem *addr, unsigned offset, u16 data);
193 u32 (*readl)(const void __iomem *addr, unsigned offset);
194 void (*writel)(void __iomem *addr, unsigned offset, u32 data);
195 void (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
196 void (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
193 int (*set_mode)(struct musb *musb, u8 mode); 197 int (*set_mode)(struct musb *musb, u8 mode);
194 void (*try_idle)(struct musb *musb, unsigned long timeout); 198 void (*try_idle)(struct musb *musb, unsigned long timeout);
195 int (*reset)(struct musb *musb); 199 int (*reset)(struct musb *musb);
@@ -212,8 +216,7 @@ struct musb_hw_ep {
212 void __iomem *fifo; 216 void __iomem *fifo;
213 void __iomem *regs; 217 void __iomem *regs;
214 218
215#if defined(CONFIG_USB_MUSB_TUSB6010) || \ 219#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
216 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
217 void __iomem *conf; 220 void __iomem *conf;
218#endif 221#endif
219 222
@@ -230,8 +233,7 @@ struct musb_hw_ep {
230 struct dma_channel *tx_channel; 233 struct dma_channel *tx_channel;
231 struct dma_channel *rx_channel; 234 struct dma_channel *rx_channel;
232 235
233#if defined(CONFIG_USB_MUSB_TUSB6010) || \ 236#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
234 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
235 /* TUSB has "asynchronous" and "synchronous" dma modes */ 237 /* TUSB has "asynchronous" and "synchronous" dma modes */
236 dma_addr_t fifo_async; 238 dma_addr_t fifo_async;
237 dma_addr_t fifo_sync; 239 dma_addr_t fifo_sync;
@@ -292,6 +294,7 @@ struct musb {
292 /* device lock */ 294 /* device lock */
293 spinlock_t lock; 295 spinlock_t lock;
294 296
297 struct musb_io io;
295 const struct musb_platform_ops *ops; 298 const struct musb_platform_ops *ops;
296 struct musb_context_registers context; 299 struct musb_context_registers context;
297 300
@@ -334,8 +337,7 @@ struct musb {
334 void __iomem *ctrl_base; 337 void __iomem *ctrl_base;
335 void __iomem *mregs; 338 void __iomem *mregs;
336 339
337#if defined(CONFIG_USB_MUSB_TUSB6010) || \ 340#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
338 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
339 dma_addr_t async; 341 dma_addr_t async;
340 dma_addr_t sync; 342 dma_addr_t sync;
341 void __iomem *sync_va; 343 void __iomem *sync_va;
@@ -390,6 +392,7 @@ struct musb {
390 392
391 /* is_suspended means USB B_PERIPHERAL suspend */ 393 /* is_suspended means USB B_PERIPHERAL suspend */
392 unsigned is_suspended:1; 394 unsigned is_suspended:1;
395 unsigned need_finish_resume :1;
393 396
394 /* may_wakeup means remote wakeup is enabled */ 397 /* may_wakeup means remote wakeup is enabled */
395 unsigned may_wakeup:1; 398 unsigned may_wakeup:1;
@@ -474,7 +477,7 @@ static inline int musb_read_fifosize(struct musb *musb,
474 u8 reg = 0; 477 u8 reg = 0;
475 478
476 /* read from core using indexed model */ 479 /* read from core using indexed model */
477 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); 480 reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
478 /* 0's returned when no more endpoints */ 481 /* 0's returned when no more endpoints */
479 if (!reg) 482 if (!reg)
480 return -ENODEV; 483 return -ENODEV;
diff --git a/drivers/usb/musb/musb_cppi41.c b/drivers/usb/musb/musb_cppi41.c
index 5a9b977fbc19..f64fd964dc6d 100644
--- a/drivers/usb/musb/musb_cppi41.c
+++ b/drivers/usb/musb/musb_cppi41.c
@@ -253,6 +253,7 @@ static void cppi41_dma_callback(void *private_data)
253 cppi41_trans_done(cppi41_channel); 253 cppi41_trans_done(cppi41_channel);
254 } else { 254 } else {
255 struct cppi41_dma_controller *controller; 255 struct cppi41_dma_controller *controller;
256 int is_hs = 0;
256 /* 257 /*
257 * On AM335x it has been observed that the TX interrupt fires 258 * On AM335x it has been observed that the TX interrupt fires
258 * too early that means the TXFIFO is not yet empty but the DMA 259 * too early that means the TXFIFO is not yet empty but the DMA
@@ -265,7 +266,14 @@ static void cppi41_dma_callback(void *private_data)
265 */ 266 */
266 controller = cppi41_channel->controller; 267 controller = cppi41_channel->controller;
267 268
268 if (musb->g.speed == USB_SPEED_HIGH) { 269 if (is_host_active(musb)) {
270 if (musb->port1_status & USB_PORT_STAT_HIGH_SPEED)
271 is_hs = 1;
272 } else {
273 if (musb->g.speed == USB_SPEED_HIGH)
274 is_hs = 1;
275 }
276 if (is_hs) {
269 unsigned wait = 25; 277 unsigned wait = 25;
270 278
271 do { 279 do {
diff --git a/drivers/usb/musb/musb_debugfs.c b/drivers/usb/musb/musb_debugfs.c
index 4c216790e86b..ad3701a97389 100644
--- a/drivers/usb/musb/musb_debugfs.c
+++ b/drivers/usb/musb/musb_debugfs.c
@@ -49,33 +49,36 @@ struct musb_register_map {
49}; 49};
50 50
51static const struct musb_register_map musb_regmap[] = { 51static const struct musb_register_map musb_regmap[] = {
52 { "FAddr", 0x00, 8 }, 52 { "FAddr", MUSB_FADDR, 8 },
53 { "Power", 0x01, 8 }, 53 { "Power", MUSB_POWER, 8 },
54 { "Frame", 0x0c, 16 }, 54 { "Frame", MUSB_FRAME, 16 },
55 { "Index", 0x0e, 8 }, 55 { "Index", MUSB_INDEX, 8 },
56 { "Testmode", 0x0f, 8 }, 56 { "Testmode", MUSB_TESTMODE, 8 },
57 { "TxMaxPp", 0x10, 16 }, 57 { "TxMaxPp", MUSB_TXMAXP, 16 },
58 { "TxCSRp", 0x12, 16 }, 58 { "TxCSRp", MUSB_TXCSR, 16 },
59 { "RxMaxPp", 0x14, 16 }, 59 { "RxMaxPp", MUSB_RXMAXP, 16 },
60 { "RxCSR", 0x16, 16 }, 60 { "RxCSR", MUSB_RXCSR, 16 },
61 { "RxCount", 0x18, 16 }, 61 { "RxCount", MUSB_RXCOUNT, 16 },
62 { "ConfigData", 0x1f, 8 }, 62 { "ConfigData", MUSB_CONFIGDATA,8 },
63 { "DevCtl", 0x60, 8 }, 63 { "IntrRxE", MUSB_INTRRXE, 16 },
64 { "MISC", 0x61, 8 }, 64 { "IntrTxE", MUSB_INTRTXE, 16 },
65 { "TxFIFOsz", 0x62, 8 }, 65 { "IntrUsbE", MUSB_INTRUSBE, 8 },
66 { "RxFIFOsz", 0x63, 8 }, 66 { "DevCtl", MUSB_DEVCTL, 8 },
67 { "TxFIFOadd", 0x64, 16 }, 67 { "BabbleCtl", MUSB_BABBLE_CTL,8 },
68 { "RxFIFOadd", 0x66, 16 }, 68 { "TxFIFOsz", MUSB_TXFIFOSZ, 8 },
69 { "VControl", 0x68, 32 }, 69 { "RxFIFOsz", MUSB_RXFIFOSZ, 8 },
70 { "HWVers", 0x6C, 16 }, 70 { "TxFIFOadd", MUSB_TXFIFOADD, 16 },
71 { "EPInfo", 0x78, 8 }, 71 { "RxFIFOadd", MUSB_RXFIFOADD, 16 },
72 { "RAMInfo", 0x79, 8 }, 72 { "VControl", 0x68, 32 },
73 { "LinkInfo", 0x7A, 8 }, 73 { "HWVers", 0x69, 16 },
74 { "VPLen", 0x7B, 8 }, 74 { "EPInfo", MUSB_EPINFO, 8 },
75 { "HS_EOF1", 0x7C, 8 }, 75 { "RAMInfo", MUSB_RAMINFO, 8 },
76 { "FS_EOF1", 0x7D, 8 }, 76 { "LinkInfo", MUSB_LINKINFO, 8 },
77 { "LS_EOF1", 0x7E, 8 }, 77 { "VPLen", MUSB_VPLEN, 8 },
78 { "SOFT_RST", 0x7F, 8 }, 78 { "HS_EOF1", MUSB_HS_EOF1, 8 },
79 { "FS_EOF1", MUSB_FS_EOF1, 8 },
80 { "LS_EOF1", MUSB_LS_EOF1, 8 },
81 { "SOFT_RST", 0x7F, 8 },
79 { "DMA_CNTLch0", 0x204, 16 }, 82 { "DMA_CNTLch0", 0x204, 16 },
80 { "DMA_ADDRch0", 0x208, 32 }, 83 { "DMA_ADDRch0", 0x208, 32 },
81 { "DMA_COUNTch0", 0x20C, 32 }, 84 { "DMA_COUNTch0", 0x20C, 32 },
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 48bc09e7b83b..53bd0e71d19f 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -179,9 +179,9 @@ static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
179 179
180 /* Never idle if active, or when VBUS timeout is not set as host */ 180 /* Never idle if active, or when VBUS timeout is not set as host */
181 if (musb->is_active || (musb->a_wait_bcon == 0 && 181 if (musb->is_active || (musb->a_wait_bcon == 0 &&
182 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 182 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
183 dev_dbg(musb->controller, "%s active, deleting timer\n", 183 dev_dbg(musb->controller, "%s active, deleting timer\n",
184 usb_otg_state_string(musb->xceiv->state)); 184 usb_otg_state_string(musb->xceiv->otg->state));
185 del_timer(&glue->timer); 185 del_timer(&glue->timer);
186 glue->last_timer = jiffies; 186 glue->last_timer = jiffies;
187 return; 187 return;
@@ -201,7 +201,7 @@ static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
201 glue->last_timer = timeout; 201 glue->last_timer = timeout;
202 202
203 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 203 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
204 usb_otg_state_string(musb->xceiv->state), 204 usb_otg_state_string(musb->xceiv->otg->state),
205 jiffies_to_msecs(timeout - jiffies)); 205 jiffies_to_msecs(timeout - jiffies));
206 mod_timer(&glue->timer, timeout); 206 mod_timer(&glue->timer, timeout);
207} 207}
@@ -265,10 +265,10 @@ static void otg_timer(unsigned long _musb)
265 */ 265 */
266 devctl = dsps_readb(mregs, MUSB_DEVCTL); 266 devctl = dsps_readb(mregs, MUSB_DEVCTL);
267 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 267 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
268 usb_otg_state_string(musb->xceiv->state)); 268 usb_otg_state_string(musb->xceiv->otg->state));
269 269
270 spin_lock_irqsave(&musb->lock, flags); 270 spin_lock_irqsave(&musb->lock, flags);
271 switch (musb->xceiv->state) { 271 switch (musb->xceiv->otg->state) {
272 case OTG_STATE_A_WAIT_BCON: 272 case OTG_STATE_A_WAIT_BCON:
273 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 273 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
274 skip_session = 1; 274 skip_session = 1;
@@ -277,10 +277,10 @@ static void otg_timer(unsigned long _musb)
277 case OTG_STATE_A_IDLE: 277 case OTG_STATE_A_IDLE:
278 case OTG_STATE_B_IDLE: 278 case OTG_STATE_B_IDLE:
279 if (devctl & MUSB_DEVCTL_BDEVICE) { 279 if (devctl & MUSB_DEVCTL_BDEVICE) {
280 musb->xceiv->state = OTG_STATE_B_IDLE; 280 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
281 MUSB_DEV_MODE(musb); 281 MUSB_DEV_MODE(musb);
282 } else { 282 } else {
283 musb->xceiv->state = OTG_STATE_A_IDLE; 283 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
284 MUSB_HST_MODE(musb); 284 MUSB_HST_MODE(musb);
285 } 285 }
286 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 286 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
@@ -288,7 +288,7 @@ static void otg_timer(unsigned long _musb)
288 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 288 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
289 break; 289 break;
290 case OTG_STATE_A_WAIT_VFALL: 290 case OTG_STATE_A_WAIT_VFALL:
291 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 291 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
292 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 292 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
293 MUSB_INTR_VBUSERROR << wrp->usb_shift); 293 MUSB_INTR_VBUSERROR << wrp->usb_shift);
294 break; 294 break;
@@ -373,26 +373,26 @@ static irqreturn_t dsps_interrupt(int irq, void *hci)
373 * devctl. 373 * devctl.
374 */ 374 */
375 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 375 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
376 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 376 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
377 mod_timer(&glue->timer, 377 mod_timer(&glue->timer,
378 jiffies + wrp->poll_seconds * HZ); 378 jiffies + wrp->poll_seconds * HZ);
379 WARNING("VBUS error workaround (delay coming)\n"); 379 WARNING("VBUS error workaround (delay coming)\n");
380 } else if (drvvbus) { 380 } else if (drvvbus) {
381 MUSB_HST_MODE(musb); 381 MUSB_HST_MODE(musb);
382 musb->xceiv->otg->default_a = 1; 382 musb->xceiv->otg->default_a = 1;
383 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 383 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
384 del_timer(&glue->timer); 384 del_timer(&glue->timer);
385 } else { 385 } else {
386 musb->is_active = 0; 386 musb->is_active = 0;
387 MUSB_DEV_MODE(musb); 387 MUSB_DEV_MODE(musb);
388 musb->xceiv->otg->default_a = 0; 388 musb->xceiv->otg->default_a = 0;
389 musb->xceiv->state = OTG_STATE_B_IDLE; 389 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
390 } 390 }
391 391
392 /* NOTE: this must complete power-on within 100 ms. */ 392 /* NOTE: this must complete power-on within 100 ms. */
393 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 393 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
394 drvvbus ? "on" : "off", 394 drvvbus ? "on" : "off",
395 usb_otg_state_string(musb->xceiv->state), 395 usb_otg_state_string(musb->xceiv->otg->state),
396 err ? " ERROR" : "", 396 err ? " ERROR" : "",
397 devctl); 397 devctl);
398 ret = IRQ_HANDLED; 398 ret = IRQ_HANDLED;
@@ -402,7 +402,7 @@ static irqreturn_t dsps_interrupt(int irq, void *hci)
402 ret |= musb_interrupt(musb); 402 ret |= musb_interrupt(musb);
403 403
404 /* Poll for ID change in OTG port mode */ 404 /* Poll for ID change in OTG port mode */
405 if (musb->xceiv->state == OTG_STATE_B_IDLE && 405 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
406 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 406 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
407 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 407 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
408out: 408out:
@@ -447,9 +447,6 @@ static int dsps_musb_init(struct musb *musb)
447 int ret; 447 int ret;
448 448
449 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 449 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
450 if (!r)
451 return -EINVAL;
452
453 reg_base = devm_ioremap_resource(dev, r); 450 reg_base = devm_ioremap_resource(dev, r);
454 if (IS_ERR(reg_base)) 451 if (IS_ERR(reg_base))
455 return PTR_ERR(reg_base); 452 return PTR_ERR(reg_base);
@@ -636,6 +633,7 @@ static int dsps_musb_reset(struct musb *musb)
636} 633}
637 634
638static struct musb_platform_ops dsps_ops = { 635static struct musb_platform_ops dsps_ops = {
636 .quirks = MUSB_INDEXED_EP,
639 .init = dsps_musb_init, 637 .init = dsps_musb_init,
640 .exit = dsps_musb_exit, 638 .exit = dsps_musb_exit,
641 639
@@ -729,7 +727,6 @@ static int dsps_create_musb_pdev(struct dsps_glue *glue,
729 727
730 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 728 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
731 if (!config) { 729 if (!config) {
732 dev_err(dev, "failed to allocate musb hdrc config\n");
733 ret = -ENOMEM; 730 ret = -ENOMEM;
734 goto err; 731 goto err;
735 } 732 }
@@ -781,10 +778,8 @@ static int dsps_probe(struct platform_device *pdev)
781 778
782 /* allocate glue */ 779 /* allocate glue */
783 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 780 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
784 if (!glue) { 781 if (!glue)
785 dev_err(&pdev->dev, "unable to allocate glue memory\n");
786 return -ENOMEM; 782 return -ENOMEM;
787 }
788 783
789 glue->dev = &pdev->dev; 784 glue->dev = &pdev->dev;
790 glue->wrp = wrp; 785 glue->wrp = wrp;
@@ -906,7 +901,7 @@ static int dsps_resume(struct device *dev)
906 dsps_writel(mbase, wrp->mode, glue->context.mode); 901 dsps_writel(mbase, wrp->mode, glue->context.mode);
907 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 902 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
908 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 903 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
909 if (musb->xceiv->state == OTG_STATE_B_IDLE && 904 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
910 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 905 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
911 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 906 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
912 907
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index 24c8c0219790..49b04cb6f5ca 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -1546,7 +1546,7 @@ static int musb_gadget_wakeup(struct usb_gadget *gadget)
1546 1546
1547 spin_lock_irqsave(&musb->lock, flags); 1547 spin_lock_irqsave(&musb->lock, flags);
1548 1548
1549 switch (musb->xceiv->state) { 1549 switch (musb->xceiv->otg->state) {
1550 case OTG_STATE_B_PERIPHERAL: 1550 case OTG_STATE_B_PERIPHERAL:
1551 /* NOTE: OTG state machine doesn't include B_SUSPENDED; 1551 /* NOTE: OTG state machine doesn't include B_SUSPENDED;
1552 * that's part of the standard usb 1.1 state machine, and 1552 * that's part of the standard usb 1.1 state machine, and
@@ -1587,7 +1587,7 @@ static int musb_gadget_wakeup(struct usb_gadget *gadget)
1587 goto done; 1587 goto done;
1588 default: 1588 default:
1589 dev_dbg(musb->controller, "Unhandled wake: %s\n", 1589 dev_dbg(musb->controller, "Unhandled wake: %s\n",
1590 usb_otg_state_string(musb->xceiv->state)); 1590 usb_otg_state_string(musb->xceiv->otg->state));
1591 goto done; 1591 goto done;
1592 } 1592 }
1593 1593
@@ -1684,8 +1684,7 @@ static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on)
1684 1684
1685static int musb_gadget_start(struct usb_gadget *g, 1685static int musb_gadget_start(struct usb_gadget *g,
1686 struct usb_gadget_driver *driver); 1686 struct usb_gadget_driver *driver);
1687static int musb_gadget_stop(struct usb_gadget *g, 1687static int musb_gadget_stop(struct usb_gadget *g);
1688 struct usb_gadget_driver *driver);
1689 1688
1690static const struct usb_gadget_ops musb_gadget_operations = { 1689static const struct usb_gadget_ops musb_gadget_operations = {
1691 .get_frame = musb_gadget_get_frame, 1690 .get_frame = musb_gadget_get_frame,
@@ -1792,7 +1791,7 @@ int musb_gadget_setup(struct musb *musb)
1792 1791
1793 MUSB_DEV_MODE(musb); 1792 MUSB_DEV_MODE(musb);
1794 musb->xceiv->otg->default_a = 0; 1793 musb->xceiv->otg->default_a = 0;
1795 musb->xceiv->state = OTG_STATE_B_IDLE; 1794 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
1796 1795
1797 /* this "gadget" abstracts/virtualizes the controller */ 1796 /* this "gadget" abstracts/virtualizes the controller */
1798 musb->g.name = musb_driver_name; 1797 musb->g.name = musb_driver_name;
@@ -1851,8 +1850,6 @@ static int musb_gadget_start(struct usb_gadget *g,
1851 1850
1852 pm_runtime_get_sync(musb->controller); 1851 pm_runtime_get_sync(musb->controller);
1853 1852
1854 dev_dbg(musb->controller, "registering driver %s\n", driver->function);
1855
1856 musb->softconnect = 0; 1853 musb->softconnect = 0;
1857 musb->gadget_driver = driver; 1854 musb->gadget_driver = driver;
1858 1855
@@ -1860,7 +1857,7 @@ static int musb_gadget_start(struct usb_gadget *g,
1860 musb->is_active = 1; 1857 musb->is_active = 1;
1861 1858
1862 otg_set_peripheral(otg, &musb->g); 1859 otg_set_peripheral(otg, &musb->g);
1863 musb->xceiv->state = OTG_STATE_B_IDLE; 1860 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
1864 spin_unlock_irqrestore(&musb->lock, flags); 1861 spin_unlock_irqrestore(&musb->lock, flags);
1865 1862
1866 musb_start(musb); 1863 musb_start(musb);
@@ -1925,8 +1922,7 @@ static void stop_activity(struct musb *musb, struct usb_gadget_driver *driver)
1925 * 1922 *
1926 * @param driver the gadget driver to unregister 1923 * @param driver the gadget driver to unregister
1927 */ 1924 */
1928static int musb_gadget_stop(struct usb_gadget *g, 1925static int musb_gadget_stop(struct usb_gadget *g)
1929 struct usb_gadget_driver *driver)
1930{ 1926{
1931 struct musb *musb = gadget_to_musb(g); 1927 struct musb *musb = gadget_to_musb(g);
1932 unsigned long flags; 1928 unsigned long flags;
@@ -1945,13 +1941,10 @@ static int musb_gadget_stop(struct usb_gadget *g,
1945 1941
1946 (void) musb_gadget_vbus_draw(&musb->g, 0); 1942 (void) musb_gadget_vbus_draw(&musb->g, 0);
1947 1943
1948 musb->xceiv->state = OTG_STATE_UNDEFINED; 1944 musb->xceiv->otg->state = OTG_STATE_UNDEFINED;
1949 stop_activity(musb, driver); 1945 stop_activity(musb, NULL);
1950 otg_set_peripheral(musb->xceiv->otg, NULL); 1946 otg_set_peripheral(musb->xceiv->otg, NULL);
1951 1947
1952 dev_dbg(musb->controller, "unregistering driver %s\n",
1953 driver ? driver->function : "(removed)");
1954
1955 musb->is_active = 0; 1948 musb->is_active = 0;
1956 musb->gadget_driver = NULL; 1949 musb->gadget_driver = NULL;
1957 musb_platform_try_idle(musb, 0); 1950 musb_platform_try_idle(musb, 0);
@@ -1975,7 +1968,7 @@ static int musb_gadget_stop(struct usb_gadget *g,
1975void musb_g_resume(struct musb *musb) 1968void musb_g_resume(struct musb *musb)
1976{ 1969{
1977 musb->is_suspended = 0; 1970 musb->is_suspended = 0;
1978 switch (musb->xceiv->state) { 1971 switch (musb->xceiv->otg->state) {
1979 case OTG_STATE_B_IDLE: 1972 case OTG_STATE_B_IDLE:
1980 break; 1973 break;
1981 case OTG_STATE_B_WAIT_ACON: 1974 case OTG_STATE_B_WAIT_ACON:
@@ -1989,7 +1982,7 @@ void musb_g_resume(struct musb *musb)
1989 break; 1982 break;
1990 default: 1983 default:
1991 WARNING("unhandled RESUME transition (%s)\n", 1984 WARNING("unhandled RESUME transition (%s)\n",
1992 usb_otg_state_string(musb->xceiv->state)); 1985 usb_otg_state_string(musb->xceiv->otg->state));
1993 } 1986 }
1994} 1987}
1995 1988
@@ -2001,10 +1994,10 @@ void musb_g_suspend(struct musb *musb)
2001 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 1994 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
2002 dev_dbg(musb->controller, "devctl %02x\n", devctl); 1995 dev_dbg(musb->controller, "devctl %02x\n", devctl);
2003 1996
2004 switch (musb->xceiv->state) { 1997 switch (musb->xceiv->otg->state) {
2005 case OTG_STATE_B_IDLE: 1998 case OTG_STATE_B_IDLE:
2006 if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) 1999 if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
2007 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 2000 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
2008 break; 2001 break;
2009 case OTG_STATE_B_PERIPHERAL: 2002 case OTG_STATE_B_PERIPHERAL:
2010 musb->is_suspended = 1; 2003 musb->is_suspended = 1;
@@ -2019,7 +2012,7 @@ void musb_g_suspend(struct musb *musb)
2019 * A_PERIPHERAL may need care too 2012 * A_PERIPHERAL may need care too
2020 */ 2013 */
2021 WARNING("unhandled SUSPEND transition (%s)\n", 2014 WARNING("unhandled SUSPEND transition (%s)\n",
2022 usb_otg_state_string(musb->xceiv->state)); 2015 usb_otg_state_string(musb->xceiv->otg->state));
2023 } 2016 }
2024} 2017}
2025 2018
@@ -2050,22 +2043,22 @@ void musb_g_disconnect(struct musb *musb)
2050 spin_lock(&musb->lock); 2043 spin_lock(&musb->lock);
2051 } 2044 }
2052 2045
2053 switch (musb->xceiv->state) { 2046 switch (musb->xceiv->otg->state) {
2054 default: 2047 default:
2055 dev_dbg(musb->controller, "Unhandled disconnect %s, setting a_idle\n", 2048 dev_dbg(musb->controller, "Unhandled disconnect %s, setting a_idle\n",
2056 usb_otg_state_string(musb->xceiv->state)); 2049 usb_otg_state_string(musb->xceiv->otg->state));
2057 musb->xceiv->state = OTG_STATE_A_IDLE; 2050 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
2058 MUSB_HST_MODE(musb); 2051 MUSB_HST_MODE(musb);
2059 break; 2052 break;
2060 case OTG_STATE_A_PERIPHERAL: 2053 case OTG_STATE_A_PERIPHERAL:
2061 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 2054 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
2062 MUSB_HST_MODE(musb); 2055 MUSB_HST_MODE(musb);
2063 break; 2056 break;
2064 case OTG_STATE_B_WAIT_ACON: 2057 case OTG_STATE_B_WAIT_ACON:
2065 case OTG_STATE_B_HOST: 2058 case OTG_STATE_B_HOST:
2066 case OTG_STATE_B_PERIPHERAL: 2059 case OTG_STATE_B_PERIPHERAL:
2067 case OTG_STATE_B_IDLE: 2060 case OTG_STATE_B_IDLE:
2068 musb->xceiv->state = OTG_STATE_B_IDLE; 2061 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
2069 break; 2062 break;
2070 case OTG_STATE_B_SRP_INIT: 2063 case OTG_STATE_B_SRP_INIT:
2071 break; 2064 break;
@@ -2090,9 +2083,12 @@ __acquires(musb->lock)
2090 : NULL 2083 : NULL
2091 ); 2084 );
2092 2085
2093 /* report disconnect, if we didn't already (flushing EP state) */ 2086 /* report reset, if we didn't already (flushing EP state) */
2094 if (musb->g.speed != USB_SPEED_UNKNOWN) 2087 if (musb->gadget_driver && musb->g.speed != USB_SPEED_UNKNOWN) {
2095 musb_g_disconnect(musb); 2088 spin_unlock(&musb->lock);
2089 usb_gadget_udc_reset(&musb->g, musb->gadget_driver);
2090 spin_lock(&musb->lock);
2091 }
2096 2092
2097 /* clear HR */ 2093 /* clear HR */
2098 else if (devctl & MUSB_DEVCTL_HR) 2094 else if (devctl & MUSB_DEVCTL_HR)
@@ -2125,13 +2121,13 @@ __acquires(musb->lock)
2125 * In that case, do not rely on devctl for setting 2121 * In that case, do not rely on devctl for setting
2126 * peripheral mode. 2122 * peripheral mode.
2127 */ 2123 */
2128 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 2124 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
2129 musb->g.is_a_peripheral = 0; 2125 musb->g.is_a_peripheral = 0;
2130 } else if (devctl & MUSB_DEVCTL_BDEVICE) { 2126 } else if (devctl & MUSB_DEVCTL_BDEVICE) {
2131 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; 2127 musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
2132 musb->g.is_a_peripheral = 0; 2128 musb->g.is_a_peripheral = 0;
2133 } else { 2129 } else {
2134 musb->xceiv->state = OTG_STATE_A_PERIPHERAL; 2130 musb->xceiv->otg->state = OTG_STATE_A_PERIPHERAL;
2135 musb->g.is_a_peripheral = 1; 2131 musb->g.is_a_peripheral = 1;
2136 } 2132 }
2137 2133
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 855793d701bb..23d474d3d7f4 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -2463,7 +2463,7 @@ static int musb_bus_suspend(struct usb_hcd *hcd)
2463 if (!is_host_active(musb)) 2463 if (!is_host_active(musb))
2464 return 0; 2464 return 0;
2465 2465
2466 switch (musb->xceiv->state) { 2466 switch (musb->xceiv->otg->state) {
2467 case OTG_STATE_A_SUSPEND: 2467 case OTG_STATE_A_SUSPEND:
2468 return 0; 2468 return 0;
2469 case OTG_STATE_A_WAIT_VRISE: 2469 case OTG_STATE_A_WAIT_VRISE:
@@ -2473,7 +2473,7 @@ static int musb_bus_suspend(struct usb_hcd *hcd)
2473 */ 2473 */
2474 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 2474 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
2475 if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) 2475 if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
2476 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 2476 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
2477 break; 2477 break;
2478 default: 2478 default:
2479 break; 2479 break;
@@ -2481,7 +2481,7 @@ static int musb_bus_suspend(struct usb_hcd *hcd)
2481 2481
2482 if (musb->is_active) { 2482 if (musb->is_active) {
2483 WARNING("trying to suspend as %s while active\n", 2483 WARNING("trying to suspend as %s while active\n",
2484 usb_otg_state_string(musb->xceiv->state)); 2484 usb_otg_state_string(musb->xceiv->otg->state));
2485 return -EBUSY; 2485 return -EBUSY;
2486 } else 2486 } else
2487 return 0; 2487 return 0;
@@ -2678,7 +2678,7 @@ int musb_host_setup(struct musb *musb, int power_budget)
2678 2678
2679 MUSB_HST_MODE(musb); 2679 MUSB_HST_MODE(musb);
2680 musb->xceiv->otg->default_a = 1; 2680 musb->xceiv->otg->default_a = 1;
2681 musb->xceiv->state = OTG_STATE_A_IDLE; 2681 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
2682 2682
2683 otg_set_host(musb->xceiv->otg, &hcd->self); 2683 otg_set_host(musb->xceiv->otg, &hcd->self);
2684 hcd->self.otg_port = 1; 2684 hcd->self.otg_port = 1;
diff --git a/drivers/usb/musb/musb_io.h b/drivers/usb/musb/musb_io.h
index eebeed78edd6..8a57a6f4b3a6 100644
--- a/drivers/usb/musb/musb_io.h
+++ b/drivers/usb/musb/musb_io.h
@@ -37,86 +37,32 @@
37 37
38#include <linux/io.h> 38#include <linux/io.h>
39 39
40#ifndef CONFIG_BLACKFIN 40#define musb_ep_select(_mbase, _epnum) musb->io.ep_select((_mbase), (_epnum))
41 41
42/* NOTE: these offsets are all in bytes */ 42/**
43 43 * struct musb_io - IO functions for MUSB
44static inline u16 musb_readw(const void __iomem *addr, unsigned offset) 44 * @quirks: platform specific flags
45 { return __raw_readw(addr + offset); } 45 * @ep_offset: platform specific function to get end point offset
46 46 * @ep_select: platform specific function to select end point
47static inline u32 musb_readl(const void __iomem *addr, unsigned offset) 47 * @fifo_offset: platform specific function to get fifo offset
48 { return __raw_readl(addr + offset); } 48 * @read_fifo: platform specific function to read fifo
49 49 * @write_fifo: platform specific function to write fifo
50
51static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data)
52 { __raw_writew(data, addr + offset); }
53
54static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data)
55 { __raw_writel(data, addr + offset); }
56
57
58#if defined(CONFIG_USB_MUSB_TUSB6010) || defined (CONFIG_USB_MUSB_TUSB6010_MODULE)
59
60/*
61 * TUSB6010 doesn't allow 8-bit access; 16-bit access is the minimum.
62 */ 50 */
63static inline u8 musb_readb(const void __iomem *addr, unsigned offset) 51struct musb_io {
64{ 52 u32 quirks;
65 u16 tmp; 53 u32 (*ep_offset)(u8 epnum, u16 offset);
66 u8 val; 54 void (*ep_select)(void __iomem *mbase, u8 epnum);
67 55 u32 (*fifo_offset)(u8 epnum);
68 tmp = __raw_readw(addr + (offset & ~1)); 56 void (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
69 if (offset & 1) 57 void (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
70 val = (tmp >> 8); 58};
71 else 59
72 val = tmp & 0xff; 60/* Do not add new entries here, add them the struct musb_io instead */
73 61extern u8 (*musb_readb)(const void __iomem *addr, unsigned offset);
74 return val; 62extern void (*musb_writeb)(void __iomem *addr, unsigned offset, u8 data);
75} 63extern u16 (*musb_readw)(const void __iomem *addr, unsigned offset);
76 64extern void (*musb_writew)(void __iomem *addr, unsigned offset, u16 data);
77static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data) 65extern u32 (*musb_readl)(const void __iomem *addr, unsigned offset);
78{ 66extern void (*musb_writel)(void __iomem *addr, unsigned offset, u32 data);
79 u16 tmp;
80
81 tmp = __raw_readw(addr + (offset & ~1));
82 if (offset & 1)
83 tmp = (data << 8) | (tmp & 0xff);
84 else
85 tmp = (tmp & 0xff00) | data;
86
87 __raw_writew(tmp, addr + (offset & ~1));
88}
89
90#else
91
92static inline u8 musb_readb(const void __iomem *addr, unsigned offset)
93 { return __raw_readb(addr + offset); }
94
95static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data)
96 { __raw_writeb(data, addr + offset); }
97
98#endif /* CONFIG_USB_MUSB_TUSB6010 */
99
100#else
101
102static inline u8 musb_readb(const void __iomem *addr, unsigned offset)
103 { return (u8) (bfin_read16(addr + offset)); }
104
105static inline u16 musb_readw(const void __iomem *addr, unsigned offset)
106 { return bfin_read16(addr + offset); }
107
108static inline u32 musb_readl(const void __iomem *addr, unsigned offset)
109 { return (u32) (bfin_read16(addr + offset)); }
110
111static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data)
112 { bfin_write16(addr + offset, (u16) data); }
113
114static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data)
115 { bfin_write16(addr + offset, data); }
116
117static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data)
118 { bfin_write16(addr + offset, (u16) data); }
119
120#endif /* CONFIG_BLACKFIN */
121 67
122#endif 68#endif
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index 37122a480bc1..11f0be07491e 100644
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
@@ -239,14 +239,6 @@
239#define MUSB_INDEX 0x0E /* 8 bit */ 239#define MUSB_INDEX 0x0E /* 8 bit */
240#define MUSB_TESTMODE 0x0F /* 8 bit */ 240#define MUSB_TESTMODE 0x0F /* 8 bit */
241 241
242/* Get offset for a given FIFO from musb->mregs */
243#if defined(CONFIG_USB_MUSB_TUSB6010) || \
244 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
245#define MUSB_FIFO_OFFSET(epnum) (0x200 + ((epnum) * 0x20))
246#else
247#define MUSB_FIFO_OFFSET(epnum) (0x20 + ((epnum) * 4))
248#endif
249
250/* 242/*
251 * Additional Control Registers 243 * Additional Control Registers
252 */ 244 */
@@ -295,21 +287,7 @@
295#define MUSB_FIFOSIZE 0x0F 287#define MUSB_FIFOSIZE 0x0F
296#define MUSB_CONFIGDATA MUSB_FIFOSIZE /* Re-used for EP0 */ 288#define MUSB_CONFIGDATA MUSB_FIFOSIZE /* Re-used for EP0 */
297 289
298/* Offsets to endpoint registers in indexed model (using INDEX register) */
299#define MUSB_INDEXED_OFFSET(_epnum, _offset) \
300 (0x10 + (_offset))
301
302/* Offsets to endpoint registers in flat models */
303#define MUSB_FLAT_OFFSET(_epnum, _offset) \
304 (0x100 + (0x10*(_epnum)) + (_offset))
305
306#if defined(CONFIG_USB_MUSB_TUSB6010) || \
307 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
308/* TUSB6010 EP0 configuration register is special */
309#define MUSB_TUSB_OFFSET(_epnum, _offset) \
310 (0x10 + _offset)
311#include "tusb6010.h" /* Needed "only" for TUSB_EP0_CONF */ 290#include "tusb6010.h" /* Needed "only" for TUSB_EP0_CONF */
312#endif
313 291
314#define MUSB_TXCSR_MODE 0x2000 292#define MUSB_TXCSR_MODE 0x2000
315 293
@@ -480,10 +458,6 @@ static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum)
480#define MUSB_INDEX USB_OFFSET(USB_INDEX) /* 8 bit */ 458#define MUSB_INDEX USB_OFFSET(USB_INDEX) /* 8 bit */
481#define MUSB_TESTMODE USB_OFFSET(USB_TESTMODE)/* 8 bit */ 459#define MUSB_TESTMODE USB_OFFSET(USB_TESTMODE)/* 8 bit */
482 460
483/* Get offset for a given FIFO from musb->mregs */
484#define MUSB_FIFO_OFFSET(epnum) \
485 (USB_OFFSET(USB_EP0_FIFO) + ((epnum) * 8))
486
487/* 461/*
488 * Additional Control Registers 462 * Additional Control Registers
489 */ 463 */
diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c
index e2d2d8c9891b..b072420e44f5 100644
--- a/drivers/usb/musb/musb_virthub.c
+++ b/drivers/usb/musb/musb_virthub.c
@@ -69,9 +69,10 @@ void musb_host_finish_resume(struct work_struct *work)
69 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; 69 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
70 usb_hcd_poll_rh_status(musb->hcd); 70 usb_hcd_poll_rh_status(musb->hcd);
71 /* NOTE: it might really be A_WAIT_BCON ... */ 71 /* NOTE: it might really be A_WAIT_BCON ... */
72 musb->xceiv->state = OTG_STATE_A_HOST; 72 musb->xceiv->otg->state = OTG_STATE_A_HOST;
73 73
74 spin_unlock_irqrestore(&musb->lock, flags); 74 spin_unlock_irqrestore(&musb->lock, flags);
75 musb_host_resume_root_hub(musb);
75} 76}
76 77
77void musb_port_suspend(struct musb *musb, bool do_suspend) 78void musb_port_suspend(struct musb *musb, bool do_suspend)
@@ -107,9 +108,9 @@ void musb_port_suspend(struct musb *musb, bool do_suspend)
107 dev_dbg(musb->controller, "Root port suspended, power %02x\n", power); 108 dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
108 109
109 musb->port1_status |= USB_PORT_STAT_SUSPEND; 110 musb->port1_status |= USB_PORT_STAT_SUSPEND;
110 switch (musb->xceiv->state) { 111 switch (musb->xceiv->otg->state) {
111 case OTG_STATE_A_HOST: 112 case OTG_STATE_A_HOST:
112 musb->xceiv->state = OTG_STATE_A_SUSPEND; 113 musb->xceiv->otg->state = OTG_STATE_A_SUSPEND;
113 musb->is_active = otg->host->b_hnp_enable; 114 musb->is_active = otg->host->b_hnp_enable;
114 if (musb->is_active) 115 if (musb->is_active)
115 mod_timer(&musb->otg_timer, jiffies 116 mod_timer(&musb->otg_timer, jiffies
@@ -118,13 +119,13 @@ void musb_port_suspend(struct musb *musb, bool do_suspend)
118 musb_platform_try_idle(musb, 0); 119 musb_platform_try_idle(musb, 0);
119 break; 120 break;
120 case OTG_STATE_B_HOST: 121 case OTG_STATE_B_HOST:
121 musb->xceiv->state = OTG_STATE_B_WAIT_ACON; 122 musb->xceiv->otg->state = OTG_STATE_B_WAIT_ACON;
122 musb->is_active = otg->host->b_hnp_enable; 123 musb->is_active = otg->host->b_hnp_enable;
123 musb_platform_try_idle(musb, 0); 124 musb_platform_try_idle(musb, 0);
124 break; 125 break;
125 default: 126 default:
126 dev_dbg(musb->controller, "bogus rh suspend? %s\n", 127 dev_dbg(musb->controller, "bogus rh suspend? %s\n",
127 usb_otg_state_string(musb->xceiv->state)); 128 usb_otg_state_string(musb->xceiv->otg->state));
128 } 129 }
129 } else if (power & MUSB_POWER_SUSPENDM) { 130 } else if (power & MUSB_POWER_SUSPENDM) {
130 power &= ~MUSB_POWER_SUSPENDM; 131 power &= ~MUSB_POWER_SUSPENDM;
@@ -145,7 +146,7 @@ void musb_port_reset(struct musb *musb, bool do_reset)
145 u8 power; 146 u8 power;
146 void __iomem *mbase = musb->mregs; 147 void __iomem *mbase = musb->mregs;
147 148
148 if (musb->xceiv->state == OTG_STATE_B_IDLE) { 149 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE) {
149 dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n"); 150 dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n");
150 musb->port1_status &= ~USB_PORT_STAT_RESET; 151 musb->port1_status &= ~USB_PORT_STAT_RESET;
151 return; 152 return;
@@ -224,24 +225,24 @@ void musb_root_disconnect(struct musb *musb)
224 usb_hcd_poll_rh_status(musb->hcd); 225 usb_hcd_poll_rh_status(musb->hcd);
225 musb->is_active = 0; 226 musb->is_active = 0;
226 227
227 switch (musb->xceiv->state) { 228 switch (musb->xceiv->otg->state) {
228 case OTG_STATE_A_SUSPEND: 229 case OTG_STATE_A_SUSPEND:
229 if (otg->host->b_hnp_enable) { 230 if (otg->host->b_hnp_enable) {
230 musb->xceiv->state = OTG_STATE_A_PERIPHERAL; 231 musb->xceiv->otg->state = OTG_STATE_A_PERIPHERAL;
231 musb->g.is_a_peripheral = 1; 232 musb->g.is_a_peripheral = 1;
232 break; 233 break;
233 } 234 }
234 /* FALLTHROUGH */ 235 /* FALLTHROUGH */
235 case OTG_STATE_A_HOST: 236 case OTG_STATE_A_HOST:
236 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 237 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
237 musb->is_active = 0; 238 musb->is_active = 0;
238 break; 239 break;
239 case OTG_STATE_A_WAIT_VFALL: 240 case OTG_STATE_A_WAIT_VFALL:
240 musb->xceiv->state = OTG_STATE_B_IDLE; 241 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
241 break; 242 break;
242 default: 243 default:
243 dev_dbg(musb->controller, "host disconnect (%s)\n", 244 dev_dbg(musb->controller, "host disconnect (%s)\n",
244 usb_otg_state_string(musb->xceiv->state)); 245 usb_otg_state_string(musb->xceiv->otg->state));
245 } 246 }
246} 247}
247 248
diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c
index e8e9f9aab203..ab7ec09a8afe 100644
--- a/drivers/usb/musb/musbhsdma.c
+++ b/drivers/usb/musb/musbhsdma.c
@@ -195,6 +195,7 @@ static int dma_channel_abort(struct dma_channel *channel)
195{ 195{
196 struct musb_dma_channel *musb_channel = channel->private_data; 196 struct musb_dma_channel *musb_channel = channel->private_data;
197 void __iomem *mbase = musb_channel->controller->base; 197 void __iomem *mbase = musb_channel->controller->base;
198 struct musb *musb = musb_channel->controller->private_data;
198 199
199 u8 bchannel = musb_channel->idx; 200 u8 bchannel = musb_channel->idx;
200 int offset; 201 int offset;
@@ -202,7 +203,7 @@ static int dma_channel_abort(struct dma_channel *channel)
202 203
203 if (channel->status == MUSB_DMA_STATUS_BUSY) { 204 if (channel->status == MUSB_DMA_STATUS_BUSY) {
204 if (musb_channel->transmit) { 205 if (musb_channel->transmit) {
205 offset = MUSB_EP_OFFSET(musb_channel->epnum, 206 offset = musb->io.ep_offset(musb_channel->epnum,
206 MUSB_TXCSR); 207 MUSB_TXCSR);
207 208
208 /* 209 /*
@@ -215,7 +216,7 @@ static int dma_channel_abort(struct dma_channel *channel)
215 csr &= ~MUSB_TXCSR_DMAMODE; 216 csr &= ~MUSB_TXCSR_DMAMODE;
216 musb_writew(mbase, offset, csr); 217 musb_writew(mbase, offset, csr);
217 } else { 218 } else {
218 offset = MUSB_EP_OFFSET(musb_channel->epnum, 219 offset = musb->io.ep_offset(musb_channel->epnum,
219 MUSB_RXCSR); 220 MUSB_RXCSR);
220 221
221 csr = musb_readw(mbase, offset); 222 csr = musb_readw(mbase, offset);
@@ -326,7 +327,7 @@ static irqreturn_t dma_controller_irq(int irq, void *private_data)
326 (musb_channel->max_packet_sz - 1))) 327 (musb_channel->max_packet_sz - 1)))
327 ) { 328 ) {
328 u8 epnum = musb_channel->epnum; 329 u8 epnum = musb_channel->epnum;
329 int offset = MUSB_EP_OFFSET(epnum, 330 int offset = musb->io.ep_offset(epnum,
330 MUSB_TXCSR); 331 MUSB_TXCSR);
331 u16 txcsr; 332 u16 txcsr;
332 333
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index d369bf1f3936..763649eb4987 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -65,15 +65,15 @@ static void musb_do_idle(unsigned long _musb)
65 65
66 spin_lock_irqsave(&musb->lock, flags); 66 spin_lock_irqsave(&musb->lock, flags);
67 67
68 switch (musb->xceiv->state) { 68 switch (musb->xceiv->otg->state) {
69 case OTG_STATE_A_WAIT_BCON: 69 case OTG_STATE_A_WAIT_BCON:
70 70
71 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 71 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
72 if (devctl & MUSB_DEVCTL_BDEVICE) { 72 if (devctl & MUSB_DEVCTL_BDEVICE) {
73 musb->xceiv->state = OTG_STATE_B_IDLE; 73 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
74 MUSB_DEV_MODE(musb); 74 MUSB_DEV_MODE(musb);
75 } else { 75 } else {
76 musb->xceiv->state = OTG_STATE_A_IDLE; 76 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
77 MUSB_HST_MODE(musb); 77 MUSB_HST_MODE(musb);
78 } 78 }
79 break; 79 break;
@@ -90,15 +90,15 @@ static void musb_do_idle(unsigned long _musb)
90 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; 90 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
91 usb_hcd_poll_rh_status(musb->hcd); 91 usb_hcd_poll_rh_status(musb->hcd);
92 /* NOTE: it might really be A_WAIT_BCON ... */ 92 /* NOTE: it might really be A_WAIT_BCON ... */
93 musb->xceiv->state = OTG_STATE_A_HOST; 93 musb->xceiv->otg->state = OTG_STATE_A_HOST;
94 } 94 }
95 break; 95 break;
96 case OTG_STATE_A_HOST: 96 case OTG_STATE_A_HOST:
97 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 97 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
98 if (devctl & MUSB_DEVCTL_BDEVICE) 98 if (devctl & MUSB_DEVCTL_BDEVICE)
99 musb->xceiv->state = OTG_STATE_B_IDLE; 99 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
100 else 100 else
101 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 101 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
102 default: 102 default:
103 break; 103 break;
104 } 104 }
@@ -116,9 +116,9 @@ static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
116 116
117 /* Never idle if active, or when VBUS timeout is not set as host */ 117 /* Never idle if active, or when VBUS timeout is not set as host */
118 if (musb->is_active || ((musb->a_wait_bcon == 0) 118 if (musb->is_active || ((musb->a_wait_bcon == 0)
119 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { 119 && (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON))) {
120 dev_dbg(musb->controller, "%s active, deleting timer\n", 120 dev_dbg(musb->controller, "%s active, deleting timer\n",
121 usb_otg_state_string(musb->xceiv->state)); 121 usb_otg_state_string(musb->xceiv->otg->state));
122 del_timer(&musb_idle_timer); 122 del_timer(&musb_idle_timer);
123 last_timer = jiffies; 123 last_timer = jiffies;
124 return; 124 return;
@@ -135,7 +135,7 @@ static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
135 last_timer = timeout; 135 last_timer = timeout;
136 136
137 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n", 137 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
138 usb_otg_state_string(musb->xceiv->state), 138 usb_otg_state_string(musb->xceiv->otg->state),
139 (unsigned long)jiffies_to_msecs(timeout - jiffies)); 139 (unsigned long)jiffies_to_msecs(timeout - jiffies));
140 mod_timer(&musb_idle_timer, timeout); 140 mod_timer(&musb_idle_timer, timeout);
141} 141}
@@ -153,7 +153,7 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
153 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 153 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
154 154
155 if (is_on) { 155 if (is_on) {
156 if (musb->xceiv->state == OTG_STATE_A_IDLE) { 156 if (musb->xceiv->otg->state == OTG_STATE_A_IDLE) {
157 int loops = 100; 157 int loops = 100;
158 /* start the session */ 158 /* start the session */
159 devctl |= MUSB_DEVCTL_SESSION; 159 devctl |= MUSB_DEVCTL_SESSION;
@@ -162,7 +162,8 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
162 * Wait for the musb to set as A device to enable the 162 * Wait for the musb to set as A device to enable the
163 * VBUS 163 * VBUS
164 */ 164 */
165 while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) { 165 while (musb_readb(musb->mregs, MUSB_DEVCTL) &
166 MUSB_DEVCTL_BDEVICE) {
166 167
167 mdelay(5); 168 mdelay(5);
168 cpu_relax(); 169 cpu_relax();
@@ -179,7 +180,7 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
179 } else { 180 } else {
180 musb->is_active = 1; 181 musb->is_active = 1;
181 otg->default_a = 1; 182 otg->default_a = 1;
182 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 183 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
183 devctl |= MUSB_DEVCTL_SESSION; 184 devctl |= MUSB_DEVCTL_SESSION;
184 MUSB_HST_MODE(musb); 185 MUSB_HST_MODE(musb);
185 } 186 }
@@ -191,7 +192,7 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
191 */ 192 */
192 193
193 otg->default_a = 0; 194 otg->default_a = 0;
194 musb->xceiv->state = OTG_STATE_B_IDLE; 195 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
195 devctl &= ~MUSB_DEVCTL_SESSION; 196 devctl &= ~MUSB_DEVCTL_SESSION;
196 197
197 MUSB_DEV_MODE(musb); 198 MUSB_DEV_MODE(musb);
@@ -200,7 +201,7 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
200 201
201 dev_dbg(musb->controller, "VBUS %s, devctl %02x " 202 dev_dbg(musb->controller, "VBUS %s, devctl %02x "
202 /* otg %3x conf %08x prcm %08x */ "\n", 203 /* otg %3x conf %08x prcm %08x */ "\n",
203 usb_otg_state_string(musb->xceiv->state), 204 usb_otg_state_string(musb->xceiv->otg->state),
204 musb_readb(musb->mregs, MUSB_DEVCTL)); 205 musb_readb(musb->mregs, MUSB_DEVCTL));
205} 206}
206 207
@@ -265,7 +266,7 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue)
265 dev_dbg(dev, "ID GND\n"); 266 dev_dbg(dev, "ID GND\n");
266 267
267 otg->default_a = true; 268 otg->default_a = true;
268 musb->xceiv->state = OTG_STATE_A_IDLE; 269 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
269 musb->xceiv->last_event = USB_EVENT_ID; 270 musb->xceiv->last_event = USB_EVENT_ID;
270 if (musb->gadget_driver) { 271 if (musb->gadget_driver) {
271 pm_runtime_get_sync(dev); 272 pm_runtime_get_sync(dev);
@@ -279,7 +280,7 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue)
279 dev_dbg(dev, "VBUS Connect\n"); 280 dev_dbg(dev, "VBUS Connect\n");
280 281
281 otg->default_a = false; 282 otg->default_a = false;
282 musb->xceiv->state = OTG_STATE_B_IDLE; 283 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
283 musb->xceiv->last_event = USB_EVENT_VBUS; 284 musb->xceiv->last_event = USB_EVENT_VBUS;
284 if (musb->gadget_driver) 285 if (musb->gadget_driver)
285 pm_runtime_get_sync(dev); 286 pm_runtime_get_sync(dev);
@@ -518,10 +519,8 @@ static int omap2430_probe(struct platform_device *pdev)
518 int ret = -ENOMEM; 519 int ret = -ENOMEM;
519 520
520 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 521 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
521 if (!glue) { 522 if (!glue)
522 dev_err(&pdev->dev, "failed to allocate glue context\n");
523 goto err0; 523 goto err0;
524 }
525 524
526 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 525 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
527 if (!musb) { 526 if (!musb) {
@@ -543,25 +542,16 @@ static int omap2430_probe(struct platform_device *pdev)
543 struct platform_device *control_pdev; 542 struct platform_device *control_pdev;
544 543
545 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 544 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
546 if (!pdata) { 545 if (!pdata)
547 dev_err(&pdev->dev,
548 "failed to allocate musb platform data\n");
549 goto err2; 546 goto err2;
550 }
551 547
552 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 548 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
553 if (!data) { 549 if (!data)
554 dev_err(&pdev->dev,
555 "failed to allocate musb board data\n");
556 goto err2; 550 goto err2;
557 }
558 551
559 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL); 552 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
560 if (!config) { 553 if (!config)
561 dev_err(&pdev->dev,
562 "failed to allocate musb hdrc config\n");
563 goto err2; 554 goto err2;
564 }
565 555
566 of_property_read_u32(np, "mode", (u32 *)&pdata->mode); 556 of_property_read_u32(np, "mode", (u32 *)&pdata->mode);
567 of_property_read_u32(np, "interface-type", 557 of_property_read_u32(np, "interface-type",
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
index 2daa779f1382..3a5ffd575438 100644
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -126,6 +126,52 @@ static void tusb_wbus_quirk(struct musb *musb, int enabled)
126 } 126 }
127} 127}
128 128
129static u32 tusb_fifo_offset(u8 epnum)
130{
131 return 0x200 + (epnum * 0x20);
132}
133
134static u32 tusb_ep_offset(u8 epnum, u16 offset)
135{
136 return 0x10 + offset;
137}
138
139/* TUSB mapping: "flat" plus ep0 special cases */
140static void tusb_ep_select(void __iomem *mbase, u8 epnum)
141{
142 musb_writeb(mbase, MUSB_INDEX, epnum);
143}
144
145/*
146 * TUSB6010 doesn't allow 8-bit access; 16-bit access is the minimum.
147 */
148static u8 tusb_readb(const void __iomem *addr, unsigned offset)
149{
150 u16 tmp;
151 u8 val;
152
153 tmp = __raw_readw(addr + (offset & ~1));
154 if (offset & 1)
155 val = (tmp >> 8);
156 else
157 val = tmp & 0xff;
158
159 return val;
160}
161
162static void tusb_writeb(void __iomem *addr, unsigned offset, u8 data)
163{
164 u16 tmp;
165
166 tmp = __raw_readw(addr + (offset & ~1));
167 if (offset & 1)
168 tmp = (data << 8) | (tmp & 0xff);
169 else
170 tmp = (tmp & 0xff00) | data;
171
172 __raw_writew(tmp, addr + (offset & ~1));
173}
174
129/* 175/*
130 * TUSB 6010 may use a parallel bus that doesn't support byte ops; 176 * TUSB 6010 may use a parallel bus that doesn't support byte ops;
131 * so both loading and unloading FIFOs need explicit byte counts. 177 * so both loading and unloading FIFOs need explicit byte counts.
@@ -173,7 +219,7 @@ static inline void tusb_fifo_read_unaligned(void __iomem *fifo,
173 } 219 }
174} 220}
175 221
176void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf) 222static void tusb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf)
177{ 223{
178 struct musb *musb = hw_ep->musb; 224 struct musb *musb = hw_ep->musb;
179 void __iomem *ep_conf = hw_ep->conf; 225 void __iomem *ep_conf = hw_ep->conf;
@@ -223,7 +269,7 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf)
223 tusb_fifo_write_unaligned(fifo, buf, len); 269 tusb_fifo_write_unaligned(fifo, buf, len);
224} 270}
225 271
226void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf) 272static void tusb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf)
227{ 273{
228 struct musb *musb = hw_ep->musb; 274 struct musb *musb = hw_ep->musb;
229 void __iomem *ep_conf = hw_ep->conf; 275 void __iomem *ep_conf = hw_ep->conf;
@@ -415,13 +461,13 @@ static void musb_do_idle(unsigned long _musb)
415 461
416 spin_lock_irqsave(&musb->lock, flags); 462 spin_lock_irqsave(&musb->lock, flags);
417 463
418 switch (musb->xceiv->state) { 464 switch (musb->xceiv->otg->state) {
419 case OTG_STATE_A_WAIT_BCON: 465 case OTG_STATE_A_WAIT_BCON:
420 if ((musb->a_wait_bcon != 0) 466 if ((musb->a_wait_bcon != 0)
421 && (musb->idle_timeout == 0 467 && (musb->idle_timeout == 0
422 || time_after(jiffies, musb->idle_timeout))) { 468 || time_after(jiffies, musb->idle_timeout))) {
423 dev_dbg(musb->controller, "Nothing connected %s, turning off VBUS\n", 469 dev_dbg(musb->controller, "Nothing connected %s, turning off VBUS\n",
424 usb_otg_state_string(musb->xceiv->state)); 470 usb_otg_state_string(musb->xceiv->otg->state));
425 } 471 }
426 /* FALLTHROUGH */ 472 /* FALLTHROUGH */
427 case OTG_STATE_A_IDLE: 473 case OTG_STATE_A_IDLE:
@@ -474,9 +520,9 @@ static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
474 520
475 /* Never idle if active, or when VBUS timeout is not set as host */ 521 /* Never idle if active, or when VBUS timeout is not set as host */
476 if (musb->is_active || ((musb->a_wait_bcon == 0) 522 if (musb->is_active || ((musb->a_wait_bcon == 0)
477 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { 523 && (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON))) {
478 dev_dbg(musb->controller, "%s active, deleting timer\n", 524 dev_dbg(musb->controller, "%s active, deleting timer\n",
479 usb_otg_state_string(musb->xceiv->state)); 525 usb_otg_state_string(musb->xceiv->otg->state));
480 del_timer(&musb_idle_timer); 526 del_timer(&musb_idle_timer);
481 last_timer = jiffies; 527 last_timer = jiffies;
482 return; 528 return;
@@ -493,7 +539,7 @@ static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
493 last_timer = timeout; 539 last_timer = timeout;
494 540
495 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n", 541 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
496 usb_otg_state_string(musb->xceiv->state), 542 usb_otg_state_string(musb->xceiv->otg->state),
497 (unsigned long)jiffies_to_msecs(timeout - jiffies)); 543 (unsigned long)jiffies_to_msecs(timeout - jiffies));
498 mod_timer(&musb_idle_timer, timeout); 544 mod_timer(&musb_idle_timer, timeout);
499} 545}
@@ -524,7 +570,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
524 if (is_on) { 570 if (is_on) {
525 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE); 571 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE);
526 otg->default_a = 1; 572 otg->default_a = 1;
527 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 573 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
528 devctl |= MUSB_DEVCTL_SESSION; 574 devctl |= MUSB_DEVCTL_SESSION;
529 575
530 conf |= TUSB_DEV_CONF_USB_HOST_MODE; 576 conf |= TUSB_DEV_CONF_USB_HOST_MODE;
@@ -537,16 +583,16 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
537 /* If ID pin is grounded, we want to be a_idle */ 583 /* If ID pin is grounded, we want to be a_idle */
538 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); 584 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
539 if (!(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) { 585 if (!(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
540 switch (musb->xceiv->state) { 586 switch (musb->xceiv->otg->state) {
541 case OTG_STATE_A_WAIT_VRISE: 587 case OTG_STATE_A_WAIT_VRISE:
542 case OTG_STATE_A_WAIT_BCON: 588 case OTG_STATE_A_WAIT_BCON:
543 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 589 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
544 break; 590 break;
545 case OTG_STATE_A_WAIT_VFALL: 591 case OTG_STATE_A_WAIT_VFALL:
546 musb->xceiv->state = OTG_STATE_A_IDLE; 592 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
547 break; 593 break;
548 default: 594 default:
549 musb->xceiv->state = OTG_STATE_A_IDLE; 595 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
550 } 596 }
551 musb->is_active = 0; 597 musb->is_active = 0;
552 otg->default_a = 1; 598 otg->default_a = 1;
@@ -554,7 +600,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
554 } else { 600 } else {
555 musb->is_active = 0; 601 musb->is_active = 0;
556 otg->default_a = 0; 602 otg->default_a = 0;
557 musb->xceiv->state = OTG_STATE_B_IDLE; 603 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
558 MUSB_DEV_MODE(musb); 604 MUSB_DEV_MODE(musb);
559 } 605 }
560 606
@@ -569,7 +615,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
569 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 615 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
570 616
571 dev_dbg(musb->controller, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n", 617 dev_dbg(musb->controller, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n",
572 usb_otg_state_string(musb->xceiv->state), 618 usb_otg_state_string(musb->xceiv->otg->state),
573 musb_readb(musb->mregs, MUSB_DEVCTL), 619 musb_readb(musb->mregs, MUSB_DEVCTL),
574 musb_readl(tbase, TUSB_DEV_OTG_STAT), 620 musb_readl(tbase, TUSB_DEV_OTG_STAT),
575 conf, prcm); 621 conf, prcm);
@@ -668,23 +714,23 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
668 714
669 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) { 715 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) {
670 dev_dbg(musb->controller, "Forcing disconnect (no interrupt)\n"); 716 dev_dbg(musb->controller, "Forcing disconnect (no interrupt)\n");
671 if (musb->xceiv->state != OTG_STATE_B_IDLE) { 717 if (musb->xceiv->otg->state != OTG_STATE_B_IDLE) {
672 /* INTR_DISCONNECT can hide... */ 718 /* INTR_DISCONNECT can hide... */
673 musb->xceiv->state = OTG_STATE_B_IDLE; 719 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
674 musb->int_usb |= MUSB_INTR_DISCONNECT; 720 musb->int_usb |= MUSB_INTR_DISCONNECT;
675 } 721 }
676 musb->is_active = 0; 722 musb->is_active = 0;
677 } 723 }
678 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n", 724 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n",
679 usb_otg_state_string(musb->xceiv->state), otg_stat); 725 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
680 idle_timeout = jiffies + (1 * HZ); 726 idle_timeout = jiffies + (1 * HZ);
681 schedule_work(&musb->irq_work); 727 schedule_work(&musb->irq_work);
682 728
683 } else /* A-dev state machine */ { 729 } else /* A-dev state machine */ {
684 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n", 730 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n",
685 usb_otg_state_string(musb->xceiv->state), otg_stat); 731 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
686 732
687 switch (musb->xceiv->state) { 733 switch (musb->xceiv->otg->state) {
688 case OTG_STATE_A_IDLE: 734 case OTG_STATE_A_IDLE:
689 dev_dbg(musb->controller, "Got SRP, turning on VBUS\n"); 735 dev_dbg(musb->controller, "Got SRP, turning on VBUS\n");
690 musb_platform_set_vbus(musb, 1); 736 musb_platform_set_vbus(musb, 1);
@@ -731,9 +777,9 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
731 u8 devctl; 777 u8 devctl;
732 778
733 dev_dbg(musb->controller, "%s timer, %03x\n", 779 dev_dbg(musb->controller, "%s timer, %03x\n",
734 usb_otg_state_string(musb->xceiv->state), otg_stat); 780 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
735 781
736 switch (musb->xceiv->state) { 782 switch (musb->xceiv->otg->state) {
737 case OTG_STATE_A_WAIT_VRISE: 783 case OTG_STATE_A_WAIT_VRISE:
738 /* VBUS has probably been valid for a while now, 784 /* VBUS has probably been valid for a while now,
739 * but may well have bounced out of range a bit 785 * but may well have bounced out of range a bit
@@ -745,7 +791,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
745 dev_dbg(musb->controller, "devctl %02x\n", devctl); 791 dev_dbg(musb->controller, "devctl %02x\n", devctl);
746 break; 792 break;
747 } 793 }
748 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 794 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
749 musb->is_active = 0; 795 musb->is_active = 0;
750 idle_timeout = jiffies 796 idle_timeout = jiffies
751 + msecs_to_jiffies(musb->a_wait_bcon); 797 + msecs_to_jiffies(musb->a_wait_bcon);
@@ -1135,9 +1181,17 @@ static int tusb_musb_exit(struct musb *musb)
1135} 1181}
1136 1182
1137static const struct musb_platform_ops tusb_ops = { 1183static const struct musb_platform_ops tusb_ops = {
1184 .quirks = MUSB_IN_TUSB,
1138 .init = tusb_musb_init, 1185 .init = tusb_musb_init,
1139 .exit = tusb_musb_exit, 1186 .exit = tusb_musb_exit,
1140 1187
1188 .ep_offset = tusb_ep_offset,
1189 .ep_select = tusb_ep_select,
1190 .fifo_offset = tusb_fifo_offset,
1191 .readb = tusb_readb,
1192 .writeb = tusb_writeb,
1193 .read_fifo = tusb_read_fifo,
1194 .write_fifo = tusb_write_fifo,
1141 .enable = tusb_musb_enable, 1195 .enable = tusb_musb_enable,
1142 .disable = tusb_musb_disable, 1196 .disable = tusb_musb_disable,
1143 1197
@@ -1164,10 +1218,8 @@ static int tusb_probe(struct platform_device *pdev)
1164 int ret; 1218 int ret;
1165 1219
1166 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 1220 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
1167 if (!glue) { 1221 if (!glue)
1168 dev_err(&pdev->dev, "failed to allocate glue context\n");
1169 return -ENOMEM; 1222 return -ENOMEM;
1170 }
1171 1223
1172 glue->dev = &pdev->dev; 1224 glue->dev = &pdev->dev;
1173 1225
diff --git a/drivers/usb/musb/ux500.c b/drivers/usb/musb/ux500.c
index dc666e96f45f..abf72728825f 100644
--- a/drivers/usb/musb/ux500.c
+++ b/drivers/usb/musb/ux500.c
@@ -56,7 +56,7 @@ static void ux500_musb_set_vbus(struct musb *musb, int is_on)
56 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 56 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
57 57
58 if (is_on) { 58 if (is_on) {
59 if (musb->xceiv->state == OTG_STATE_A_IDLE) { 59 if (musb->xceiv->otg->state == OTG_STATE_A_IDLE) {
60 /* start the session */ 60 /* start the session */
61 devctl |= MUSB_DEVCTL_SESSION; 61 devctl |= MUSB_DEVCTL_SESSION;
62 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 62 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
@@ -76,7 +76,7 @@ static void ux500_musb_set_vbus(struct musb *musb, int is_on)
76 } else { 76 } else {
77 musb->is_active = 1; 77 musb->is_active = 1;
78 musb->xceiv->otg->default_a = 1; 78 musb->xceiv->otg->default_a = 1;
79 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 79 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
80 devctl |= MUSB_DEVCTL_SESSION; 80 devctl |= MUSB_DEVCTL_SESSION;
81 MUSB_HST_MODE(musb); 81 MUSB_HST_MODE(musb);
82 } 82 }
@@ -102,7 +102,7 @@ static void ux500_musb_set_vbus(struct musb *musb, int is_on)
102 mdelay(200); 102 mdelay(200);
103 103
104 dev_dbg(musb->controller, "VBUS %s, devctl %02x\n", 104 dev_dbg(musb->controller, "VBUS %s, devctl %02x\n",
105 usb_otg_state_string(musb->xceiv->state), 105 usb_otg_state_string(musb->xceiv->otg->state),
106 musb_readb(musb->mregs, MUSB_DEVCTL)); 106 musb_readb(musb->mregs, MUSB_DEVCTL));
107} 107}
108 108
@@ -112,7 +112,7 @@ static int musb_otg_notifications(struct notifier_block *nb,
112 struct musb *musb = container_of(nb, struct musb, nb); 112 struct musb *musb = container_of(nb, struct musb, nb);
113 113
114 dev_dbg(musb->controller, "musb_otg_notifications %ld %s\n", 114 dev_dbg(musb->controller, "musb_otg_notifications %ld %s\n",
115 event, usb_otg_state_string(musb->xceiv->state)); 115 event, usb_otg_state_string(musb->xceiv->otg->state));
116 116
117 switch (event) { 117 switch (event) {
118 case UX500_MUSB_ID: 118 case UX500_MUSB_ID:
@@ -127,7 +127,7 @@ static int musb_otg_notifications(struct notifier_block *nb,
127 if (is_host_active(musb)) 127 if (is_host_active(musb))
128 ux500_musb_set_vbus(musb, 0); 128 ux500_musb_set_vbus(musb, 0);
129 else 129 else
130 musb->xceiv->state = OTG_STATE_B_IDLE; 130 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
131 break; 131 break;
132 default: 132 default:
133 dev_dbg(musb->controller, "ID float\n"); 133 dev_dbg(musb->controller, "ID float\n");
@@ -188,8 +188,10 @@ static int ux500_musb_exit(struct musb *musb)
188} 188}
189 189
190static const struct musb_platform_ops ux500_ops = { 190static const struct musb_platform_ops ux500_ops = {
191 .quirks = MUSB_INDEXED_EP,
191 .init = ux500_musb_init, 192 .init = ux500_musb_init,
192 .exit = ux500_musb_exit, 193 .exit = ux500_musb_exit,
194 .fifo_mode = 5,
193 195
194 .set_vbus = ux500_musb_set_vbus, 196 .set_vbus = ux500_musb_set_vbus,
195}; 197};
@@ -247,10 +249,8 @@ static int ux500_probe(struct platform_device *pdev)
247 } 249 }
248 250
249 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 251 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
250 if (!glue) { 252 if (!glue)
251 dev_err(&pdev->dev, "failed to allocate glue context\n");
252 goto err0; 253 goto err0;
253 }
254 254
255 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 255 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
256 if (!musb) { 256 if (!musb) {
diff --git a/drivers/usb/musb/ux500_dma.c b/drivers/usb/musb/ux500_dma.c
index 221faed9f074..e93845c26bdb 100644
--- a/drivers/usb/musb/ux500_dma.c
+++ b/drivers/usb/musb/ux500_dma.c
@@ -91,9 +91,9 @@ static bool ux500_configure_channel(struct dma_channel *channel,
91 struct scatterlist sg; 91 struct scatterlist sg;
92 struct dma_slave_config slave_conf; 92 struct dma_slave_config slave_conf;
93 enum dma_slave_buswidth addr_width; 93 enum dma_slave_buswidth addr_width;
94 dma_addr_t usb_fifo_addr = (MUSB_FIFO_OFFSET(hw_ep->epnum) +
95 ux500_channel->controller->phy_base);
96 struct musb *musb = ux500_channel->controller->private_data; 94 struct musb *musb = ux500_channel->controller->private_data;
95 dma_addr_t usb_fifo_addr = (musb->io.fifo_offset(hw_ep->epnum) +
96 ux500_channel->controller->phy_base);
97 97
98 dev_dbg(musb->controller, 98 dev_dbg(musb->controller,
99 "packet_sz=%d, mode=%d, dma_addr=0x%llx, len=%d is_tx=%d\n", 99 "packet_sz=%d, mode=%d, dma_addr=0x%llx, len=%d is_tx=%d\n",
@@ -121,8 +121,7 @@ static bool ux500_configure_channel(struct dma_channel *channel,
121 slave_conf.dst_maxburst = 16; 121 slave_conf.dst_maxburst = 16;
122 slave_conf.device_fc = false; 122 slave_conf.device_fc = false;
123 123
124 dma_chan->device->device_control(dma_chan, DMA_SLAVE_CONFIG, 124 dmaengine_slave_config(dma_chan, &slave_conf);
125 (unsigned long) &slave_conf);
126 125
127 dma_desc = dmaengine_prep_slave_sg(dma_chan, &sg, 1, direction, 126 dma_desc = dmaengine_prep_slave_sg(dma_chan, &sg, 1, direction,
128 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 127 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
@@ -246,9 +245,7 @@ static int ux500_dma_channel_abort(struct dma_channel *channel)
246 musb_writew(epio, MUSB_RXCSR, csr); 245 musb_writew(epio, MUSB_RXCSR, csr);
247 } 246 }
248 247
249 ux500_channel->dma_chan->device-> 248 dmaengine_terminate_all(ux500_channel->dma_chan);
250 device_control(ux500_channel->dma_chan,
251 DMA_TERMINATE_ALL, 0);
252 channel->status = MUSB_DMA_STATUS_FREE; 249 channel->status = MUSB_DMA_STATUS_FREE;
253 } 250 }
254 return 0; 251 return 0;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-13 17:16:51 -0500