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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2009-11-18 14:54:32 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2009-12-11 14:55:25 -0500
commit46034dca515bc4ddca0399ae58106d1f5f0d809f (patch)
treeea4a13b7f5ce2099470ed0d888cabf5cde0004f4 /drivers/usb/musb/musb_gadget_ep0.c
parent47e9760529a9823be59d879f726acdc7e2fcbe11 (diff)
USB: musb_gadget_ep0: stop abusing musb_gadget_set_halt()
Stop playing with musb->lock and abusing musb_gadget_set_halt() in the code clearing the endpoint halt feature -- instead, manipulate the registers directly. While at it, get rid uf unneeded line breaks and over-indentation in the code setting the endpoint halt feature. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/musb/musb_gadget_ep0.c')
-rw-r--r--drivers/usb/musb/musb_gadget_ep0.c63
1 files changed, 38 insertions, 25 deletions
diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c
index c63aff110c45..8fba3f11e473 100644
--- a/drivers/usb/musb/musb_gadget_ep0.c
+++ b/drivers/usb/musb/musb_gadget_ep0.c
@@ -257,19 +257,25 @@ __acquires(musb->lock)
257 case USB_RECIP_INTERFACE: 257 case USB_RECIP_INTERFACE:
258 break; 258 break;
259 case USB_RECIP_ENDPOINT:{ 259 case USB_RECIP_ENDPOINT:{
260 const u8 num = ctrlrequest->wIndex & 0x0f; 260 const u8 epnum =
261 struct musb_ep *musb_ep; 261 ctrlrequest->wIndex & 0x0f;
262 struct musb_ep *musb_ep;
263 struct musb_hw_ep *ep;
264 void __iomem *regs;
265 int is_in;
266 u16 csr;
262 267
263 if (num == 0 268 if (epnum == 0 || epnum >= MUSB_C_NUM_EPS ||
264 || num >= MUSB_C_NUM_EPS 269 ctrlrequest->wValue != USB_ENDPOINT_HALT)
265 || ctrlrequest->wValue
266 != USB_ENDPOINT_HALT)
267 break; 270 break;
268 271
269 if (ctrlrequest->wIndex & USB_DIR_IN) 272 ep = musb->endpoints + epnum;
270 musb_ep = &musb->endpoints[num].ep_in; 273 regs = ep->regs;
274 is_in = ctrlrequest->wIndex & USB_DIR_IN;
275 if (is_in)
276 musb_ep = &ep->ep_in;
271 else 277 else
272 musb_ep = &musb->endpoints[num].ep_out; 278 musb_ep = &ep->ep_out;
273 if (!musb_ep->desc) 279 if (!musb_ep->desc)
274 break; 280 break;
275 281
@@ -278,10 +284,23 @@ __acquires(musb->lock)
278 if (musb_ep->wedged) 284 if (musb_ep->wedged)
279 break; 285 break;
280 286
281 /* REVISIT do it directly, no locking games */ 287 musb_ep_select(mbase, epnum);
282 spin_unlock(&musb->lock); 288 if (is_in) {
283 musb_gadget_set_halt(&musb_ep->end_point, 0); 289 csr = musb_readw(regs, MUSB_TXCSR);
284 spin_lock(&musb->lock); 290 csr |= MUSB_TXCSR_CLRDATATOG |
291 MUSB_TXCSR_P_WZC_BITS;
292 csr &= ~(MUSB_TXCSR_P_SENDSTALL |
293 MUSB_TXCSR_P_SENTSTALL |
294 MUSB_TXCSR_TXPKTRDY);
295 musb_writew(regs, MUSB_TXCSR, csr);
296 } else {
297 csr = musb_readw(regs, MUSB_RXCSR);
298 csr |= MUSB_RXCSR_CLRDATATOG |
299 MUSB_RXCSR_P_WZC_BITS;
300 csr &= ~(MUSB_RXCSR_P_SENDSTALL |
301 MUSB_RXCSR_P_SENTSTALL);
302 musb_writew(regs, MUSB_RXCSR, csr);
303 }
285 304
286 /* select ep0 again */ 305 /* select ep0 again */
287 musb_ep_select(mbase, 0); 306 musb_ep_select(mbase, 0);
@@ -377,10 +396,8 @@ stall:
377 int is_in; 396 int is_in;
378 u16 csr; 397 u16 csr;
379 398
380 if (epnum == 0 399 if (epnum == 0 || epnum >= MUSB_C_NUM_EPS ||
381 || epnum >= MUSB_C_NUM_EPS 400 ctrlrequest->wValue != USB_ENDPOINT_HALT)
382 || ctrlrequest->wValue
383 != USB_ENDPOINT_HALT)
384 break; 401 break;
385 402
386 ep = musb->endpoints + epnum; 403 ep = musb->endpoints + epnum;
@@ -395,24 +412,20 @@ stall:
395 412
396 musb_ep_select(mbase, epnum); 413 musb_ep_select(mbase, epnum);
397 if (is_in) { 414 if (is_in) {
398 csr = musb_readw(regs, 415 csr = musb_readw(regs, MUSB_TXCSR);
399 MUSB_TXCSR);
400 if (csr & MUSB_TXCSR_FIFONOTEMPTY) 416 if (csr & MUSB_TXCSR_FIFONOTEMPTY)
401 csr |= MUSB_TXCSR_FLUSHFIFO; 417 csr |= MUSB_TXCSR_FLUSHFIFO;
402 csr |= MUSB_TXCSR_P_SENDSTALL 418 csr |= MUSB_TXCSR_P_SENDSTALL
403 | MUSB_TXCSR_CLRDATATOG 419 | MUSB_TXCSR_CLRDATATOG
404 | MUSB_TXCSR_P_WZC_BITS; 420 | MUSB_TXCSR_P_WZC_BITS;
405 musb_writew(regs, MUSB_TXCSR, 421 musb_writew(regs, MUSB_TXCSR, csr);
406 csr);
407 } else { 422 } else {
408 csr = musb_readw(regs, 423 csr = musb_readw(regs, MUSB_RXCSR);
409 MUSB_RXCSR);
410 csr |= MUSB_RXCSR_P_SENDSTALL 424 csr |= MUSB_RXCSR_P_SENDSTALL
411 | MUSB_RXCSR_FLUSHFIFO 425 | MUSB_RXCSR_FLUSHFIFO
412 | MUSB_RXCSR_CLRDATATOG 426 | MUSB_RXCSR_CLRDATATOG
413 | MUSB_RXCSR_P_WZC_BITS; 427 | MUSB_RXCSR_P_WZC_BITS;
414 musb_writew(regs, MUSB_RXCSR, 428 musb_writew(regs, MUSB_RXCSR, csr);
415 csr);
416 } 429 }
417 430
418 /* select ep0 again */ 431 /* select ep0 again */