diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2009-02-24 18:31:54 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-03-24 19:20:36 -0400 |
commit | a227fd7db74fa05d866790a4b29ba049bb5035cc (patch) | |
tree | d3f852d767e1c31394acd2c9bec811c0619df5dd /drivers/usb/musb/davinci.h | |
parent | 743821717c611913a5a3f95010b141f0b4cb5463 (diff) |
USB: musb: partial DaVinci dm355 support
Partial support for DaVinci DM355, on the EVM board; peripheral
mode should work, once mainline merges DM355 support. Missing:
(a) renumbering the GPIO for DRVVBUS on the DM6446 EVM,
when DAVINCI_N_GPIO increases;
(b) disabling DM355_DEEPSLEEP.DRVVBUS_OVERRIDE so VBUS is
driven according to the ID signal, if cpu_is_..._dm355()
The new PHY control bits are ignored on DM6446.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/musb/davinci.h')
-rw-r--r-- | drivers/usb/musb/davinci.h | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/drivers/usb/musb/davinci.h b/drivers/usb/musb/davinci.h index 7fb6238e270f..046c84433cad 100644 --- a/drivers/usb/musb/davinci.h +++ b/drivers/usb/musb/davinci.h | |||
@@ -15,14 +15,21 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | /* Integrated highspeed/otg PHY */ | 17 | /* Integrated highspeed/otg PHY */ |
18 | #define USBPHY_CTL_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x34) | 18 | #define USBPHY_CTL_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x34) |
19 | #define USBPHY_PHYCLKGD (1 << 8) | 19 | #define USBPHY_DATAPOL BIT(11) /* (dm355) switch D+/D- */ |
20 | #define USBPHY_SESNDEN (1 << 7) /* v(sess_end) comparator */ | 20 | #define USBPHY_PHYCLKGD BIT(8) |
21 | #define USBPHY_VBDTCTEN (1 << 6) /* v(bus) comparator */ | 21 | #define USBPHY_SESNDEN BIT(7) /* v(sess_end) comparator */ |
22 | #define USBPHY_PHYPLLON (1 << 4) /* override pll suspend */ | 22 | #define USBPHY_VBDTCTEN BIT(6) /* v(bus) comparator */ |
23 | #define USBPHY_CLKO1SEL (1 << 3) | 23 | #define USBPHY_VBUSSENS BIT(5) /* (dm355,ro) is vbus > 0.5V */ |
24 | #define USBPHY_OSCPDWN (1 << 2) | 24 | #define USBPHY_PHYPLLON BIT(4) /* override pll suspend */ |
25 | #define USBPHY_PHYPDWN (1 << 0) | 25 | #define USBPHY_CLKO1SEL BIT(3) |
26 | #define USBPHY_OSCPDWN BIT(2) | ||
27 | #define USBPHY_OTGPDWN BIT(1) | ||
28 | #define USBPHY_PHYPDWN BIT(0) | ||
29 | |||
30 | #define DM355_DEEPSLEEP_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x48) | ||
31 | #define DRVVBUS_FORCE BIT(2) | ||
32 | #define DRVVBUS_OVERRIDE BIT(1) | ||
26 | 33 | ||
27 | /* For now include usb OTG module registers here */ | 34 | /* For now include usb OTG module registers here */ |
28 | #define DAVINCI_USB_VERSION_REG 0x00 | 35 | #define DAVINCI_USB_VERSION_REG 0x00 |