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authorSarah Sharp <sarah.a.sharp@linux.intel.com>2014-01-29 17:02:00 -0500
committerSarah Sharp <sarah.a.sharp@linux.intel.com>2014-01-29 20:20:41 -0500
commit477632dff5c7deaa165701f441e9a4bd33e22b18 (patch)
tree5315f7daba5f45c4225fd6ea7255221c84dd3d0f /drivers/usb/host
parent140e3026a57ab7d830dab2f2c57796c222db0ea9 (diff)
Revert "xhci: replace xhci_write_64() with writeq()"
This reverts commit 7dd09a1af2c7150269350aaa567a11b06e831003. Many xHCI host controllers can only handle 32-bit addresses, and writing 64-bits at a time causes them to fail. Rafał reports that USB devices simply do not enumerate, and reverting this patch helps. Branimir reports that his host controller doesn't respond to an Enable Slot command and dies: [ 75.576160] xhci_hcd 0000:03:00.0: Timeout while waiting for a slot [ 88.991634] xhci_hcd 0000:03:00.0: Stopped the command ring failed, maybe the host is dead [ 88.991748] xhci_hcd 0000:03:00.0: Abort command ring failed [ 88.991845] xhci_hcd 0000:03:00.0: HC died; cleaning up [ 93.985489] xhci_hcd 0000:03:00.0: Timeout while waiting for a slot [ 93.985494] xhci_hcd 0000:03:00.0: Abort the command ring, but the xHCI is dead. [ 98.982586] xhci_hcd 0000:03:00.0: Timeout while waiting for a slot [ 98.982591] xhci_hcd 0000:03:00.0: Abort the command ring, but the xHCI is dead. [ 103.979696] xhci_hcd 0000:03:00.0: Timeout while waiting for a slot [ 103.979702] xhci_hcd 0000:03:00.0: Abort the command ring, but the xHCI is dead Signed-off-by: Sarah Sharp <sarah.a.sharp@intel.com> Reported-by: Rafał Miłecki <zajec5@gmail.com> Reported-by: Branimir Maksimovic <branimir.maksimovic@gmail.com> Cc: Xenia Ragiadakou <burzalodowa@gmail.com>
Diffstat (limited to 'drivers/usb/host')
-rw-r--r--drivers/usb/host/xhci-mem.c8
-rw-r--r--drivers/usb/host/xhci-ring.c8
-rw-r--r--drivers/usb/host/xhci.c8
-rw-r--r--drivers/usb/host/xhci.h29
4 files changed, 33 insertions, 20 deletions
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 873c272b3ef5..4b87026f8a5a 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1967,7 +1967,7 @@ static void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
1967 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 1967 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
1968 "// Write event ring dequeue pointer, " 1968 "// Write event ring dequeue pointer, "
1969 "preserving EHB bit"); 1969 "preserving EHB bit");
1970 writeq(((u64) deq & (u64) ~ERST_PTR_MASK) | temp, 1970 xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp,
1971 &xhci->ir_set->erst_dequeue); 1971 &xhci->ir_set->erst_dequeue);
1972} 1972}
1973 1973
@@ -2269,7 +2269,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2269 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 2269 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2270 "// Device context base array address = 0x%llx (DMA), %p (virt)", 2270 "// Device context base array address = 0x%llx (DMA), %p (virt)",
2271 (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa); 2271 (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
2272 writeq(dma, &xhci->op_regs->dcbaa_ptr); 2272 xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
2273 2273
2274 /* 2274 /*
2275 * Initialize the ring segment pool. The ring must be a contiguous 2275 * Initialize the ring segment pool. The ring must be a contiguous
@@ -2318,7 +2318,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2318 xhci->cmd_ring->cycle_state; 2318 xhci->cmd_ring->cycle_state;
2319 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 2319 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2320 "// Setting command ring address to 0x%x", val); 2320 "// Setting command ring address to 0x%x", val);
2321 writeq(val_64, &xhci->op_regs->cmd_ring); 2321 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
2322 xhci_dbg_cmd_ptrs(xhci); 2322 xhci_dbg_cmd_ptrs(xhci);
2323 2323
2324 xhci->lpm_command = xhci_alloc_command(xhci, true, true, flags); 2324 xhci->lpm_command = xhci_alloc_command(xhci, true, true, flags);
@@ -2399,7 +2399,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2399 val_64 = readq(&xhci->ir_set->erst_base); 2399 val_64 = readq(&xhci->ir_set->erst_base);
2400 val_64 &= ERST_PTR_MASK; 2400 val_64 &= ERST_PTR_MASK;
2401 val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK); 2401 val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
2402 writeq(val_64, &xhci->ir_set->erst_base); 2402 xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
2403 2403
2404 /* Set the event ring dequeue address */ 2404 /* Set the event ring dequeue address */
2405 xhci_set_hc_event_deq(xhci); 2405 xhci_set_hc_event_deq(xhci);
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index a0b248c34526..e19fae964f76 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -313,7 +313,8 @@ static int xhci_abort_cmd_ring(struct xhci_hcd *xhci)
313 return 0; 313 return 0;
314 } 314 }
315 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED; 315 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
316 writeq(temp_64 | CMD_RING_ABORT, &xhci->op_regs->cmd_ring); 316 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
317 &xhci->op_regs->cmd_ring);
317 318
318 /* Section 4.6.1.2 of xHCI 1.0 spec says software should 319 /* Section 4.6.1.2 of xHCI 1.0 spec says software should
319 * time the completion od all xHCI commands, including 320 * time the completion od all xHCI commands, including
@@ -2865,7 +2866,8 @@ hw_died:
2865 * the event ring should be empty. 2866 * the event ring should be empty.
2866 */ 2867 */
2867 temp_64 = readq(&xhci->ir_set->erst_dequeue); 2868 temp_64 = readq(&xhci->ir_set->erst_dequeue);
2868 writeq(temp_64 | ERST_EHB, &xhci->ir_set->erst_dequeue); 2869 xhci_write_64(xhci, temp_64 | ERST_EHB,
2870 &xhci->ir_set->erst_dequeue);
2869 spin_unlock(&xhci->lock); 2871 spin_unlock(&xhci->lock);
2870 2872
2871 return IRQ_HANDLED; 2873 return IRQ_HANDLED;
@@ -2892,7 +2894,7 @@ hw_died:
2892 2894
2893 /* Clear the event handler busy flag (RW1C); event ring is empty. */ 2895 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2894 temp_64 |= ERST_EHB; 2896 temp_64 |= ERST_EHB;
2895 writeq(temp_64, &xhci->ir_set->erst_dequeue); 2897 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2896 2898
2897 spin_unlock(&xhci->lock); 2899 spin_unlock(&xhci->lock);
2898 2900
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index ad364394885a..ebbe52cafaa1 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -769,11 +769,11 @@ static void xhci_restore_registers(struct xhci_hcd *xhci)
769{ 769{
770 writel(xhci->s3.command, &xhci->op_regs->command); 770 writel(xhci->s3.command, &xhci->op_regs->command);
771 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); 771 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
772 writeq(xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); 772 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
773 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); 773 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
774 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size); 774 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
775 writeq(xhci->s3.erst_base, &xhci->ir_set->erst_base); 775 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
776 writeq(xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue); 776 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
777 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending); 777 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
778 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control); 778 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
779} 779}
@@ -792,7 +792,7 @@ static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
792 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 792 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
793 "// Setting command ring address to 0x%llx", 793 "// Setting command ring address to 0x%llx",
794 (long unsigned long) val_64); 794 (long unsigned long) val_64);
795 writeq(val_64, &xhci->op_regs->cmd_ring); 795 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
796} 796}
797 797
798/* 798/*
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index f8416639bf31..60def15d129c 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -28,15 +28,6 @@
28#include <linux/kernel.h> 28#include <linux/kernel.h>
29#include <linux/usb/hcd.h> 29#include <linux/usb/hcd.h>
30 30
31/*
32 * Registers should always be accessed with double word or quad word accesses.
33 *
34 * Some xHCI implementations may support 64-bit address pointers. Registers
35 * with 64-bit address pointers should be written to with dword accesses by
36 * writing the low dword first (ptr[0]), then the high dword (ptr[1]) second.
37 * xHCI implementations that do not support 64-bit address pointers will ignore
38 * the high dword, and write order is irrelevant.
39 */
40#include <asm-generic/io-64-nonatomic-lo-hi.h> 31#include <asm-generic/io-64-nonatomic-lo-hi.h>
41 32
42/* Code sharing between pci-quirks and xhci hcd */ 33/* Code sharing between pci-quirks and xhci hcd */
@@ -1614,6 +1605,26 @@ static inline struct usb_hcd *xhci_to_hcd(struct xhci_hcd *xhci)
1614#define xhci_warn_ratelimited(xhci, fmt, args...) \ 1605#define xhci_warn_ratelimited(xhci, fmt, args...) \
1615 dev_warn_ratelimited(xhci_to_hcd(xhci)->self.controller , fmt , ## args) 1606 dev_warn_ratelimited(xhci_to_hcd(xhci)->self.controller , fmt , ## args)
1616 1607
1608/*
1609 * Registers should always be accessed with double word or quad word accesses.
1610 *
1611 * Some xHCI implementations may support 64-bit address pointers. Registers
1612 * with 64-bit address pointers should be written to with dword accesses by
1613 * writing the low dword first (ptr[0]), then the high dword (ptr[1]) second.
1614 * xHCI implementations that do not support 64-bit address pointers will ignore
1615 * the high dword, and write order is irrelevant.
1616 */
1617static inline void xhci_write_64(struct xhci_hcd *xhci,
1618 const u64 val, __le64 __iomem *regs)
1619{
1620 __u32 __iomem *ptr = (__u32 __iomem *) regs;
1621 u32 val_lo = lower_32_bits(val);
1622 u32 val_hi = upper_32_bits(val);
1623
1624 writel(val_lo, ptr);
1625 writel(val_hi, ptr + 1);
1626}
1627
1617static inline int xhci_link_trb_quirk(struct xhci_hcd *xhci) 1628static inline int xhci_link_trb_quirk(struct xhci_hcd *xhci)
1618{ 1629{
1619 return xhci->quirks & XHCI_LINK_TRB_QUIRK; 1630 return xhci->quirks & XHCI_LINK_TRB_QUIRK;