diff options
author | Dmitry Torokhov <dtor_core@ameritech.net> | 2006-04-02 00:08:05 -0500 |
---|---|---|
committer | Dmitry Torokhov <dtor_core@ameritech.net> | 2006-04-02 00:08:05 -0500 |
commit | 95d465fd750897ab32462a6702fbfe1b122cbbc0 (patch) | |
tree | 65c38b2f11c51bb6932e44dd6c92f15b0091abfe /drivers/usb/host | |
parent | 642fde17dceceb56c7ba2762733ac688666ae657 (diff) | |
parent | 683aa4012f53b2ada0f430487e05d37b0d94e90a (diff) |
Manual merge with Linus.
Conflicts:
arch/powerpc/kernel/setup-common.c
drivers/input/keyboard/hil_kbd.c
drivers/input/mouse/hil_ptr.c
Diffstat (limited to 'drivers/usb/host')
26 files changed, 2137 insertions, 1179 deletions
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index be3fd9bce573..e27b79a3c05f 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig | |||
@@ -6,7 +6,7 @@ comment "USB Host Controller Drivers" | |||
6 | 6 | ||
7 | config USB_EHCI_HCD | 7 | config USB_EHCI_HCD |
8 | tristate "EHCI HCD (USB 2.0) support" | 8 | tristate "EHCI HCD (USB 2.0) support" |
9 | depends on USB && PCI | 9 | depends on USB && USB_ARCH_HAS_EHCI |
10 | ---help--- | 10 | ---help--- |
11 | The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0 | 11 | The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0 |
12 | "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware. | 12 | "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware. |
diff --git a/drivers/usb/host/ehci-au1xxx.c b/drivers/usb/host/ehci-au1xxx.c new file mode 100644 index 000000000000..63eadeec1324 --- /dev/null +++ b/drivers/usb/host/ehci-au1xxx.c | |||
@@ -0,0 +1,297 @@ | |||
1 | /* | ||
2 | * EHCI HCD (Host Controller Driver) for USB. | ||
3 | * | ||
4 | * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net> | ||
5 | * | ||
6 | * Bus Glue for AMD Alchemy Au1xxx | ||
7 | * | ||
8 | * Based on "ohci-au1xxx.c" by Matt Porter <mporter@kernel.crashing.org> | ||
9 | * | ||
10 | * Modified for AMD Alchemy Au1200 EHC | ||
11 | * by K.Boge <karsten.boge@amd.com> | ||
12 | * | ||
13 | * This file is licenced under the GPL. | ||
14 | */ | ||
15 | |||
16 | #include <linux/platform_device.h> | ||
17 | #include <asm/mach-au1x00/au1000.h> | ||
18 | |||
19 | #ifndef CONFIG_SOC_AU1200 | ||
20 | #error "this Alchemy chip doesn't have EHCI" | ||
21 | #else /* Au1200 */ | ||
22 | |||
23 | #define USB_HOST_CONFIG (USB_MSR_BASE + USB_MSR_MCFG) | ||
24 | #define USB_MCFG_PFEN (1<<31) | ||
25 | #define USB_MCFG_RDCOMB (1<<30) | ||
26 | #define USB_MCFG_SSDEN (1<<23) | ||
27 | #define USB_MCFG_PHYPLLEN (1<<19) | ||
28 | #define USB_MCFG_EHCCLKEN (1<<17) | ||
29 | #define USB_MCFG_UCAM (1<<7) | ||
30 | #define USB_MCFG_EBMEN (1<<3) | ||
31 | #define USB_MCFG_EMEMEN (1<<2) | ||
32 | |||
33 | #define USBH_ENABLE_CE (USB_MCFG_PHYPLLEN | USB_MCFG_EHCCLKEN) | ||
34 | |||
35 | #ifdef CONFIG_DMA_COHERENT | ||
36 | #define USBH_ENABLE_INIT (USBH_ENABLE_CE \ | ||
37 | | USB_MCFG_PFEN | USB_MCFG_RDCOMB \ | ||
38 | | USB_MCFG_SSDEN | USB_MCFG_UCAM \ | ||
39 | | USB_MCFG_EBMEN | USB_MCFG_EMEMEN) | ||
40 | #else | ||
41 | #define USBH_ENABLE_INIT (USBH_ENABLE_CE \ | ||
42 | | USB_MCFG_PFEN | USB_MCFG_RDCOMB \ | ||
43 | | USB_MCFG_SSDEN \ | ||
44 | | USB_MCFG_EBMEN | USB_MCFG_EMEMEN) | ||
45 | #endif | ||
46 | #define USBH_DISABLE (USB_MCFG_EBMEN | USB_MCFG_EMEMEN) | ||
47 | |||
48 | #endif /* Au1200 */ | ||
49 | |||
50 | extern int usb_disabled(void); | ||
51 | |||
52 | /*-------------------------------------------------------------------------*/ | ||
53 | |||
54 | static void au1xxx_start_ehc(struct platform_device *dev) | ||
55 | { | ||
56 | pr_debug(__FILE__ ": starting Au1xxx EHCI USB Controller\n"); | ||
57 | |||
58 | /* write HW defaults again in case Yamon cleared them */ | ||
59 | if (au_readl(USB_HOST_CONFIG) == 0) { | ||
60 | au_writel(0x00d02000, USB_HOST_CONFIG); | ||
61 | au_readl(USB_HOST_CONFIG); | ||
62 | udelay(1000); | ||
63 | } | ||
64 | /* enable host controller */ | ||
65 | au_writel(USBH_ENABLE_CE | au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); | ||
66 | au_readl(USB_HOST_CONFIG); | ||
67 | udelay(1000); | ||
68 | au_writel(USBH_ENABLE_INIT | au_readl(USB_HOST_CONFIG), | ||
69 | USB_HOST_CONFIG); | ||
70 | au_readl(USB_HOST_CONFIG); | ||
71 | udelay(1000); | ||
72 | |||
73 | pr_debug(__FILE__ ": Clock to USB host has been enabled\n"); | ||
74 | } | ||
75 | |||
76 | static void au1xxx_stop_ehc(struct platform_device *dev) | ||
77 | { | ||
78 | pr_debug(__FILE__ ": stopping Au1xxx EHCI USB Controller\n"); | ||
79 | |||
80 | /* Disable mem */ | ||
81 | au_writel(~USBH_DISABLE & au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); | ||
82 | udelay(1000); | ||
83 | /* Disable clock */ | ||
84 | au_writel(~USB_MCFG_EHCCLKEN & au_readl(USB_HOST_CONFIG), | ||
85 | USB_HOST_CONFIG); | ||
86 | au_readl(USB_HOST_CONFIG); | ||
87 | } | ||
88 | |||
89 | /*-------------------------------------------------------------------------*/ | ||
90 | |||
91 | /* configure so an HC device and id are always provided */ | ||
92 | /* always called with process context; sleeping is OK */ | ||
93 | |||
94 | /** | ||
95 | * usb_ehci_au1xxx_probe - initialize Au1xxx-based HCDs | ||
96 | * Context: !in_interrupt() | ||
97 | * | ||
98 | * Allocates basic resources for this USB host controller, and | ||
99 | * then invokes the start() method for the HCD associated with it | ||
100 | * through the hotplug entry's driver_data. | ||
101 | * | ||
102 | */ | ||
103 | int usb_ehci_au1xxx_probe(const struct hc_driver *driver, | ||
104 | struct usb_hcd **hcd_out, struct platform_device *dev) | ||
105 | { | ||
106 | int retval; | ||
107 | struct usb_hcd *hcd; | ||
108 | struct ehci_hcd *ehci; | ||
109 | |||
110 | #if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT) | ||
111 | |||
112 | /* Au1200 AB USB does not support coherent memory */ | ||
113 | if (!(read_c0_prid() & 0xff)) { | ||
114 | pr_info("%s: this is chip revision AB!\n", dev->dev.name); | ||
115 | pr_info("%s: update your board or re-configure the kernel\n", | ||
116 | dev->dev.name); | ||
117 | return -ENODEV; | ||
118 | } | ||
119 | #endif | ||
120 | |||
121 | au1xxx_start_ehc(dev); | ||
122 | |||
123 | if (dev->resource[1].flags != IORESOURCE_IRQ) { | ||
124 | pr_debug("resource[1] is not IORESOURCE_IRQ"); | ||
125 | retval = -ENOMEM; | ||
126 | } | ||
127 | hcd = usb_create_hcd(driver, &dev->dev, "Au1xxx"); | ||
128 | if (!hcd) | ||
129 | return -ENOMEM; | ||
130 | hcd->rsrc_start = dev->resource[0].start; | ||
131 | hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1; | ||
132 | |||
133 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | ||
134 | pr_debug("request_mem_region failed"); | ||
135 | retval = -EBUSY; | ||
136 | goto err1; | ||
137 | } | ||
138 | |||
139 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); | ||
140 | if (!hcd->regs) { | ||
141 | pr_debug("ioremap failed"); | ||
142 | retval = -ENOMEM; | ||
143 | goto err2; | ||
144 | } | ||
145 | |||
146 | ehci = hcd_to_ehci(hcd); | ||
147 | ehci->caps = hcd->regs; | ||
148 | ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); | ||
149 | /* cache this readonly data; minimize chip reads */ | ||
150 | ehci->hcs_params = readl(&ehci->caps->hcs_params); | ||
151 | |||
152 | /* ehci_hcd_init(hcd_to_ehci(hcd)); */ | ||
153 | |||
154 | retval = | ||
155 | usb_add_hcd(hcd, dev->resource[1].start, SA_INTERRUPT | SA_SHIRQ); | ||
156 | if (retval == 0) | ||
157 | return retval; | ||
158 | |||
159 | au1xxx_stop_ehc(dev); | ||
160 | iounmap(hcd->regs); | ||
161 | err2: | ||
162 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | ||
163 | err1: | ||
164 | usb_put_hcd(hcd); | ||
165 | return retval; | ||
166 | } | ||
167 | |||
168 | /* may be called without controller electrically present */ | ||
169 | /* may be called with controller, bus, and devices active */ | ||
170 | |||
171 | /** | ||
172 | * usb_ehci_hcd_au1xxx_remove - shutdown processing for Au1xxx-based HCDs | ||
173 | * @dev: USB Host Controller being removed | ||
174 | * Context: !in_interrupt() | ||
175 | * | ||
176 | * Reverses the effect of usb_ehci_hcd_au1xxx_probe(), first invoking | ||
177 | * the HCD's stop() method. It is always called from a thread | ||
178 | * context, normally "rmmod", "apmd", or something similar. | ||
179 | * | ||
180 | */ | ||
181 | void usb_ehci_au1xxx_remove(struct usb_hcd *hcd, struct platform_device *dev) | ||
182 | { | ||
183 | usb_remove_hcd(hcd); | ||
184 | iounmap(hcd->regs); | ||
185 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | ||
186 | usb_put_hcd(hcd); | ||
187 | au1xxx_stop_ehc(dev); | ||
188 | } | ||
189 | |||
190 | /*-------------------------------------------------------------------------*/ | ||
191 | |||
192 | static const struct hc_driver ehci_au1xxx_hc_driver = { | ||
193 | .description = hcd_name, | ||
194 | .product_desc = "Au1xxx EHCI", | ||
195 | .hcd_priv_size = sizeof(struct ehci_hcd), | ||
196 | |||
197 | /* | ||
198 | * generic hardware linkage | ||
199 | */ | ||
200 | .irq = ehci_irq, | ||
201 | .flags = HCD_MEMORY | HCD_USB2, | ||
202 | |||
203 | /* | ||
204 | * basic lifecycle operations | ||
205 | */ | ||
206 | .reset = ehci_init, | ||
207 | .start = ehci_run, | ||
208 | .stop = ehci_stop, | ||
209 | |||
210 | /* | ||
211 | * managing i/o requests and associated device resources | ||
212 | */ | ||
213 | .urb_enqueue = ehci_urb_enqueue, | ||
214 | .urb_dequeue = ehci_urb_dequeue, | ||
215 | .endpoint_disable = ehci_endpoint_disable, | ||
216 | |||
217 | /* | ||
218 | * scheduling support | ||
219 | */ | ||
220 | .get_frame_number = ehci_get_frame, | ||
221 | |||
222 | /* | ||
223 | * root hub support | ||
224 | */ | ||
225 | .hub_status_data = ehci_hub_status_data, | ||
226 | .hub_control = ehci_hub_control, | ||
227 | #ifdef CONFIG_PM | ||
228 | .hub_suspend = ehci_hub_suspend, | ||
229 | .hub_resume = ehci_hub_resume, | ||
230 | #endif | ||
231 | }; | ||
232 | |||
233 | /*-------------------------------------------------------------------------*/ | ||
234 | |||
235 | static int ehci_hcd_au1xxx_drv_probe(struct device *dev) | ||
236 | { | ||
237 | struct platform_device *pdev = to_platform_device(dev); | ||
238 | struct usb_hcd *hcd = NULL; | ||
239 | int ret; | ||
240 | |||
241 | pr_debug("In ehci_hcd_au1xxx_drv_probe\n"); | ||
242 | |||
243 | if (usb_disabled()) | ||
244 | return -ENODEV; | ||
245 | |||
246 | ret = usb_ehci_au1xxx_probe(&ehci_au1xxx_hc_driver, &hcd, pdev); | ||
247 | return ret; | ||
248 | } | ||
249 | |||
250 | static int ehci_hcd_au1xxx_drv_remove(struct device *dev) | ||
251 | { | ||
252 | struct platform_device *pdev = to_platform_device(dev); | ||
253 | struct usb_hcd *hcd = dev_get_drvdata(dev); | ||
254 | |||
255 | usb_ehci_au1xxx_remove(hcd, pdev); | ||
256 | return 0; | ||
257 | } | ||
258 | |||
259 | /*TBD*/ | ||
260 | /*static int ehci_hcd_au1xxx_drv_suspend(struct device *dev) | ||
261 | { | ||
262 | struct platform_device *pdev = to_platform_device(dev); | ||
263 | struct usb_hcd *hcd = dev_get_drvdata(dev); | ||
264 | |||
265 | return 0; | ||
266 | } | ||
267 | static int ehci_hcd_au1xxx_drv_resume(struct device *dev) | ||
268 | { | ||
269 | struct platform_device *pdev = to_platform_device(dev); | ||
270 | struct usb_hcd *hcd = dev_get_drvdata(dev); | ||
271 | |||
272 | return 0; | ||
273 | } | ||
274 | */ | ||
275 | static struct device_driver ehci_hcd_au1xxx_driver = { | ||
276 | .name = "au1xxx-ehci", | ||
277 | .bus = &platform_bus_type, | ||
278 | .probe = ehci_hcd_au1xxx_drv_probe, | ||
279 | .remove = ehci_hcd_au1xxx_drv_remove, | ||
280 | /*.suspend = ehci_hcd_au1xxx_drv_suspend, */ | ||
281 | /*.resume = ehci_hcd_au1xxx_drv_resume, */ | ||
282 | }; | ||
283 | |||
284 | static int __init ehci_hcd_au1xxx_init(void) | ||
285 | { | ||
286 | pr_debug(DRIVER_INFO " (Au1xxx)\n"); | ||
287 | |||
288 | return driver_register(&ehci_hcd_au1xxx_driver); | ||
289 | } | ||
290 | |||
291 | static void __exit ehci_hcd_au1xxx_cleanup(void) | ||
292 | { | ||
293 | driver_unregister(&ehci_hcd_au1xxx_driver); | ||
294 | } | ||
295 | |||
296 | module_init(ehci_hcd_au1xxx_init); | ||
297 | module_exit(ehci_hcd_au1xxx_cleanup); | ||
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c new file mode 100644 index 000000000000..f985f121a245 --- /dev/null +++ b/drivers/usb/host/ehci-fsl.c | |||
@@ -0,0 +1,366 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Brownell 2000-2002 | ||
3 | * Copyright (c) 2005 MontaVista Software | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License as published by the | ||
7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
8 | * option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, but | ||
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | ||
12 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
13 | * for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software Foundation, | ||
17 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
18 | * | ||
19 | * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided | ||
20 | * by Hunter Wu. | ||
21 | */ | ||
22 | |||
23 | #include <linux/platform_device.h> | ||
24 | #include <linux/fsl_devices.h> | ||
25 | |||
26 | #include "ehci-fsl.h" | ||
27 | |||
28 | /* FIXME: Power Managment is un-ported so temporarily disable it */ | ||
29 | #undef CONFIG_PM | ||
30 | |||
31 | /* PCI-based HCs are common, but plenty of non-PCI HCs are used too */ | ||
32 | |||
33 | /* configure so an HC device and id are always provided */ | ||
34 | /* always called with process context; sleeping is OK */ | ||
35 | |||
36 | /** | ||
37 | * usb_hcd_fsl_probe - initialize FSL-based HCDs | ||
38 | * @drvier: Driver to be used for this HCD | ||
39 | * @pdev: USB Host Controller being probed | ||
40 | * Context: !in_interrupt() | ||
41 | * | ||
42 | * Allocates basic resources for this USB host controller. | ||
43 | * | ||
44 | */ | ||
45 | int usb_hcd_fsl_probe(const struct hc_driver *driver, | ||
46 | struct platform_device *pdev) | ||
47 | { | ||
48 | struct fsl_usb2_platform_data *pdata; | ||
49 | struct usb_hcd *hcd; | ||
50 | struct resource *res; | ||
51 | int irq; | ||
52 | int retval; | ||
53 | unsigned int temp; | ||
54 | |||
55 | pr_debug("initializing FSL-SOC USB Controller\n"); | ||
56 | |||
57 | /* Need platform data for setup */ | ||
58 | pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data; | ||
59 | if (!pdata) { | ||
60 | dev_err(&pdev->dev, | ||
61 | "No platform data for %s.\n", pdev->dev.bus_id); | ||
62 | return -ENODEV; | ||
63 | } | ||
64 | |||
65 | /* | ||
66 | * This is a host mode driver, verify that we're supposed to be | ||
67 | * in host mode. | ||
68 | */ | ||
69 | if (!((pdata->operating_mode == FSL_USB2_DR_HOST) || | ||
70 | (pdata->operating_mode == FSL_USB2_MPH_HOST))) { | ||
71 | dev_err(&pdev->dev, | ||
72 | "Non Host Mode configured for %s. Wrong driver linked.\n", | ||
73 | pdev->dev.bus_id); | ||
74 | return -ENODEV; | ||
75 | } | ||
76 | |||
77 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
78 | if (!res) { | ||
79 | dev_err(&pdev->dev, | ||
80 | "Found HC with no IRQ. Check %s setup!\n", | ||
81 | pdev->dev.bus_id); | ||
82 | return -ENODEV; | ||
83 | } | ||
84 | irq = res->start; | ||
85 | |||
86 | hcd = usb_create_hcd(driver, &pdev->dev, pdev->dev.bus_id); | ||
87 | if (!hcd) { | ||
88 | retval = -ENOMEM; | ||
89 | goto err1; | ||
90 | } | ||
91 | |||
92 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
93 | if (!res) { | ||
94 | dev_err(&pdev->dev, | ||
95 | "Found HC with no register addr. Check %s setup!\n", | ||
96 | pdev->dev.bus_id); | ||
97 | retval = -ENODEV; | ||
98 | goto err2; | ||
99 | } | ||
100 | hcd->rsrc_start = res->start; | ||
101 | hcd->rsrc_len = res->end - res->start + 1; | ||
102 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | ||
103 | driver->description)) { | ||
104 | dev_dbg(&pdev->dev, "controller already in use\n"); | ||
105 | retval = -EBUSY; | ||
106 | goto err2; | ||
107 | } | ||
108 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); | ||
109 | |||
110 | if (hcd->regs == NULL) { | ||
111 | dev_dbg(&pdev->dev, "error mapping memory\n"); | ||
112 | retval = -EFAULT; | ||
113 | goto err3; | ||
114 | } | ||
115 | |||
116 | /* Enable USB controller */ | ||
117 | temp = in_be32(hcd->regs + 0x500); | ||
118 | out_be32(hcd->regs + 0x500, temp | 0x4); | ||
119 | |||
120 | /* Set to Host mode */ | ||
121 | temp = in_le32(hcd->regs + 0x1a8); | ||
122 | out_le32(hcd->regs + 0x1a8, temp | 0x3); | ||
123 | |||
124 | retval = usb_add_hcd(hcd, irq, SA_SHIRQ); | ||
125 | if (retval != 0) | ||
126 | goto err4; | ||
127 | return retval; | ||
128 | |||
129 | err4: | ||
130 | iounmap(hcd->regs); | ||
131 | err3: | ||
132 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | ||
133 | err2: | ||
134 | usb_put_hcd(hcd); | ||
135 | err1: | ||
136 | dev_err(&pdev->dev, "init %s fail, %d\n", pdev->dev.bus_id, retval); | ||
137 | return retval; | ||
138 | } | ||
139 | |||
140 | /* may be called without controller electrically present */ | ||
141 | /* may be called with controller, bus, and devices active */ | ||
142 | |||
143 | /** | ||
144 | * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs | ||
145 | * @dev: USB Host Controller being removed | ||
146 | * Context: !in_interrupt() | ||
147 | * | ||
148 | * Reverses the effect of usb_hcd_fsl_probe(). | ||
149 | * | ||
150 | */ | ||
151 | void usb_hcd_fsl_remove(struct usb_hcd *hcd, struct platform_device *pdev) | ||
152 | { | ||
153 | usb_remove_hcd(hcd); | ||
154 | iounmap(hcd->regs); | ||
155 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | ||
156 | usb_put_hcd(hcd); | ||
157 | } | ||
158 | |||
159 | static void mpc83xx_setup_phy(struct ehci_hcd *ehci, | ||
160 | enum fsl_usb2_phy_modes phy_mode, | ||
161 | unsigned int port_offset) | ||
162 | { | ||
163 | u32 portsc = 0; | ||
164 | switch (phy_mode) { | ||
165 | case FSL_USB2_PHY_ULPI: | ||
166 | portsc |= PORT_PTS_ULPI; | ||
167 | break; | ||
168 | case FSL_USB2_PHY_SERIAL: | ||
169 | portsc |= PORT_PTS_SERIAL; | ||
170 | break; | ||
171 | case FSL_USB2_PHY_UTMI_WIDE: | ||
172 | portsc |= PORT_PTS_PTW; | ||
173 | /* fall through */ | ||
174 | case FSL_USB2_PHY_UTMI: | ||
175 | portsc |= PORT_PTS_UTMI; | ||
176 | break; | ||
177 | case FSL_USB2_PHY_NONE: | ||
178 | break; | ||
179 | } | ||
180 | writel(portsc, &ehci->regs->port_status[port_offset]); | ||
181 | } | ||
182 | |||
183 | static void mpc83xx_usb_setup(struct usb_hcd *hcd) | ||
184 | { | ||
185 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
186 | struct fsl_usb2_platform_data *pdata; | ||
187 | void __iomem *non_ehci = hcd->regs; | ||
188 | |||
189 | pdata = | ||
190 | (struct fsl_usb2_platform_data *)hcd->self.controller-> | ||
191 | platform_data; | ||
192 | /* Enable PHY interface in the control reg. */ | ||
193 | out_be32(non_ehci + FSL_SOC_USB_CTRL, 0x00000004); | ||
194 | out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b); | ||
195 | |||
196 | if (pdata->operating_mode == FSL_USB2_DR_HOST) | ||
197 | mpc83xx_setup_phy(ehci, pdata->phy_mode, 0); | ||
198 | |||
199 | if (pdata->operating_mode == FSL_USB2_MPH_HOST) { | ||
200 | unsigned int chip, rev, svr; | ||
201 | |||
202 | svr = mfspr(SPRN_SVR); | ||
203 | chip = svr >> 16; | ||
204 | rev = (svr >> 4) & 0xf; | ||
205 | |||
206 | /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */ | ||
207 | if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) | ||
208 | ehci->has_fsl_port_bug = 1; | ||
209 | |||
210 | if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) | ||
211 | mpc83xx_setup_phy(ehci, pdata->phy_mode, 0); | ||
212 | if (pdata->port_enables & FSL_USB2_PORT1_ENABLED) | ||
213 | mpc83xx_setup_phy(ehci, pdata->phy_mode, 1); | ||
214 | } | ||
215 | |||
216 | /* put controller in host mode. */ | ||
217 | writel(0x00000003, non_ehci + FSL_SOC_USB_USBMODE); | ||
218 | out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c); | ||
219 | out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040); | ||
220 | out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); | ||
221 | } | ||
222 | |||
223 | /* called after powerup, by probe or system-pm "wakeup" */ | ||
224 | static int ehci_fsl_reinit(struct ehci_hcd *ehci) | ||
225 | { | ||
226 | mpc83xx_usb_setup(ehci_to_hcd(ehci)); | ||
227 | ehci_port_power(ehci, 0); | ||
228 | |||
229 | return 0; | ||
230 | } | ||
231 | |||
232 | /* called during probe() after chip reset completes */ | ||
233 | static int ehci_fsl_setup(struct usb_hcd *hcd) | ||
234 | { | ||
235 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
236 | int retval; | ||
237 | |||
238 | /* EHCI registers start at offset 0x100 */ | ||
239 | ehci->caps = hcd->regs + 0x100; | ||
240 | ehci->regs = hcd->regs + 0x100 + | ||
241 | HC_LENGTH(readl(&ehci->caps->hc_capbase)); | ||
242 | dbg_hcs_params(ehci, "reset"); | ||
243 | dbg_hcc_params(ehci, "reset"); | ||
244 | |||
245 | /* cache this readonly data; minimize chip reads */ | ||
246 | ehci->hcs_params = readl(&ehci->caps->hcs_params); | ||
247 | |||
248 | retval = ehci_halt(ehci); | ||
249 | if (retval) | ||
250 | return retval; | ||
251 | |||
252 | /* data structure init */ | ||
253 | retval = ehci_init(hcd); | ||
254 | if (retval) | ||
255 | return retval; | ||
256 | |||
257 | ehci->is_tdi_rh_tt = 1; | ||
258 | |||
259 | ehci->sbrn = 0x20; | ||
260 | |||
261 | ehci_reset(ehci); | ||
262 | |||
263 | retval = ehci_fsl_reinit(ehci); | ||
264 | return retval; | ||
265 | } | ||
266 | |||
267 | static const struct hc_driver ehci_fsl_hc_driver = { | ||
268 | .description = hcd_name, | ||
269 | .product_desc = "Freescale On-Chip EHCI Host Controller", | ||
270 | .hcd_priv_size = sizeof(struct ehci_hcd), | ||
271 | |||
272 | /* | ||
273 | * generic hardware linkage | ||
274 | */ | ||
275 | .irq = ehci_irq, | ||
276 | .flags = HCD_USB2, | ||
277 | |||
278 | /* | ||
279 | * basic lifecycle operations | ||
280 | */ | ||
281 | .reset = ehci_fsl_setup, | ||
282 | .start = ehci_run, | ||
283 | #ifdef CONFIG_PM | ||
284 | .suspend = ehci_bus_suspend, | ||
285 | .resume = ehci_bus_resume, | ||
286 | #endif | ||
287 | .stop = ehci_stop, | ||
288 | |||
289 | /* | ||
290 | * managing i/o requests and associated device resources | ||
291 | */ | ||
292 | .urb_enqueue = ehci_urb_enqueue, | ||
293 | .urb_dequeue = ehci_urb_dequeue, | ||
294 | .endpoint_disable = ehci_endpoint_disable, | ||
295 | |||
296 | /* | ||
297 | * scheduling support | ||
298 | */ | ||
299 | .get_frame_number = ehci_get_frame, | ||
300 | |||
301 | /* | ||
302 | * root hub support | ||
303 | */ | ||
304 | .hub_status_data = ehci_hub_status_data, | ||
305 | .hub_control = ehci_hub_control, | ||
306 | .bus_suspend = ehci_bus_suspend, | ||
307 | .bus_resume = ehci_bus_resume, | ||
308 | }; | ||
309 | |||
310 | static int ehci_fsl_drv_probe(struct platform_device *pdev) | ||
311 | { | ||
312 | if (usb_disabled()) | ||
313 | return -ENODEV; | ||
314 | |||
315 | return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev); | ||
316 | } | ||
317 | |||
318 | static int ehci_fsl_drv_remove(struct platform_device *pdev) | ||
319 | { | ||
320 | struct usb_hcd *hcd = platform_get_drvdata(pdev); | ||
321 | |||
322 | usb_hcd_fsl_remove(hcd, pdev); | ||
323 | |||
324 | return 0; | ||
325 | } | ||
326 | |||
327 | static struct platform_driver ehci_fsl_dr_driver = { | ||
328 | .probe = ehci_fsl_drv_probe, | ||
329 | .remove = ehci_fsl_drv_remove, | ||
330 | .driver = { | ||
331 | .name = "fsl-usb2-dr", | ||
332 | }, | ||
333 | }; | ||
334 | |||
335 | static struct platform_driver ehci_fsl_mph_driver = { | ||
336 | .probe = ehci_fsl_drv_probe, | ||
337 | .remove = ehci_fsl_drv_remove, | ||
338 | .driver = { | ||
339 | .name = "fsl-usb2-mph", | ||
340 | }, | ||
341 | }; | ||
342 | |||
343 | static int __init ehci_fsl_init(void) | ||
344 | { | ||
345 | int retval; | ||
346 | |||
347 | pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", | ||
348 | hcd_name, | ||
349 | sizeof(struct ehci_qh), sizeof(struct ehci_qtd), | ||
350 | sizeof(struct ehci_itd), sizeof(struct ehci_sitd)); | ||
351 | |||
352 | retval = platform_driver_register(&ehci_fsl_dr_driver); | ||
353 | if (retval) | ||
354 | return retval; | ||
355 | |||
356 | return platform_driver_register(&ehci_fsl_mph_driver); | ||
357 | } | ||
358 | |||
359 | static void __exit ehci_fsl_cleanup(void) | ||
360 | { | ||
361 | platform_driver_unregister(&ehci_fsl_mph_driver); | ||
362 | platform_driver_unregister(&ehci_fsl_dr_driver); | ||
363 | } | ||
364 | |||
365 | module_init(ehci_fsl_init); | ||
366 | module_exit(ehci_fsl_cleanup); | ||
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h new file mode 100644 index 000000000000..caac0d1967d0 --- /dev/null +++ b/drivers/usb/host/ehci-fsl.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* Copyright (c) 2005 freescale semiconductor | ||
2 | * Copyright (c) 2005 MontaVista Software | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms of the GNU General Public License as published by the | ||
6 | * Free Software Foundation; either version 2 of the License, or (at your | ||
7 | * option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, but | ||
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
12 | * General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along | ||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
17 | */ | ||
18 | #ifndef _EHCI_FSL_H | ||
19 | #define _EHCI_FSL_H | ||
20 | |||
21 | /* offsets for the non-ehci registers in the FSL SOC USB controller */ | ||
22 | #define FSL_SOC_USB_ULPIVP 0x170 | ||
23 | #define FSL_SOC_USB_PORTSC1 0x184 | ||
24 | #define PORT_PTS_MSK (3<<30) | ||
25 | #define PORT_PTS_UTMI (0<<30) | ||
26 | #define PORT_PTS_ULPI (2<<30) | ||
27 | #define PORT_PTS_SERIAL (3<<30) | ||
28 | #define PORT_PTS_PTW (1<<28) | ||
29 | #define FSL_SOC_USB_PORTSC2 0x188 | ||
30 | #define FSL_SOC_USB_USBMODE 0x1a8 | ||
31 | #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ | ||
32 | #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ | ||
33 | #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ | ||
34 | #define FSL_SOC_USB_SICTRL 0x40c /* NOTE: big-endian */ | ||
35 | #define FSL_SOC_USB_PRICTRL 0x410 /* NOTE: big-endian */ | ||
36 | #define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */ | ||
37 | #endif /* _EHCI_FSL_H */ | ||
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 9dd3d14c64f3..79f2d8b9bfb6 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c | |||
@@ -889,8 +889,19 @@ MODULE_LICENSE ("GPL"); | |||
889 | 889 | ||
890 | #ifdef CONFIG_PCI | 890 | #ifdef CONFIG_PCI |
891 | #include "ehci-pci.c" | 891 | #include "ehci-pci.c" |
892 | #define EHCI_BUS_GLUED | ||
892 | #endif | 893 | #endif |
893 | 894 | ||
894 | #if !defined(CONFIG_PCI) | 895 | #ifdef CONFIG_PPC_83xx |
896 | #include "ehci-fsl.c" | ||
897 | #define EHCI_BUS_GLUED | ||
898 | #endif | ||
899 | |||
900 | #ifdef CONFIG_SOC_AU1X00 | ||
901 | #include "ehci-au1xxx.c" | ||
902 | #define EHCI_BUS_GLUED | ||
903 | #endif | ||
904 | |||
905 | #ifndef EHCI_BUS_GLUED | ||
895 | #error "missing bus glue for ehci-hcd" | 906 | #error "missing bus glue for ehci-hcd" |
896 | #endif | 907 | #endif |
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index 69b0b9be7a64..d03e3cad5ca8 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c | |||
@@ -359,6 +359,8 @@ static int ehci_hub_control ( | |||
359 | case USB_PORT_FEAT_SUSPEND: | 359 | case USB_PORT_FEAT_SUSPEND: |
360 | if (temp & PORT_RESET) | 360 | if (temp & PORT_RESET) |
361 | goto error; | 361 | goto error; |
362 | if (ehci->no_selective_suspend) | ||
363 | break; | ||
362 | if (temp & PORT_SUSPEND) { | 364 | if (temp & PORT_SUSPEND) { |
363 | if ((temp & PORT_PE) == 0) | 365 | if ((temp & PORT_PE) == 0) |
364 | goto error; | 366 | goto error; |
@@ -514,6 +516,8 @@ static int ehci_hub_control ( | |||
514 | temp &= ~PORT_RWC_BITS; | 516 | temp &= ~PORT_RWC_BITS; |
515 | switch (wValue) { | 517 | switch (wValue) { |
516 | case USB_PORT_FEAT_SUSPEND: | 518 | case USB_PORT_FEAT_SUSPEND: |
519 | if (ehci->no_selective_suspend) | ||
520 | break; | ||
517 | if ((temp & PORT_PE) == 0 | 521 | if ((temp & PORT_PE) == 0 |
518 | || (temp & PORT_RESET) != 0) | 522 | || (temp & PORT_RESET) != 0) |
519 | goto error; | 523 | goto error; |
diff --git a/drivers/usb/host/ehci-mem.c b/drivers/usb/host/ehci-mem.c index 91c2ab43cbcc..766061e0260a 100644 --- a/drivers/usb/host/ehci-mem.c +++ b/drivers/usb/host/ehci-mem.c | |||
@@ -75,7 +75,6 @@ static void qh_destroy (struct kref *kref) | |||
75 | } | 75 | } |
76 | if (qh->dummy) | 76 | if (qh->dummy) |
77 | ehci_qtd_free (ehci, qh->dummy); | 77 | ehci_qtd_free (ehci, qh->dummy); |
78 | usb_put_dev (qh->dev); | ||
79 | dma_pool_free (ehci->qh_pool, qh, qh->qh_dma); | 78 | dma_pool_free (ehci->qh_pool, qh, qh->qh_dma); |
80 | } | 79 | } |
81 | 80 | ||
@@ -221,13 +220,9 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) | |||
221 | ehci->periodic [i] = EHCI_LIST_END; | 220 | ehci->periodic [i] = EHCI_LIST_END; |
222 | 221 | ||
223 | /* software shadow of hardware table */ | 222 | /* software shadow of hardware table */ |
224 | ehci->pshadow = kmalloc (ehci->periodic_size * sizeof (void *), flags); | 223 | ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags); |
225 | if (ehci->pshadow == NULL) { | 224 | if (ehci->pshadow != NULL) |
226 | goto fail; | 225 | return 0; |
227 | } | ||
228 | memset (ehci->pshadow, 0, ehci->periodic_size * sizeof (void *)); | ||
229 | |||
230 | return 0; | ||
231 | 226 | ||
232 | fail: | 227 | fail: |
233 | ehci_dbg (ehci, "couldn't init memory\n"); | 228 | ehci_dbg (ehci, "couldn't init memory\n"); |
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index 3a6687df5594..1e03f1a5a5fd 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c | |||
@@ -106,11 +106,11 @@ static int ehci_pci_setup(struct usb_hcd *hcd) | |||
106 | } | 106 | } |
107 | break; | 107 | break; |
108 | case PCI_VENDOR_ID_NVIDIA: | 108 | case PCI_VENDOR_ID_NVIDIA: |
109 | switch (pdev->device) { | ||
109 | /* NVidia reports that certain chips don't handle | 110 | /* NVidia reports that certain chips don't handle |
110 | * QH, ITD, or SITD addresses above 2GB. (But TD, | 111 | * QH, ITD, or SITD addresses above 2GB. (But TD, |
111 | * data buffer, and periodic schedule are normal.) | 112 | * data buffer, and periodic schedule are normal.) |
112 | */ | 113 | */ |
113 | switch (pdev->device) { | ||
114 | case 0x003c: /* MCP04 */ | 114 | case 0x003c: /* MCP04 */ |
115 | case 0x005b: /* CK804 */ | 115 | case 0x005b: /* CK804 */ |
116 | case 0x00d8: /* CK8 */ | 116 | case 0x00d8: /* CK8 */ |
@@ -120,6 +120,14 @@ static int ehci_pci_setup(struct usb_hcd *hcd) | |||
120 | ehci_warn(ehci, "can't enable NVidia " | 120 | ehci_warn(ehci, "can't enable NVidia " |
121 | "workaround for >2GB RAM\n"); | 121 | "workaround for >2GB RAM\n"); |
122 | break; | 122 | break; |
123 | /* Some NForce2 chips have problems with selective suspend; | ||
124 | * fixed in newer silicon. | ||
125 | */ | ||
126 | case 0x0068: | ||
127 | pci_read_config_dword(pdev, PCI_REVISION_ID, &temp); | ||
128 | if ((temp & 0xff) < 0xa4) | ||
129 | ehci->no_selective_suspend = 1; | ||
130 | break; | ||
123 | } | 131 | } |
124 | break; | 132 | break; |
125 | } | 133 | } |
@@ -163,6 +171,21 @@ static int ehci_pci_setup(struct usb_hcd *hcd) | |||
163 | device_init_wakeup(&pdev->dev, 1); | 171 | device_init_wakeup(&pdev->dev, 1); |
164 | } | 172 | } |
165 | 173 | ||
174 | #ifdef CONFIG_USB_SUSPEND | ||
175 | /* REVISIT: the controller works fine for wakeup iff the root hub | ||
176 | * itself is "globally" suspended, but usbcore currently doesn't | ||
177 | * understand such things. | ||
178 | * | ||
179 | * System suspend currently expects to be able to suspend the entire | ||
180 | * device tree, device-at-a-time. If we failed selective suspend | ||
181 | * reports, system suspend would fail; so the root hub code must claim | ||
182 | * success. That's lying to usbcore, and it matters for for runtime | ||
183 | * PM scenarios with selective suspend and remote wakeup... | ||
184 | */ | ||
185 | if (ehci->no_selective_suspend && device_can_wakeup(&pdev->dev)) | ||
186 | ehci_warn(ehci, "selective suspend/wakeup unavailable\n"); | ||
187 | #endif | ||
188 | |||
166 | retval = ehci_pci_reinit(ehci, pdev); | 189 | retval = ehci_pci_reinit(ehci, pdev); |
167 | done: | 190 | done: |
168 | return retval; | 191 | return retval; |
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index 9b13bf2fa98d..e469221e7ec3 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c | |||
@@ -702,7 +702,7 @@ qh_make ( | |||
702 | } | 702 | } |
703 | 703 | ||
704 | /* support for tt scheduling, and access to toggles */ | 704 | /* support for tt scheduling, and access to toggles */ |
705 | qh->dev = usb_get_dev (urb->dev); | 705 | qh->dev = urb->dev; |
706 | 706 | ||
707 | /* using TT? */ | 707 | /* using TT? */ |
708 | switch (urb->dev->speed) { | 708 | switch (urb->dev->speed) { |
@@ -721,7 +721,14 @@ qh_make ( | |||
721 | info1 |= maxp << 16; | 721 | info1 |= maxp << 16; |
722 | 722 | ||
723 | info2 |= (EHCI_TUNE_MULT_TT << 30); | 723 | info2 |= (EHCI_TUNE_MULT_TT << 30); |
724 | info2 |= urb->dev->ttport << 23; | 724 | |
725 | /* Some Freescale processors have an erratum in which the | ||
726 | * port number in the queue head was 0..N-1 instead of 1..N. | ||
727 | */ | ||
728 | if (ehci_has_fsl_portno_bug(ehci)) | ||
729 | info2 |= (urb->dev->ttport-1) << 23; | ||
730 | else | ||
731 | info2 |= urb->dev->ttport << 23; | ||
725 | 732 | ||
726 | /* set the address of the TT; for TDI's integrated | 733 | /* set the address of the TT; for TDI's integrated |
727 | * root hub tt, leave it zeroed. | 734 | * root hub tt, leave it zeroed. |
@@ -1015,12 +1022,14 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh) | |||
1015 | /* stop async schedule right now? */ | 1022 | /* stop async schedule right now? */ |
1016 | if (unlikely (qh == ehci->async)) { | 1023 | if (unlikely (qh == ehci->async)) { |
1017 | /* can't get here without STS_ASS set */ | 1024 | /* can't get here without STS_ASS set */ |
1018 | if (ehci_to_hcd(ehci)->state != HC_STATE_HALT) { | 1025 | if (ehci_to_hcd(ehci)->state != HC_STATE_HALT |
1026 | && !ehci->reclaim) { | ||
1027 | /* ... and CMD_IAAD clear */ | ||
1019 | writel (cmd & ~CMD_ASE, &ehci->regs->command); | 1028 | writel (cmd & ~CMD_ASE, &ehci->regs->command); |
1020 | wmb (); | 1029 | wmb (); |
1021 | // handshake later, if we need to | 1030 | // handshake later, if we need to |
1031 | timer_action_done (ehci, TIMER_ASYNC_OFF); | ||
1022 | } | 1032 | } |
1023 | timer_action_done (ehci, TIMER_ASYNC_OFF); | ||
1024 | return; | 1033 | return; |
1025 | } | 1034 | } |
1026 | 1035 | ||
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c index ebcca9700671..5871944e6145 100644 --- a/drivers/usb/host/ehci-sched.c +++ b/drivers/usb/host/ehci-sched.c | |||
@@ -707,6 +707,7 @@ iso_stream_init ( | |||
707 | } else { | 707 | } else { |
708 | u32 addr; | 708 | u32 addr; |
709 | int think_time; | 709 | int think_time; |
710 | int hs_transfers; | ||
710 | 711 | ||
711 | addr = dev->ttport << 24; | 712 | addr = dev->ttport << 24; |
712 | if (!ehci_is_TDI(ehci) | 713 | if (!ehci_is_TDI(ehci) |
@@ -719,6 +720,7 @@ iso_stream_init ( | |||
719 | think_time = dev->tt ? dev->tt->think_time : 0; | 720 | think_time = dev->tt ? dev->tt->think_time : 0; |
720 | stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time ( | 721 | stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time ( |
721 | dev->speed, is_input, 1, maxp)); | 722 | dev->speed, is_input, 1, maxp)); |
723 | hs_transfers = max (1u, (maxp + 187) / 188); | ||
722 | if (is_input) { | 724 | if (is_input) { |
723 | u32 tmp; | 725 | u32 tmp; |
724 | 726 | ||
@@ -727,12 +729,11 @@ iso_stream_init ( | |||
727 | stream->usecs = HS_USECS_ISO (1); | 729 | stream->usecs = HS_USECS_ISO (1); |
728 | stream->raw_mask = 1; | 730 | stream->raw_mask = 1; |
729 | 731 | ||
730 | /* pessimistic c-mask */ | 732 | /* c-mask as specified in USB 2.0 11.18.4 3.c */ |
731 | tmp = usb_calc_bus_time (USB_SPEED_FULL, 1, 0, maxp) | 733 | tmp = (1 << (hs_transfers + 2)) - 1; |
732 | / (125 * 1000); | 734 | stream->raw_mask |= tmp << (8 + 2); |
733 | stream->raw_mask |= 3 << (tmp + 9); | ||
734 | } else | 735 | } else |
735 | stream->raw_mask = smask_out [maxp / 188]; | 736 | stream->raw_mask = smask_out [hs_transfers - 1]; |
736 | bandwidth = stream->usecs + stream->c_usecs; | 737 | bandwidth = stream->usecs + stream->c_usecs; |
737 | bandwidth /= 1 << (interval + 2); | 738 | bandwidth /= 1 << (interval + 2); |
738 | 739 | ||
@@ -863,9 +864,8 @@ iso_sched_alloc (unsigned packets, gfp_t mem_flags) | |||
863 | int size = sizeof *iso_sched; | 864 | int size = sizeof *iso_sched; |
864 | 865 | ||
865 | size += packets * sizeof (struct ehci_iso_packet); | 866 | size += packets * sizeof (struct ehci_iso_packet); |
866 | iso_sched = kmalloc (size, mem_flags); | 867 | iso_sched = kzalloc(size, mem_flags); |
867 | if (likely (iso_sched != NULL)) { | 868 | if (likely (iso_sched != NULL)) { |
868 | memset(iso_sched, 0, size); | ||
869 | INIT_LIST_HEAD (&iso_sched->td_list); | 869 | INIT_LIST_HEAD (&iso_sched->td_list); |
870 | } | 870 | } |
871 | return iso_sched; | 871 | return iso_sched; |
@@ -1398,7 +1398,7 @@ itd_complete ( | |||
1398 | */ | 1398 | */ |
1399 | 1399 | ||
1400 | /* give urb back to the driver ... can be out-of-order */ | 1400 | /* give urb back to the driver ... can be out-of-order */ |
1401 | dev = usb_get_dev (urb->dev); | 1401 | dev = urb->dev; |
1402 | ehci_urb_done (ehci, urb, regs); | 1402 | ehci_urb_done (ehci, urb, regs); |
1403 | urb = NULL; | 1403 | urb = NULL; |
1404 | 1404 | ||
@@ -1417,7 +1417,6 @@ itd_complete ( | |||
1417 | (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out"); | 1417 | (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out"); |
1418 | } | 1418 | } |
1419 | iso_stream_put (ehci, stream); | 1419 | iso_stream_put (ehci, stream); |
1420 | usb_put_dev (dev); | ||
1421 | 1420 | ||
1422 | return 1; | 1421 | return 1; |
1423 | } | 1422 | } |
@@ -1764,7 +1763,7 @@ sitd_complete ( | |||
1764 | */ | 1763 | */ |
1765 | 1764 | ||
1766 | /* give urb back to the driver */ | 1765 | /* give urb back to the driver */ |
1767 | dev = usb_get_dev (urb->dev); | 1766 | dev = urb->dev; |
1768 | ehci_urb_done (ehci, urb, regs); | 1767 | ehci_urb_done (ehci, urb, regs); |
1769 | urb = NULL; | 1768 | urb = NULL; |
1770 | 1769 | ||
@@ -1783,7 +1782,6 @@ sitd_complete ( | |||
1783 | (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out"); | 1782 | (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out"); |
1784 | } | 1783 | } |
1785 | iso_stream_put (ehci, stream); | 1784 | iso_stream_put (ehci, stream); |
1786 | usb_put_dev (dev); | ||
1787 | 1785 | ||
1788 | return 1; | 1786 | return 1; |
1789 | } | 1787 | } |
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index 18e257c2bdb5..679c1cdcc915 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h | |||
@@ -88,7 +88,12 @@ struct ehci_hcd { /* one per controller */ | |||
88 | unsigned long next_statechange; | 88 | unsigned long next_statechange; |
89 | u32 command; | 89 | u32 command; |
90 | 90 | ||
91 | /* SILICON QUIRKS */ | ||
91 | unsigned is_tdi_rh_tt:1; /* TDI roothub with TT */ | 92 | unsigned is_tdi_rh_tt:1; /* TDI roothub with TT */ |
93 | unsigned no_selective_suspend:1; | ||
94 | unsigned has_fsl_port_bug:1; /* FreeScale */ | ||
95 | |||
96 | u8 sbrn; /* packed release number */ | ||
92 | 97 | ||
93 | /* irq statistics */ | 98 | /* irq statistics */ |
94 | #ifdef EHCI_STATS | 99 | #ifdef EHCI_STATS |
@@ -97,7 +102,6 @@ struct ehci_hcd { /* one per controller */ | |||
97 | #else | 102 | #else |
98 | # define COUNT(x) do {} while (0) | 103 | # define COUNT(x) do {} while (0) |
99 | #endif | 104 | #endif |
100 | u8 sbrn; /* packed release number */ | ||
101 | }; | 105 | }; |
102 | 106 | ||
103 | /* convert between an HCD pointer and the corresponding EHCI_HCD */ | 107 | /* convert between an HCD pointer and the corresponding EHCI_HCD */ |
@@ -638,6 +642,18 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) | |||
638 | 642 | ||
639 | /*-------------------------------------------------------------------------*/ | 643 | /*-------------------------------------------------------------------------*/ |
640 | 644 | ||
645 | #ifdef CONFIG_PPC_83xx | ||
646 | /* Some Freescale processors have an erratum in which the TT | ||
647 | * port number in the queue head was 0..N-1 instead of 1..N. | ||
648 | */ | ||
649 | #define ehci_has_fsl_portno_bug(e) ((e)->has_fsl_port_bug) | ||
650 | #else | ||
651 | #define ehci_has_fsl_portno_bug(e) (0) | ||
652 | #endif | ||
653 | |||
654 | |||
655 | /*-------------------------------------------------------------------------*/ | ||
656 | |||
641 | #ifndef DEBUG | 657 | #ifndef DEBUG |
642 | #define STUB_DEBUG_FILES | 658 | #define STUB_DEBUG_FILES |
643 | #endif /* DEBUG */ | 659 | #endif /* DEBUG */ |
diff --git a/drivers/usb/host/hc_crisv10.c b/drivers/usb/host/hc_crisv10.c index 641268d7e6f3..2fe7fd19437b 100644 --- a/drivers/usb/host/hc_crisv10.c +++ b/drivers/usb/host/hc_crisv10.c | |||
@@ -2137,10 +2137,9 @@ static int etrax_usb_submit_bulk_urb(struct urb *urb) | |||
2137 | urb->status = -EINPROGRESS; | 2137 | urb->status = -EINPROGRESS; |
2138 | 2138 | ||
2139 | /* Setup the hcpriv data. */ | 2139 | /* Setup the hcpriv data. */ |
2140 | urb_priv = kmalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG); | 2140 | urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG); |
2141 | assert(urb_priv != NULL); | 2141 | assert(urb_priv != NULL); |
2142 | /* This sets rx_offset to 0. */ | 2142 | /* This sets rx_offset to 0. */ |
2143 | memset(urb_priv, 0, sizeof(etrax_urb_priv_t)); | ||
2144 | urb_priv->urb_state = NOT_STARTED; | 2143 | urb_priv->urb_state = NOT_STARTED; |
2145 | urb->hcpriv = urb_priv; | 2144 | urb->hcpriv = urb_priv; |
2146 | 2145 | ||
@@ -2475,10 +2474,9 @@ static int etrax_usb_submit_ctrl_urb(struct urb *urb) | |||
2475 | urb->status = -EINPROGRESS; | 2474 | urb->status = -EINPROGRESS; |
2476 | 2475 | ||
2477 | /* Setup the hcpriv data. */ | 2476 | /* Setup the hcpriv data. */ |
2478 | urb_priv = kmalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG); | 2477 | urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG); |
2479 | assert(urb_priv != NULL); | 2478 | assert(urb_priv != NULL); |
2480 | /* This sets rx_offset to 0. */ | 2479 | /* This sets rx_offset to 0. */ |
2481 | memset(urb_priv, 0, sizeof(etrax_urb_priv_t)); | ||
2482 | urb_priv->urb_state = NOT_STARTED; | 2480 | urb_priv->urb_state = NOT_STARTED; |
2483 | urb->hcpriv = urb_priv; | 2481 | urb->hcpriv = urb_priv; |
2484 | 2482 | ||
@@ -2767,9 +2765,8 @@ static void etrax_usb_add_to_intr_sb_list(struct urb *urb, int epid) | |||
2767 | maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); | 2765 | maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); |
2768 | interval = urb->interval; | 2766 | interval = urb->interval; |
2769 | 2767 | ||
2770 | urb_priv = kmalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG); | 2768 | urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG); |
2771 | assert(urb_priv != NULL); | 2769 | assert(urb_priv != NULL); |
2772 | memset(urb_priv, 0, sizeof(etrax_urb_priv_t)); | ||
2773 | urb->hcpriv = urb_priv; | 2770 | urb->hcpriv = urb_priv; |
2774 | 2771 | ||
2775 | first_ep = &TxIntrEPList[0]; | 2772 | first_ep = &TxIntrEPList[0]; |
@@ -2997,9 +2994,8 @@ static void etrax_usb_add_to_isoc_sb_list(struct urb *urb, int epid) | |||
2997 | 2994 | ||
2998 | prev_sb_desc = next_sb_desc = temp_sb_desc = NULL; | 2995 | prev_sb_desc = next_sb_desc = temp_sb_desc = NULL; |
2999 | 2996 | ||
3000 | urb_priv = kmalloc(sizeof(etrax_urb_priv_t), GFP_ATOMIC); | 2997 | urb_priv = kzalloc(sizeof(etrax_urb_priv_t), GFP_ATOMIC); |
3001 | assert(urb_priv != NULL); | 2998 | assert(urb_priv != NULL); |
3002 | memset(urb_priv, 0, sizeof(etrax_urb_priv_t)); | ||
3003 | 2999 | ||
3004 | urb->hcpriv = urb_priv; | 3000 | urb->hcpriv = urb_priv; |
3005 | urb_priv->epid = epid; | 3001 | urb_priv->epid = epid; |
diff --git a/drivers/usb/host/isp116x-hcd.c b/drivers/usb/host/isp116x-hcd.c index 972ce04889f8..e99210b7909b 100644 --- a/drivers/usb/host/isp116x-hcd.c +++ b/drivers/usb/host/isp116x-hcd.c | |||
@@ -724,7 +724,7 @@ static int isp116x_urb_enqueue(struct usb_hcd *hcd, | |||
724 | ep = hep->hcpriv; | 724 | ep = hep->hcpriv; |
725 | else { | 725 | else { |
726 | INIT_LIST_HEAD(&ep->schedule); | 726 | INIT_LIST_HEAD(&ep->schedule); |
727 | ep->udev = usb_get_dev(udev); | 727 | ep->udev = udev; |
728 | ep->epnum = epnum; | 728 | ep->epnum = epnum; |
729 | ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); | 729 | ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); |
730 | usb_settoggle(udev, epnum, is_out, 0); | 730 | usb_settoggle(udev, epnum, is_out, 0); |
@@ -891,7 +891,6 @@ static void isp116x_endpoint_disable(struct usb_hcd *hcd, | |||
891 | if (!list_empty(&hep->urb_list)) | 891 | if (!list_empty(&hep->urb_list)) |
892 | WARN("ep %p not empty?\n", ep); | 892 | WARN("ep %p not empty?\n", ep); |
893 | 893 | ||
894 | usb_put_dev(ep->udev); | ||
895 | kfree(ep); | 894 | kfree(ep); |
896 | hep->hcpriv = NULL; | 895 | hep->hcpriv = NULL; |
897 | } | 896 | } |
@@ -1553,7 +1552,7 @@ static struct hc_driver isp116x_hc_driver = { | |||
1553 | 1552 | ||
1554 | /*----------------------------------------------------------------*/ | 1553 | /*----------------------------------------------------------------*/ |
1555 | 1554 | ||
1556 | static int __init_or_module isp116x_remove(struct platform_device *pdev) | 1555 | static int isp116x_remove(struct platform_device *pdev) |
1557 | { | 1556 | { |
1558 | struct usb_hcd *hcd = platform_get_drvdata(pdev); | 1557 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
1559 | struct isp116x *isp116x; | 1558 | struct isp116x *isp116x; |
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c new file mode 100644 index 000000000000..980030d684d5 --- /dev/null +++ b/drivers/usb/host/ohci-at91.c | |||
@@ -0,0 +1,306 @@ | |||
1 | /* | ||
2 | * OHCI HCD (Host Controller Driver) for USB. | ||
3 | * | ||
4 | * Copyright (C) 2004 SAN People (Pty) Ltd. | ||
5 | * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> | ||
6 | * | ||
7 | * AT91RM9200 Bus Glue | ||
8 | * | ||
9 | * Based on fragments of 2.4 driver by Rick Bronson. | ||
10 | * Based on ohci-omap.c | ||
11 | * | ||
12 | * This file is licenced under the GPL. | ||
13 | */ | ||
14 | |||
15 | #include <linux/clk.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <asm/mach-types.h> | ||
19 | #include <asm/hardware.h> | ||
20 | #include <asm/arch/board.h> | ||
21 | |||
22 | #ifndef CONFIG_ARCH_AT91RM9200 | ||
23 | #error "This file is AT91RM9200 bus glue. CONFIG_ARCH_AT91RM9200 must be defined." | ||
24 | #endif | ||
25 | |||
26 | /* interface and function clocks */ | ||
27 | static struct clk *iclk, *fclk; | ||
28 | |||
29 | extern int usb_disabled(void); | ||
30 | |||
31 | /*-------------------------------------------------------------------------*/ | ||
32 | |||
33 | static void at91_start_hc(struct platform_device *pdev) | ||
34 | { | ||
35 | struct usb_hcd *hcd = platform_get_drvdata(pdev); | ||
36 | struct ohci_regs __iomem *regs = hcd->regs; | ||
37 | |||
38 | dev_dbg(&pdev->dev, "starting AT91RM9200 OHCI USB Controller\n"); | ||
39 | |||
40 | /* | ||
41 | * Start the USB clocks. | ||
42 | */ | ||
43 | clk_enable(iclk); | ||
44 | clk_enable(fclk); | ||
45 | |||
46 | /* | ||
47 | * The USB host controller must remain in reset. | ||
48 | */ | ||
49 | writel(0, ®s->control); | ||
50 | } | ||
51 | |||
52 | static void at91_stop_hc(struct platform_device *pdev) | ||
53 | { | ||
54 | struct usb_hcd *hcd = platform_get_drvdata(pdev); | ||
55 | struct ohci_regs __iomem *regs = hcd->regs; | ||
56 | |||
57 | dev_dbg(&pdev->dev, "stopping AT91RM9200 OHCI USB Controller\n"); | ||
58 | |||
59 | /* | ||
60 | * Put the USB host controller into reset. | ||
61 | */ | ||
62 | writel(0, ®s->control); | ||
63 | |||
64 | /* | ||
65 | * Stop the USB clocks. | ||
66 | */ | ||
67 | clk_disable(fclk); | ||
68 | clk_disable(iclk); | ||
69 | } | ||
70 | |||
71 | |||
72 | /*-------------------------------------------------------------------------*/ | ||
73 | |||
74 | static int usb_hcd_at91_remove (struct usb_hcd *, struct platform_device *); | ||
75 | |||
76 | /* configure so an HC device and id are always provided */ | ||
77 | /* always called with process context; sleeping is OK */ | ||
78 | |||
79 | |||
80 | /** | ||
81 | * usb_hcd_at91_probe - initialize AT91RM9200-based HCDs | ||
82 | * Context: !in_interrupt() | ||
83 | * | ||
84 | * Allocates basic resources for this USB host controller, and | ||
85 | * then invokes the start() method for the HCD associated with it | ||
86 | * through the hotplug entry's driver_data. | ||
87 | * | ||
88 | * Store this function in the HCD's struct pci_driver as probe(). | ||
89 | */ | ||
90 | int usb_hcd_at91_probe (const struct hc_driver *driver, struct platform_device *pdev) | ||
91 | { | ||
92 | int retval; | ||
93 | struct usb_hcd *hcd = NULL; | ||
94 | |||
95 | if (pdev->num_resources != 2) { | ||
96 | pr_debug("hcd probe: invalid num_resources"); | ||
97 | return -ENODEV; | ||
98 | } | ||
99 | |||
100 | if ((pdev->resource[0].flags != IORESOURCE_MEM) || (pdev->resource[1].flags != IORESOURCE_IRQ)) { | ||
101 | pr_debug("hcd probe: invalid resource type\n"); | ||
102 | return -ENODEV; | ||
103 | } | ||
104 | |||
105 | hcd = usb_create_hcd(driver, &pdev->dev, "at91rm9200"); | ||
106 | if (!hcd) | ||
107 | return -ENOMEM; | ||
108 | hcd->rsrc_start = pdev->resource[0].start; | ||
109 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | ||
110 | |||
111 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | ||
112 | pr_debug("request_mem_region failed\n"); | ||
113 | retval = -EBUSY; | ||
114 | goto err1; | ||
115 | } | ||
116 | |||
117 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); | ||
118 | if (!hcd->regs) { | ||
119 | pr_debug("ioremap failed\n"); | ||
120 | retval = -EIO; | ||
121 | goto err2; | ||
122 | } | ||
123 | |||
124 | iclk = clk_get(&pdev->dev, "ohci_clk"); | ||
125 | fclk = clk_get(&pdev->dev, "uhpck"); | ||
126 | |||
127 | at91_start_hc(pdev); | ||
128 | ohci_hcd_init(hcd_to_ohci(hcd)); | ||
129 | |||
130 | retval = usb_add_hcd(hcd, pdev->resource[1].start, SA_INTERRUPT); | ||
131 | if (retval == 0) | ||
132 | return retval; | ||
133 | |||
134 | /* Error handling */ | ||
135 | at91_stop_hc(pdev); | ||
136 | |||
137 | clk_put(fclk); | ||
138 | clk_put(iclk); | ||
139 | |||
140 | iounmap(hcd->regs); | ||
141 | |||
142 | err2: | ||
143 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | ||
144 | |||
145 | err1: | ||
146 | usb_put_hcd(hcd); | ||
147 | return retval; | ||
148 | } | ||
149 | |||
150 | |||
151 | /* may be called without controller electrically present */ | ||
152 | /* may be called with controller, bus, and devices active */ | ||
153 | |||
154 | /** | ||
155 | * usb_hcd_at91_remove - shutdown processing for AT91RM9200-based HCDs | ||
156 | * @dev: USB Host Controller being removed | ||
157 | * Context: !in_interrupt() | ||
158 | * | ||
159 | * Reverses the effect of usb_hcd_at91_probe(), first invoking | ||
160 | * the HCD's stop() method. It is always called from a thread | ||
161 | * context, normally "rmmod", "apmd", or something similar. | ||
162 | * | ||
163 | */ | ||
164 | static int usb_hcd_at91_remove (struct usb_hcd *hcd, struct platform_device *pdev) | ||
165 | { | ||
166 | usb_remove_hcd(hcd); | ||
167 | at91_stop_hc(pdev); | ||
168 | iounmap(hcd->regs); | ||
169 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | ||
170 | |||
171 | clk_put(fclk); | ||
172 | clk_put(iclk); | ||
173 | fclk = iclk = NULL; | ||
174 | |||
175 | dev_set_drvdata(&pdev->dev, NULL); | ||
176 | return 0; | ||
177 | } | ||
178 | |||
179 | /*-------------------------------------------------------------------------*/ | ||
180 | |||
181 | static int __devinit | ||
182 | ohci_at91_start (struct usb_hcd *hcd) | ||
183 | { | ||
184 | // struct at91_ohci_data *board = hcd->self.controller->platform_data; | ||
185 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | ||
186 | int ret; | ||
187 | |||
188 | if ((ret = ohci_init(ohci)) < 0) | ||
189 | return ret; | ||
190 | |||
191 | if ((ret = ohci_run(ohci)) < 0) { | ||
192 | err("can't start %s", hcd->self.bus_name); | ||
193 | ohci_stop(hcd); | ||
194 | return ret; | ||
195 | } | ||
196 | // hcd->self.root_hub->maxchild = board->ports; | ||
197 | return 0; | ||
198 | } | ||
199 | |||
200 | /*-------------------------------------------------------------------------*/ | ||
201 | |||
202 | static const struct hc_driver ohci_at91_hc_driver = { | ||
203 | .description = hcd_name, | ||
204 | .product_desc = "AT91RM9200 OHCI", | ||
205 | .hcd_priv_size = sizeof(struct ohci_hcd), | ||
206 | |||
207 | /* | ||
208 | * generic hardware linkage | ||
209 | */ | ||
210 | .irq = ohci_irq, | ||
211 | .flags = HCD_USB11 | HCD_MEMORY, | ||
212 | |||
213 | /* | ||
214 | * basic lifecycle operations | ||
215 | */ | ||
216 | .start = ohci_at91_start, | ||
217 | .stop = ohci_stop, | ||
218 | |||
219 | /* | ||
220 | * managing i/o requests and associated device resources | ||
221 | */ | ||
222 | .urb_enqueue = ohci_urb_enqueue, | ||
223 | .urb_dequeue = ohci_urb_dequeue, | ||
224 | .endpoint_disable = ohci_endpoint_disable, | ||
225 | |||
226 | /* | ||
227 | * scheduling support | ||
228 | */ | ||
229 | .get_frame_number = ohci_get_frame, | ||
230 | |||
231 | /* | ||
232 | * root hub support | ||
233 | */ | ||
234 | .hub_status_data = ohci_hub_status_data, | ||
235 | .hub_control = ohci_hub_control, | ||
236 | |||
237 | #ifdef CONFIG_PM | ||
238 | .hub_suspend = ohci_hub_suspend, | ||
239 | .hub_resume = ohci_hub_resume, | ||
240 | #endif | ||
241 | .start_port_reset = ohci_start_port_reset, | ||
242 | }; | ||
243 | |||
244 | /*-------------------------------------------------------------------------*/ | ||
245 | |||
246 | static int ohci_hcd_at91_drv_probe(struct platform_device *dev) | ||
247 | { | ||
248 | return usb_hcd_at91_probe(&ohci_at91_hc_driver, dev); | ||
249 | } | ||
250 | |||
251 | static int ohci_hcd_at91_drv_remove(struct platform_device *dev) | ||
252 | { | ||
253 | return usb_hcd_at91_remove(platform_get_drvdata(dev), dev); | ||
254 | } | ||
255 | |||
256 | #ifdef CONFIG_PM | ||
257 | static int ohci_hcd_at91_drv_suspend(struct platform_device *dev, u32 state, u32 level) | ||
258 | { | ||
259 | printk("%s(%s:%d): not implemented yet\n", | ||
260 | __func__, __FILE__, __LINE__); | ||
261 | |||
262 | clk_disable(fclk); | ||
263 | |||
264 | return 0; | ||
265 | } | ||
266 | |||
267 | static int ohci_hcd_at91_drv_resume(struct platform_device *dev, u32 state) | ||
268 | { | ||
269 | printk("%s(%s:%d): not implemented yet\n", | ||
270 | __func__, __FILE__, __LINE__); | ||
271 | |||
272 | clk_enable(fclk); | ||
273 | |||
274 | return 0; | ||
275 | } | ||
276 | #else | ||
277 | #define ohci_hcd_at91_drv_suspend NULL | ||
278 | #define ohci_hcd_at91_drv_resume NULL | ||
279 | #endif | ||
280 | |||
281 | static struct platform_driver ohci_hcd_at91_driver = { | ||
282 | .probe = ohci_hcd_at91_drv_probe, | ||
283 | .remove = ohci_hcd_at91_drv_remove, | ||
284 | .suspend = ohci_hcd_at91_drv_suspend, | ||
285 | .resume = ohci_hcd_at91_drv_resume, | ||
286 | .driver = { | ||
287 | .name = "at91rm9200-ohci", | ||
288 | .owner = THIS_MODULE, | ||
289 | }, | ||
290 | }; | ||
291 | |||
292 | static int __init ohci_hcd_at91_init (void) | ||
293 | { | ||
294 | if (usb_disabled()) | ||
295 | return -ENODEV; | ||
296 | |||
297 | return platform_driver_register(&ohci_hcd_at91_driver); | ||
298 | } | ||
299 | |||
300 | static void __exit ohci_hcd_at91_cleanup (void) | ||
301 | { | ||
302 | platform_driver_unregister(&ohci_hcd_at91_driver); | ||
303 | } | ||
304 | |||
305 | module_init (ohci_hcd_at91_init); | ||
306 | module_exit (ohci_hcd_at91_cleanup); | ||
diff --git a/drivers/usb/host/ohci-au1xxx.c b/drivers/usb/host/ohci-au1xxx.c index db280ca7b7a0..a1c8b3b2fcc7 100644 --- a/drivers/usb/host/ohci-au1xxx.c +++ b/drivers/usb/host/ohci-au1xxx.c | |||
@@ -23,6 +23,8 @@ | |||
23 | 23 | ||
24 | #include <asm/mach-au1x00/au1000.h> | 24 | #include <asm/mach-au1x00/au1000.h> |
25 | 25 | ||
26 | #ifndef CONFIG_SOC_AU1200 | ||
27 | |||
26 | #define USBH_ENABLE_BE (1<<0) | 28 | #define USBH_ENABLE_BE (1<<0) |
27 | #define USBH_ENABLE_C (1<<1) | 29 | #define USBH_ENABLE_C (1<<1) |
28 | #define USBH_ENABLE_E (1<<2) | 30 | #define USBH_ENABLE_E (1<<2) |
@@ -37,21 +39,68 @@ | |||
37 | #error not byte order defined | 39 | #error not byte order defined |
38 | #endif | 40 | #endif |
39 | 41 | ||
42 | #else /* Au1200 */ | ||
43 | |||
44 | #define USB_HOST_CONFIG (USB_MSR_BASE + USB_MSR_MCFG) | ||
45 | #define USB_MCFG_PFEN (1<<31) | ||
46 | #define USB_MCFG_RDCOMB (1<<30) | ||
47 | #define USB_MCFG_SSDEN (1<<23) | ||
48 | #define USB_MCFG_OHCCLKEN (1<<16) | ||
49 | #define USB_MCFG_UCAM (1<<7) | ||
50 | #define USB_MCFG_OBMEN (1<<1) | ||
51 | #define USB_MCFG_OMEMEN (1<<0) | ||
52 | |||
53 | #define USBH_ENABLE_CE USB_MCFG_OHCCLKEN | ||
54 | #ifdef CONFIG_DMA_COHERENT | ||
55 | #define USBH_ENABLE_INIT (USB_MCFG_OHCCLKEN \ | ||
56 | | USB_MCFG_PFEN | USB_MCFG_RDCOMB \ | ||
57 | | USB_MCFG_SSDEN | USB_MCFG_UCAM \ | ||
58 | | USB_MCFG_OBMEN | USB_MCFG_OMEMEN) | ||
59 | #else | ||
60 | #define USBH_ENABLE_INIT (USB_MCFG_OHCCLKEN \ | ||
61 | | USB_MCFG_PFEN | USB_MCFG_RDCOMB \ | ||
62 | | USB_MCFG_SSDEN \ | ||
63 | | USB_MCFG_OBMEN | USB_MCFG_OMEMEN) | ||
64 | #endif | ||
65 | #define USBH_DISABLE (USB_MCFG_OBMEN | USB_MCFG_OMEMEN) | ||
66 | |||
67 | #endif /* Au1200 */ | ||
68 | |||
40 | extern int usb_disabled(void); | 69 | extern int usb_disabled(void); |
41 | 70 | ||
42 | /*-------------------------------------------------------------------------*/ | 71 | /*-------------------------------------------------------------------------*/ |
43 | 72 | ||
44 | static void au1xxx_start_hc(struct platform_device *dev) | 73 | static void au1xxx_start_ohc(struct platform_device *dev) |
45 | { | 74 | { |
46 | printk(KERN_DEBUG __FILE__ | 75 | printk(KERN_DEBUG __FILE__ |
47 | ": starting Au1xxx OHCI USB Controller\n"); | 76 | ": starting Au1xxx OHCI USB Controller\n"); |
48 | 77 | ||
49 | /* enable host controller */ | 78 | /* enable host controller */ |
79 | |||
80 | #ifndef CONFIG_SOC_AU1200 | ||
81 | |||
50 | au_writel(USBH_ENABLE_CE, USB_HOST_CONFIG); | 82 | au_writel(USBH_ENABLE_CE, USB_HOST_CONFIG); |
51 | udelay(1000); | 83 | udelay(1000); |
52 | au_writel(USBH_ENABLE_INIT, USB_HOST_CONFIG); | 84 | au_writel(USBH_ENABLE_INIT, USB_HOST_CONFIG); |
53 | udelay(1000); | 85 | udelay(1000); |
54 | 86 | ||
87 | #else /* Au1200 */ | ||
88 | |||
89 | /* write HW defaults again in case Yamon cleared them */ | ||
90 | if (au_readl(USB_HOST_CONFIG) == 0) { | ||
91 | au_writel(0x00d02000, USB_HOST_CONFIG); | ||
92 | au_readl(USB_HOST_CONFIG); | ||
93 | udelay(1000); | ||
94 | } | ||
95 | au_writel(USBH_ENABLE_CE | au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); | ||
96 | au_readl(USB_HOST_CONFIG); | ||
97 | udelay(1000); | ||
98 | au_writel(USBH_ENABLE_INIT | au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); | ||
99 | au_readl(USB_HOST_CONFIG); | ||
100 | udelay(1000); | ||
101 | |||
102 | #endif /* Au1200 */ | ||
103 | |||
55 | /* wait for reset complete (read register twice; see au1500 errata) */ | 104 | /* wait for reset complete (read register twice; see au1500 errata) */ |
56 | while (au_readl(USB_HOST_CONFIG), | 105 | while (au_readl(USB_HOST_CONFIG), |
57 | !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD)) | 106 | !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD)) |
@@ -61,13 +110,25 @@ static void au1xxx_start_hc(struct platform_device *dev) | |||
61 | ": Clock to USB host has been enabled \n"); | 110 | ": Clock to USB host has been enabled \n"); |
62 | } | 111 | } |
63 | 112 | ||
64 | static void au1xxx_stop_hc(struct platform_device *dev) | 113 | static void au1xxx_stop_ohc(struct platform_device *dev) |
65 | { | 114 | { |
66 | printk(KERN_DEBUG __FILE__ | 115 | printk(KERN_DEBUG __FILE__ |
67 | ": stopping Au1xxx OHCI USB Controller\n"); | 116 | ": stopping Au1xxx OHCI USB Controller\n"); |
68 | 117 | ||
118 | #ifndef CONFIG_SOC_AU1200 | ||
119 | |||
69 | /* Disable clock */ | 120 | /* Disable clock */ |
70 | au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG); | 121 | au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG); |
122 | |||
123 | #else /* Au1200 */ | ||
124 | |||
125 | /* Disable mem */ | ||
126 | au_writel(~USBH_DISABLE & au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); | ||
127 | udelay(1000); | ||
128 | /* Disable clock */ | ||
129 | au_writel(~USBH_ENABLE_CE & au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); | ||
130 | au_readl(USB_HOST_CONFIG); | ||
131 | #endif /* Au1200 */ | ||
71 | } | 132 | } |
72 | 133 | ||
73 | 134 | ||
@@ -78,7 +139,7 @@ static void au1xxx_stop_hc(struct platform_device *dev) | |||
78 | 139 | ||
79 | 140 | ||
80 | /** | 141 | /** |
81 | * usb_hcd_au1xxx_probe - initialize Au1xxx-based HCDs | 142 | * usb_ohci_au1xxx_probe - initialize Au1xxx-based HCDs |
82 | * Context: !in_interrupt() | 143 | * Context: !in_interrupt() |
83 | * | 144 | * |
84 | * Allocates basic resources for this USB host controller, and | 145 | * Allocates basic resources for this USB host controller, and |
@@ -86,14 +147,25 @@ static void au1xxx_stop_hc(struct platform_device *dev) | |||
86 | * through the hotplug entry's driver_data. | 147 | * through the hotplug entry's driver_data. |
87 | * | 148 | * |
88 | */ | 149 | */ |
89 | int usb_hcd_au1xxx_probe (const struct hc_driver *driver, | 150 | static int usb_ohci_au1xxx_probe(const struct hc_driver *driver, |
90 | struct platform_device *dev) | 151 | struct platform_device *dev) |
91 | { | 152 | { |
92 | int retval; | 153 | int retval; |
93 | struct usb_hcd *hcd; | 154 | struct usb_hcd *hcd; |
94 | 155 | ||
95 | if(dev->resource[1].flags != IORESOURCE_IRQ) { | 156 | #if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT) |
96 | pr_debug ("resource[1] is not IORESOURCE_IRQ"); | 157 | /* Au1200 AB USB does not support coherent memory */ |
158 | if (!(read_c0_prid() & 0xff)) { | ||
159 | pr_info("%s: this is chip revision AB !!\n", | ||
160 | dev->dev.name); | ||
161 | pr_info("%s: update your board or re-configure the kernel\n", | ||
162 | dev->dev.name); | ||
163 | return -ENODEV; | ||
164 | } | ||
165 | #endif | ||
166 | |||
167 | if (dev->resource[1].flags != IORESOURCE_IRQ) { | ||
168 | pr_debug("resource[1] is not IORESOURCE_IRQ\n"); | ||
97 | return -ENOMEM; | 169 | return -ENOMEM; |
98 | } | 170 | } |
99 | 171 | ||
@@ -104,26 +176,26 @@ int usb_hcd_au1xxx_probe (const struct hc_driver *driver, | |||
104 | hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1; | 176 | hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1; |
105 | 177 | ||
106 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 178 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
107 | pr_debug("request_mem_region failed"); | 179 | pr_debug("request_mem_region failed\n"); |
108 | retval = -EBUSY; | 180 | retval = -EBUSY; |
109 | goto err1; | 181 | goto err1; |
110 | } | 182 | } |
111 | 183 | ||
112 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); | 184 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); |
113 | if (!hcd->regs) { | 185 | if (!hcd->regs) { |
114 | pr_debug("ioremap failed"); | 186 | pr_debug("ioremap failed\n"); |
115 | retval = -ENOMEM; | 187 | retval = -ENOMEM; |
116 | goto err2; | 188 | goto err2; |
117 | } | 189 | } |
118 | 190 | ||
119 | au1xxx_start_hc(dev); | 191 | au1xxx_start_ohc(dev); |
120 | ohci_hcd_init(hcd_to_ohci(hcd)); | 192 | ohci_hcd_init(hcd_to_ohci(hcd)); |
121 | 193 | ||
122 | retval = usb_add_hcd(hcd, dev->resource[1].start, SA_INTERRUPT); | 194 | retval = usb_add_hcd(hcd, dev->resource[1].start, SA_INTERRUPT | SA_SHIRQ); |
123 | if (retval == 0) | 195 | if (retval == 0) |
124 | return retval; | 196 | return retval; |
125 | 197 | ||
126 | au1xxx_stop_hc(dev); | 198 | au1xxx_stop_ohc(dev); |
127 | iounmap(hcd->regs); | 199 | iounmap(hcd->regs); |
128 | err2: | 200 | err2: |
129 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | 201 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
@@ -146,10 +218,10 @@ int usb_hcd_au1xxx_probe (const struct hc_driver *driver, | |||
146 | * context, normally "rmmod", "apmd", or something similar. | 218 | * context, normally "rmmod", "apmd", or something similar. |
147 | * | 219 | * |
148 | */ | 220 | */ |
149 | void usb_hcd_au1xxx_remove (struct usb_hcd *hcd, struct platform_device *dev) | 221 | static void usb_ohci_au1xxx_remove(struct usb_hcd *hcd, struct platform_device *dev) |
150 | { | 222 | { |
151 | usb_remove_hcd(hcd); | 223 | usb_remove_hcd(hcd); |
152 | au1xxx_stop_hc(dev); | 224 | au1xxx_stop_ohc(dev); |
153 | iounmap(hcd->regs); | 225 | iounmap(hcd->regs); |
154 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | 226 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
155 | usb_put_hcd(hcd); | 227 | usb_put_hcd(hcd); |
@@ -235,7 +307,7 @@ static int ohci_hcd_au1xxx_drv_probe(struct platform_device *pdev) | |||
235 | if (usb_disabled()) | 307 | if (usb_disabled()) |
236 | return -ENODEV; | 308 | return -ENODEV; |
237 | 309 | ||
238 | ret = usb_hcd_au1xxx_probe(&ohci_au1xxx_hc_driver, pdev); | 310 | ret = usb_ohci_au1xxx_probe(&ohci_au1xxx_hc_driver, pdev); |
239 | return ret; | 311 | return ret; |
240 | } | 312 | } |
241 | 313 | ||
@@ -243,7 +315,7 @@ static int ohci_hcd_au1xxx_drv_remove(struct platform_device *pdev) | |||
243 | { | 315 | { |
244 | struct usb_hcd *hcd = platform_get_drvdata(pdev); | 316 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
245 | 317 | ||
246 | usb_hcd_au1xxx_remove(hcd, pdev); | 318 | usb_ohci_au1xxx_remove(hcd, pdev); |
247 | return 0; | 319 | return 0; |
248 | } | 320 | } |
249 | /*TBD*/ | 321 | /*TBD*/ |
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index a4b12404ae08..544f7589912f 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c | |||
@@ -443,11 +443,16 @@ ohci_reboot (struct notifier_block *block, unsigned long code, void *null) | |||
443 | static int ohci_init (struct ohci_hcd *ohci) | 443 | static int ohci_init (struct ohci_hcd *ohci) |
444 | { | 444 | { |
445 | int ret; | 445 | int ret; |
446 | struct usb_hcd *hcd = ohci_to_hcd(ohci); | ||
446 | 447 | ||
447 | disable (ohci); | 448 | disable (ohci); |
448 | ohci->regs = ohci_to_hcd(ohci)->regs; | 449 | ohci->regs = hcd->regs; |
449 | ohci->next_statechange = jiffies; | 450 | ohci->next_statechange = jiffies; |
450 | 451 | ||
452 | /* REVISIT this BIOS handshake is now moved into PCI "quirks", and | ||
453 | * was never needed for most non-PCI systems ... remove the code? | ||
454 | */ | ||
455 | |||
451 | #ifndef IR_DISABLE | 456 | #ifndef IR_DISABLE |
452 | /* SMM owns the HC? not for long! */ | 457 | /* SMM owns the HC? not for long! */ |
453 | if (!no_handshake && ohci_readl (ohci, | 458 | if (!no_handshake && ohci_readl (ohci, |
@@ -478,8 +483,10 @@ static int ohci_init (struct ohci_hcd *ohci) | |||
478 | 483 | ||
479 | /* Disable HC interrupts */ | 484 | /* Disable HC interrupts */ |
480 | ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); | 485 | ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); |
481 | // flush the writes | 486 | |
482 | (void) ohci_readl (ohci, &ohci->regs->control); | 487 | /* flush the writes, and save key bits like RWC */ |
488 | if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC) | ||
489 | ohci->hc_control |= OHCI_CTRL_RWC; | ||
483 | 490 | ||
484 | /* Read the number of ports unless overridden */ | 491 | /* Read the number of ports unless overridden */ |
485 | if (ohci->num_ports == 0) | 492 | if (ohci->num_ports == 0) |
@@ -488,16 +495,19 @@ static int ohci_init (struct ohci_hcd *ohci) | |||
488 | if (ohci->hcca) | 495 | if (ohci->hcca) |
489 | return 0; | 496 | return 0; |
490 | 497 | ||
491 | ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller, | 498 | ohci->hcca = dma_alloc_coherent (hcd->self.controller, |
492 | sizeof *ohci->hcca, &ohci->hcca_dma, 0); | 499 | sizeof *ohci->hcca, &ohci->hcca_dma, 0); |
493 | if (!ohci->hcca) | 500 | if (!ohci->hcca) |
494 | return -ENOMEM; | 501 | return -ENOMEM; |
495 | 502 | ||
496 | if ((ret = ohci_mem_init (ohci)) < 0) | 503 | if ((ret = ohci_mem_init (ohci)) < 0) |
497 | ohci_stop (ohci_to_hcd(ohci)); | 504 | ohci_stop (hcd); |
505 | else { | ||
506 | register_reboot_notifier (&ohci->reboot_notifier); | ||
507 | create_debug_files (ohci); | ||
508 | } | ||
498 | 509 | ||
499 | return ret; | 510 | return ret; |
500 | |||
501 | } | 511 | } |
502 | 512 | ||
503 | /*-------------------------------------------------------------------------*/ | 513 | /*-------------------------------------------------------------------------*/ |
@@ -510,6 +520,7 @@ static int ohci_run (struct ohci_hcd *ohci) | |||
510 | { | 520 | { |
511 | u32 mask, temp; | 521 | u32 mask, temp; |
512 | int first = ohci->fminterval == 0; | 522 | int first = ohci->fminterval == 0; |
523 | struct usb_hcd *hcd = ohci_to_hcd(ohci); | ||
513 | 524 | ||
514 | disable (ohci); | 525 | disable (ohci); |
515 | 526 | ||
@@ -525,18 +536,17 @@ static int ohci_run (struct ohci_hcd *ohci) | |||
525 | /* also: power/overcurrent flags in roothub.a */ | 536 | /* also: power/overcurrent flags in roothub.a */ |
526 | } | 537 | } |
527 | 538 | ||
528 | /* Reset USB nearly "by the book". RemoteWakeupConnected | 539 | /* Reset USB nearly "by the book". RemoteWakeupConnected was |
529 | * saved if boot firmware (BIOS/SMM/...) told us it's connected | 540 | * saved if boot firmware (BIOS/SMM/...) told us it's connected, |
530 | * (for OHCI integrated on mainboard, it normally is) | 541 | * or if bus glue did the same (e.g. for PCI add-in cards with |
542 | * PCI PM support). | ||
531 | */ | 543 | */ |
532 | ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); | ||
533 | ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n", | 544 | ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n", |
534 | hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), | 545 | hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), |
535 | ohci->hc_control); | 546 | ohci_readl (ohci, &ohci->regs->control)); |
536 | 547 | if ((ohci->hc_control & OHCI_CTRL_RWC) != 0 | |
537 | if (ohci->hc_control & OHCI_CTRL_RWC | 548 | && !device_may_wakeup(hcd->self.controller)) |
538 | && !(ohci->flags & OHCI_QUIRK_AMD756)) | 549 | device_init_wakeup(hcd->self.controller, 1); |
539 | ohci_to_hcd(ohci)->can_wakeup = 1; | ||
540 | 550 | ||
541 | switch (ohci->hc_control & OHCI_CTRL_HCFS) { | 551 | switch (ohci->hc_control & OHCI_CTRL_HCFS) { |
542 | case OHCI_USB_OPER: | 552 | case OHCI_USB_OPER: |
@@ -632,7 +642,7 @@ retry: | |||
632 | ohci->hc_control &= OHCI_CTRL_RWC; | 642 | ohci->hc_control &= OHCI_CTRL_RWC; |
633 | ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER; | 643 | ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER; |
634 | ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); | 644 | ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); |
635 | ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; | 645 | hcd->state = HC_STATE_RUNNING; |
636 | 646 | ||
637 | /* wake on ConnectStatusChange, matching external hubs */ | 647 | /* wake on ConnectStatusChange, matching external hubs */ |
638 | ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status); | 648 | ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status); |
@@ -667,15 +677,10 @@ retry: | |||
667 | 677 | ||
668 | // POTPGT delay is bits 24-31, in 2 ms units. | 678 | // POTPGT delay is bits 24-31, in 2 ms units. |
669 | mdelay ((temp >> 23) & 0x1fe); | 679 | mdelay ((temp >> 23) & 0x1fe); |
670 | ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; | 680 | hcd->state = HC_STATE_RUNNING; |
671 | 681 | ||
672 | ohci_dump (ohci, 1); | 682 | ohci_dump (ohci, 1); |
673 | 683 | ||
674 | if (ohci_to_hcd(ohci)->self.root_hub == NULL) { | ||
675 | register_reboot_notifier (&ohci->reboot_notifier); | ||
676 | create_debug_files (ohci); | ||
677 | } | ||
678 | |||
679 | return 0; | 684 | return 0; |
680 | } | 685 | } |
681 | 686 | ||
@@ -905,6 +910,10 @@ MODULE_LICENSE ("GPL"); | |||
905 | #include "ohci-ppc-soc.c" | 910 | #include "ohci-ppc-soc.c" |
906 | #endif | 911 | #endif |
907 | 912 | ||
913 | #ifdef CONFIG_ARCH_AT91RM9200 | ||
914 | #include "ohci-at91.c" | ||
915 | #endif | ||
916 | |||
908 | #if !(defined(CONFIG_PCI) \ | 917 | #if !(defined(CONFIG_PCI) \ |
909 | || defined(CONFIG_SA1111) \ | 918 | || defined(CONFIG_SA1111) \ |
910 | || defined(CONFIG_ARCH_S3C2410) \ | 919 | || defined(CONFIG_ARCH_S3C2410) \ |
@@ -913,6 +922,7 @@ MODULE_LICENSE ("GPL"); | |||
913 | || defined (CONFIG_PXA27x) \ | 922 | || defined (CONFIG_PXA27x) \ |
914 | || defined (CONFIG_SOC_AU1X00) \ | 923 | || defined (CONFIG_SOC_AU1X00) \ |
915 | || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \ | 924 | || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \ |
925 | || defined (CONFIG_ARCH_AT91RM9200) \ | ||
916 | ) | 926 | ) |
917 | #error "missing bus glue for ohci-hcd" | 927 | #error "missing bus glue for ohci-hcd" |
918 | #endif | 928 | #endif |
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c index 4b2226d77b34..0bb972b58336 100644 --- a/drivers/usb/host/ohci-hub.c +++ b/drivers/usb/host/ohci-hub.c | |||
@@ -107,7 +107,7 @@ static int ohci_bus_suspend (struct usb_hcd *hcd) | |||
107 | &ohci->regs->intrstatus); | 107 | &ohci->regs->intrstatus); |
108 | 108 | ||
109 | /* maybe resume can wake root hub */ | 109 | /* maybe resume can wake root hub */ |
110 | if (hcd->remote_wakeup) | 110 | if (device_may_wakeup(&ohci_to_hcd(ohci)->self.root_hub->dev)) |
111 | ohci->hc_control |= OHCI_CTRL_RWE; | 111 | ohci->hc_control |= OHCI_CTRL_RWE; |
112 | else | 112 | else |
113 | ohci->hc_control &= ~OHCI_CTRL_RWE; | 113 | ohci->hc_control &= ~OHCI_CTRL_RWE; |
@@ -246,9 +246,9 @@ static int ohci_bus_resume (struct usb_hcd *hcd) | |||
246 | (void) ohci_readl (ohci, &ohci->regs->control); | 246 | (void) ohci_readl (ohci, &ohci->regs->control); |
247 | msleep (3); | 247 | msleep (3); |
248 | 248 | ||
249 | temp = OHCI_CONTROL_INIT | OHCI_USB_OPER; | 249 | temp = ohci->hc_control; |
250 | if (hcd->can_wakeup) | 250 | temp &= OHCI_CTRL_RWC; |
251 | temp |= OHCI_CTRL_RWC; | 251 | temp |= OHCI_CONTROL_INIT | OHCI_USB_OPER; |
252 | ohci->hc_control = temp; | 252 | ohci->hc_control = temp; |
253 | ohci_writel (ohci, temp, &ohci->regs->control); | 253 | ohci_writel (ohci, temp, &ohci->regs->control); |
254 | (void) ohci_readl (ohci, &ohci->regs->control); | 254 | (void) ohci_readl (ohci, &ohci->regs->control); |
@@ -302,7 +302,7 @@ ohci_hub_status_data (struct usb_hcd *hcd, char *buf) | |||
302 | { | 302 | { |
303 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | 303 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
304 | int i, changed = 0, length = 1; | 304 | int i, changed = 0, length = 1; |
305 | int can_suspend = hcd->can_wakeup; | 305 | int can_suspend = device_may_wakeup(&hcd->self.root_hub->dev); |
306 | unsigned long flags; | 306 | unsigned long flags; |
307 | 307 | ||
308 | spin_lock_irqsave (&ohci->lock, flags); | 308 | spin_lock_irqsave (&ohci->lock, flags); |
@@ -354,7 +354,7 @@ ohci_hub_status_data (struct usb_hcd *hcd, char *buf) | |||
354 | */ | 354 | */ |
355 | if (!(status & RH_PS_CCS)) | 355 | if (!(status & RH_PS_CCS)) |
356 | continue; | 356 | continue; |
357 | if ((status & RH_PS_PSS) && hcd->remote_wakeup) | 357 | if ((status & RH_PS_PSS) && can_suspend) |
358 | continue; | 358 | continue; |
359 | can_suspend = 0; | 359 | can_suspend = 0; |
360 | } | 360 | } |
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 3785b3f7df1b..ca19abe01c53 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c | |||
@@ -286,7 +286,7 @@ void usb_hcd_omap_remove (struct usb_hcd *, struct platform_device *); | |||
286 | int usb_hcd_omap_probe (const struct hc_driver *driver, | 286 | int usb_hcd_omap_probe (const struct hc_driver *driver, |
287 | struct platform_device *pdev) | 287 | struct platform_device *pdev) |
288 | { | 288 | { |
289 | int retval; | 289 | int retval, irq; |
290 | struct usb_hcd *hcd = 0; | 290 | struct usb_hcd *hcd = 0; |
291 | struct ohci_hcd *ohci; | 291 | struct ohci_hcd *ohci; |
292 | 292 | ||
@@ -329,7 +329,12 @@ int usb_hcd_omap_probe (const struct hc_driver *driver, | |||
329 | if (retval < 0) | 329 | if (retval < 0) |
330 | goto err2; | 330 | goto err2; |
331 | 331 | ||
332 | retval = usb_add_hcd(hcd, platform_get_irq(pdev, 0), SA_INTERRUPT); | 332 | irq = platform_get_irq(pdev, 0); |
333 | if (irq < 0) { | ||
334 | retval = -ENXIO; | ||
335 | goto err2; | ||
336 | } | ||
337 | retval = usb_add_hcd(hcd, irq, SA_INTERRUPT); | ||
333 | if (retval == 0) | 338 | if (retval == 0) |
334 | return retval; | 339 | return retval; |
335 | 340 | ||
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c index 1b09dde068e1..1bfe96f4d045 100644 --- a/drivers/usb/host/ohci-pci.c +++ b/drivers/usb/host/ohci-pci.c | |||
@@ -35,7 +35,10 @@ ohci_pci_start (struct usb_hcd *hcd) | |||
35 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | 35 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
36 | int ret; | 36 | int ret; |
37 | 37 | ||
38 | if(hcd->self.controller && hcd->self.controller->bus == &pci_bus_type) { | 38 | /* REVISIT this whole block should move to reset(), which handles |
39 | * all the other one-time init. | ||
40 | */ | ||
41 | if (hcd->self.controller) { | ||
39 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); | 42 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); |
40 | 43 | ||
41 | /* AMD 756, for most chips (early revs), corrupts register | 44 | /* AMD 756, for most chips (early revs), corrupts register |
@@ -45,7 +48,8 @@ ohci_pci_start (struct usb_hcd *hcd) | |||
45 | && pdev->device == 0x740c) { | 48 | && pdev->device == 0x740c) { |
46 | ohci->flags = OHCI_QUIRK_AMD756; | 49 | ohci->flags = OHCI_QUIRK_AMD756; |
47 | ohci_dbg (ohci, "AMD756 erratum 4 workaround\n"); | 50 | ohci_dbg (ohci, "AMD756 erratum 4 workaround\n"); |
48 | // also somewhat erratum 10 (suspend/resume issues) | 51 | /* also erratum 10 (suspend/resume issues) */ |
52 | device_init_wakeup(&hcd->self.root_hub->dev, 0); | ||
49 | } | 53 | } |
50 | 54 | ||
51 | /* FIXME for some of the early AMD 760 southbridges, OHCI | 55 | /* FIXME for some of the early AMD 760 southbridges, OHCI |
@@ -88,6 +92,13 @@ ohci_pci_start (struct usb_hcd *hcd) | |||
88 | ohci_dbg (ohci, | 92 | ohci_dbg (ohci, |
89 | "enabled Compaq ZFMicro chipset quirk\n"); | 93 | "enabled Compaq ZFMicro chipset quirk\n"); |
90 | } | 94 | } |
95 | |||
96 | /* RWC may not be set for add-in PCI cards, since boot | ||
97 | * firmware probably ignored them. This transfers PCI | ||
98 | * PM wakeup capabilities (once the PCI layer is fixed). | ||
99 | */ | ||
100 | if (device_may_wakeup(&pdev->dev)) | ||
101 | ohci->hc_control |= OHCI_CTRL_RWC; | ||
91 | } | 102 | } |
92 | 103 | ||
93 | /* NOTE: there may have already been a first reset, to | 104 | /* NOTE: there may have already been a first reset, to |
diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c index 372527a83593..682bf2215660 100644 --- a/drivers/usb/host/ohci-s3c2410.c +++ b/drivers/usb/host/ohci-s3c2410.c | |||
@@ -158,7 +158,7 @@ static int ohci_s3c2410_hub_control ( | |||
158 | "s3c2410_hub_control(%p,0x%04x,0x%04x,0x%04x,%p,%04x)\n", | 158 | "s3c2410_hub_control(%p,0x%04x,0x%04x,0x%04x,%p,%04x)\n", |
159 | hcd, typeReq, wValue, wIndex, buf, wLength); | 159 | hcd, typeReq, wValue, wIndex, buf, wLength); |
160 | 160 | ||
161 | /* if we are only an humble host without any special capabilites | 161 | /* if we are only an humble host without any special capabilities |
162 | * process the request straight away and exit */ | 162 | * process the request straight away and exit */ |
163 | 163 | ||
164 | if (info == NULL) { | 164 | if (info == NULL) { |
diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c index 517360b77d8e..a92343052751 100644 --- a/drivers/usb/host/sl811-hcd.c +++ b/drivers/usb/host/sl811-hcd.c | |||
@@ -853,7 +853,7 @@ static int sl811h_urb_enqueue( | |||
853 | 853 | ||
854 | } else { | 854 | } else { |
855 | INIT_LIST_HEAD(&ep->schedule); | 855 | INIT_LIST_HEAD(&ep->schedule); |
856 | ep->udev = usb_get_dev(udev); | 856 | ep->udev = udev; |
857 | ep->epnum = epnum; | 857 | ep->epnum = epnum; |
858 | ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); | 858 | ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); |
859 | ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE; | 859 | ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE; |
@@ -1052,7 +1052,6 @@ sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep) | |||
1052 | if (!list_empty(&hep->urb_list)) | 1052 | if (!list_empty(&hep->urb_list)) |
1053 | WARN("ep %p not empty?\n", ep); | 1053 | WARN("ep %p not empty?\n", ep); |
1054 | 1054 | ||
1055 | usb_put_dev(ep->udev); | ||
1056 | kfree(ep); | 1055 | kfree(ep); |
1057 | hep->hcpriv = NULL; | 1056 | hep->hcpriv = NULL; |
1058 | } | 1057 | } |
diff --git a/drivers/usb/host/uhci-debug.c b/drivers/usb/host/uhci-debug.c index 5832953086f8..e1239319655c 100644 --- a/drivers/usb/host/uhci-debug.c +++ b/drivers/usb/host/uhci-debug.c | |||
@@ -17,10 +17,13 @@ | |||
17 | 17 | ||
18 | #include "uhci-hcd.h" | 18 | #include "uhci-hcd.h" |
19 | 19 | ||
20 | static struct dentry *uhci_debugfs_root = NULL; | 20 | #define uhci_debug_operations (* (struct file_operations *) NULL) |
21 | static struct dentry *uhci_debugfs_root; | ||
22 | |||
23 | #ifdef DEBUG | ||
21 | 24 | ||
22 | /* Handle REALLY large printks so we don't overflow buffers */ | 25 | /* Handle REALLY large printks so we don't overflow buffers */ |
23 | static inline void lprintk(char *buf) | 26 | static void lprintk(char *buf) |
24 | { | 27 | { |
25 | char *p; | 28 | char *p; |
26 | 29 | ||
@@ -90,13 +93,59 @@ static int uhci_show_td(struct uhci_td *td, char *buf, int len, int space) | |||
90 | return out - buf; | 93 | return out - buf; |
91 | } | 94 | } |
92 | 95 | ||
93 | static int uhci_show_qh(struct uhci_qh *qh, char *buf, int len, int space) | 96 | static int uhci_show_urbp(struct urb_priv *urbp, char *buf, int len, int space) |
94 | { | 97 | { |
95 | char *out = buf; | 98 | char *out = buf; |
96 | struct urb_priv *urbp; | ||
97 | struct list_head *head, *tmp; | ||
98 | struct uhci_td *td; | 99 | struct uhci_td *td; |
99 | int i = 0, checked = 0, prevactive = 0; | 100 | int i, nactive, ninactive; |
101 | |||
102 | if (len < 200) | ||
103 | return 0; | ||
104 | |||
105 | out += sprintf(out, "urb_priv [%p] ", urbp); | ||
106 | out += sprintf(out, "urb [%p] ", urbp->urb); | ||
107 | out += sprintf(out, "qh [%p] ", urbp->qh); | ||
108 | out += sprintf(out, "Dev=%d ", usb_pipedevice(urbp->urb->pipe)); | ||
109 | out += sprintf(out, "EP=%x(%s) ", usb_pipeendpoint(urbp->urb->pipe), | ||
110 | (usb_pipein(urbp->urb->pipe) ? "IN" : "OUT")); | ||
111 | |||
112 | switch (usb_pipetype(urbp->urb->pipe)) { | ||
113 | case PIPE_ISOCHRONOUS: out += sprintf(out, "ISO"); break; | ||
114 | case PIPE_INTERRUPT: out += sprintf(out, "INT"); break; | ||
115 | case PIPE_BULK: out += sprintf(out, "BLK"); break; | ||
116 | case PIPE_CONTROL: out += sprintf(out, "CTL"); break; | ||
117 | } | ||
118 | |||
119 | out += sprintf(out, "%s", (urbp->fsbr ? " FSBR" : "")); | ||
120 | |||
121 | if (urbp->urb->status != -EINPROGRESS) | ||
122 | out += sprintf(out, " Status=%d", urbp->urb->status); | ||
123 | out += sprintf(out, "\n"); | ||
124 | |||
125 | i = nactive = ninactive = 0; | ||
126 | list_for_each_entry(td, &urbp->td_list, list) { | ||
127 | if (++i <= 10 || debug > 2) { | ||
128 | out += sprintf(out, "%*s%d: ", space + 2, "", i); | ||
129 | out += uhci_show_td(td, out, len - (out - buf), 0); | ||
130 | } else { | ||
131 | if (td_status(td) & TD_CTRL_ACTIVE) | ||
132 | ++nactive; | ||
133 | else | ||
134 | ++ninactive; | ||
135 | } | ||
136 | } | ||
137 | if (nactive + ninactive > 0) | ||
138 | out += sprintf(out, "%*s[skipped %d inactive and %d active " | ||
139 | "TDs]\n", | ||
140 | space, "", ninactive, nactive); | ||
141 | |||
142 | return out - buf; | ||
143 | } | ||
144 | |||
145 | static int uhci_show_qh(struct uhci_qh *qh, char *buf, int len, int space) | ||
146 | { | ||
147 | char *out = buf; | ||
148 | int i, nurbs; | ||
100 | __le32 element = qh_element(qh); | 149 | __le32 element = qh_element(qh); |
101 | 150 | ||
102 | /* Try to make sure there's enough memory */ | 151 | /* Try to make sure there's enough memory */ |
@@ -118,86 +167,40 @@ static int uhci_show_qh(struct uhci_qh *qh, char *buf, int len, int space) | |||
118 | if (!(element & ~(UHCI_PTR_QH | UHCI_PTR_DEPTH))) | 167 | if (!(element & ~(UHCI_PTR_QH | UHCI_PTR_DEPTH))) |
119 | out += sprintf(out, "%*s Element is NULL (bug?)\n", space, ""); | 168 | out += sprintf(out, "%*s Element is NULL (bug?)\n", space, ""); |
120 | 169 | ||
121 | if (!qh->urbp) { | 170 | if (list_empty(&qh->queue)) { |
122 | out += sprintf(out, "%*s urbp == NULL\n", space, ""); | 171 | out += sprintf(out, "%*s queue is empty\n", space, ""); |
123 | goto out; | 172 | } else { |
124 | } | 173 | struct urb_priv *urbp = list_entry(qh->queue.next, |
125 | 174 | struct urb_priv, node); | |
126 | urbp = qh->urbp; | 175 | struct uhci_td *td = list_entry(urbp->td_list.next, |
127 | 176 | struct uhci_td, list); | |
128 | head = &urbp->td_list; | 177 | |
129 | tmp = head->next; | 178 | if (cpu_to_le32(td->dma_handle) != (element & ~UHCI_PTR_BITS)) |
130 | 179 | out += sprintf(out, "%*s Element != First TD\n", | |
131 | td = list_entry(tmp, struct uhci_td, list); | 180 | space, ""); |
132 | 181 | i = nurbs = 0; | |
133 | if (cpu_to_le32(td->dma_handle) != (element & ~UHCI_PTR_BITS)) | 182 | list_for_each_entry(urbp, &qh->queue, node) { |
134 | out += sprintf(out, "%*s Element != First TD\n", space, ""); | 183 | if (++i <= 10) |
135 | 184 | out += uhci_show_urbp(urbp, out, | |
136 | while (tmp != head) { | 185 | len - (out - buf), space + 2); |
137 | struct uhci_td *td = list_entry(tmp, struct uhci_td, list); | 186 | else |
138 | 187 | ++nurbs; | |
139 | tmp = tmp->next; | ||
140 | |||
141 | out += sprintf(out, "%*s%d: ", space + 2, "", i++); | ||
142 | out += uhci_show_td(td, out, len - (out - buf), 0); | ||
143 | |||
144 | if (i > 10 && !checked && prevactive && tmp != head && | ||
145 | debug <= 2) { | ||
146 | struct list_head *ntmp = tmp; | ||
147 | struct uhci_td *ntd = td; | ||
148 | int active = 1, ni = i; | ||
149 | |||
150 | checked = 1; | ||
151 | |||
152 | while (ntmp != head && ntmp->next != head && active) { | ||
153 | ntd = list_entry(ntmp, struct uhci_td, list); | ||
154 | |||
155 | ntmp = ntmp->next; | ||
156 | |||
157 | active = td_status(ntd) & TD_CTRL_ACTIVE; | ||
158 | |||
159 | ni++; | ||
160 | } | ||
161 | |||
162 | if (active && ni > i) { | ||
163 | out += sprintf(out, "%*s[skipped %d active TDs]\n", space, "", ni - i); | ||
164 | tmp = ntmp; | ||
165 | td = ntd; | ||
166 | i = ni; | ||
167 | } | ||
168 | } | 188 | } |
169 | 189 | if (nurbs > 0) | |
170 | prevactive = td_status(td) & TD_CTRL_ACTIVE; | 190 | out += sprintf(out, "%*s Skipped %d URBs\n", |
191 | space, "", nurbs); | ||
171 | } | 192 | } |
172 | 193 | ||
173 | if (list_empty(&urbp->queue_list) || urbp->queued) | 194 | if (qh->udev) { |
174 | goto out; | 195 | out += sprintf(out, "%*s Dummy TD\n", space, ""); |
175 | 196 | out += uhci_show_td(qh->dummy_td, out, len - (out - buf), 0); | |
176 | out += sprintf(out, "%*sQueued QHs:\n", -space, "--"); | ||
177 | |||
178 | head = &urbp->queue_list; | ||
179 | tmp = head->next; | ||
180 | |||
181 | while (tmp != head) { | ||
182 | struct urb_priv *nurbp = list_entry(tmp, struct urb_priv, | ||
183 | queue_list); | ||
184 | tmp = tmp->next; | ||
185 | |||
186 | out += uhci_show_qh(nurbp->qh, out, len - (out - buf), space); | ||
187 | } | 197 | } |
188 | 198 | ||
189 | out: | ||
190 | return out - buf; | 199 | return out - buf; |
191 | } | 200 | } |
192 | 201 | ||
193 | #define show_frame_num() \ | ||
194 | if (!shown) { \ | ||
195 | shown = 1; \ | ||
196 | out += sprintf(out, "- Frame %d\n", i); \ | ||
197 | } | ||
198 | |||
199 | #ifdef CONFIG_PROC_FS | ||
200 | static const char * const qh_names[] = { | 202 | static const char * const qh_names[] = { |
203 | "skel_unlink_qh", "skel_iso_qh", | ||
201 | "skel_int128_qh", "skel_int64_qh", | 204 | "skel_int128_qh", "skel_int64_qh", |
202 | "skel_int32_qh", "skel_int16_qh", | 205 | "skel_int32_qh", "skel_int16_qh", |
203 | "skel_int8_qh", "skel_int4_qh", | 206 | "skel_int8_qh", "skel_int4_qh", |
@@ -206,12 +209,6 @@ static const char * const qh_names[] = { | |||
206 | "skel_bulk_qh", "skel_term_qh" | 209 | "skel_bulk_qh", "skel_term_qh" |
207 | }; | 210 | }; |
208 | 211 | ||
209 | #define show_qh_name() \ | ||
210 | if (!shown) { \ | ||
211 | shown = 1; \ | ||
212 | out += sprintf(out, "- %s\n", qh_names[i]); \ | ||
213 | } | ||
214 | |||
215 | static int uhci_show_sc(int port, unsigned short status, char *buf, int len) | 212 | static int uhci_show_sc(int port, unsigned short status, char *buf, int len) |
216 | { | 213 | { |
217 | char *out = buf; | 214 | char *out = buf; |
@@ -321,139 +318,29 @@ static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len) | |||
321 | return out - buf; | 318 | return out - buf; |
322 | } | 319 | } |
323 | 320 | ||
324 | static int uhci_show_urbp(struct uhci_hcd *uhci, struct urb_priv *urbp, char *buf, int len) | ||
325 | { | ||
326 | struct list_head *tmp; | ||
327 | char *out = buf; | ||
328 | int count = 0; | ||
329 | |||
330 | if (len < 200) | ||
331 | return 0; | ||
332 | |||
333 | out += sprintf(out, "urb_priv [%p] ", urbp); | ||
334 | out += sprintf(out, "urb [%p] ", urbp->urb); | ||
335 | out += sprintf(out, "qh [%p] ", urbp->qh); | ||
336 | out += sprintf(out, "Dev=%d ", usb_pipedevice(urbp->urb->pipe)); | ||
337 | out += sprintf(out, "EP=%x(%s) ", usb_pipeendpoint(urbp->urb->pipe), (usb_pipein(urbp->urb->pipe) ? "IN" : "OUT")); | ||
338 | |||
339 | switch (usb_pipetype(urbp->urb->pipe)) { | ||
340 | case PIPE_ISOCHRONOUS: out += sprintf(out, "ISO "); break; | ||
341 | case PIPE_INTERRUPT: out += sprintf(out, "INT "); break; | ||
342 | case PIPE_BULK: out += sprintf(out, "BLK "); break; | ||
343 | case PIPE_CONTROL: out += sprintf(out, "CTL "); break; | ||
344 | } | ||
345 | |||
346 | out += sprintf(out, "%s", (urbp->fsbr ? "FSBR " : "")); | ||
347 | out += sprintf(out, "%s", (urbp->fsbr_timeout ? "FSBR_TO " : "")); | ||
348 | |||
349 | if (urbp->urb->status != -EINPROGRESS) | ||
350 | out += sprintf(out, "Status=%d ", urbp->urb->status); | ||
351 | //out += sprintf(out, "FSBRtime=%lx ",urbp->fsbrtime); | ||
352 | |||
353 | count = 0; | ||
354 | list_for_each(tmp, &urbp->td_list) | ||
355 | count++; | ||
356 | out += sprintf(out, "TDs=%d ",count); | ||
357 | |||
358 | if (urbp->queued) | ||
359 | out += sprintf(out, "queued\n"); | ||
360 | else { | ||
361 | count = 0; | ||
362 | list_for_each(tmp, &urbp->queue_list) | ||
363 | count++; | ||
364 | out += sprintf(out, "queued URBs=%d\n", count); | ||
365 | } | ||
366 | |||
367 | return out - buf; | ||
368 | } | ||
369 | |||
370 | static int uhci_show_lists(struct uhci_hcd *uhci, char *buf, int len) | ||
371 | { | ||
372 | char *out = buf; | ||
373 | struct list_head *head, *tmp; | ||
374 | int count; | ||
375 | |||
376 | out += sprintf(out, "Main list URBs:"); | ||
377 | if (list_empty(&uhci->urb_list)) | ||
378 | out += sprintf(out, " Empty\n"); | ||
379 | else { | ||
380 | out += sprintf(out, "\n"); | ||
381 | count = 0; | ||
382 | head = &uhci->urb_list; | ||
383 | tmp = head->next; | ||
384 | while (tmp != head) { | ||
385 | struct urb_priv *urbp = list_entry(tmp, struct urb_priv, urb_list); | ||
386 | |||
387 | out += sprintf(out, " %d: ", ++count); | ||
388 | out += uhci_show_urbp(uhci, urbp, out, len - (out - buf)); | ||
389 | tmp = tmp->next; | ||
390 | } | ||
391 | } | ||
392 | |||
393 | out += sprintf(out, "Remove list URBs:"); | ||
394 | if (list_empty(&uhci->urb_remove_list)) | ||
395 | out += sprintf(out, " Empty\n"); | ||
396 | else { | ||
397 | out += sprintf(out, "\n"); | ||
398 | count = 0; | ||
399 | head = &uhci->urb_remove_list; | ||
400 | tmp = head->next; | ||
401 | while (tmp != head) { | ||
402 | struct urb_priv *urbp = list_entry(tmp, struct urb_priv, urb_list); | ||
403 | |||
404 | out += sprintf(out, " %d: ", ++count); | ||
405 | out += uhci_show_urbp(uhci, urbp, out, len - (out - buf)); | ||
406 | tmp = tmp->next; | ||
407 | } | ||
408 | } | ||
409 | |||
410 | out += sprintf(out, "Complete list URBs:"); | ||
411 | if (list_empty(&uhci->complete_list)) | ||
412 | out += sprintf(out, " Empty\n"); | ||
413 | else { | ||
414 | out += sprintf(out, "\n"); | ||
415 | count = 0; | ||
416 | head = &uhci->complete_list; | ||
417 | tmp = head->next; | ||
418 | while (tmp != head) { | ||
419 | struct urb_priv *urbp = list_entry(tmp, struct urb_priv, urb_list); | ||
420 | |||
421 | out += sprintf(out, " %d: ", ++count); | ||
422 | out += uhci_show_urbp(uhci, urbp, out, len - (out - buf)); | ||
423 | tmp = tmp->next; | ||
424 | } | ||
425 | } | ||
426 | |||
427 | return out - buf; | ||
428 | } | ||
429 | |||
430 | static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len) | 321 | static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len) |
431 | { | 322 | { |
432 | unsigned long flags; | ||
433 | char *out = buf; | 323 | char *out = buf; |
434 | int i, j; | 324 | int i, j; |
435 | struct uhci_qh *qh; | 325 | struct uhci_qh *qh; |
436 | struct uhci_td *td; | 326 | struct uhci_td *td; |
437 | struct list_head *tmp, *head; | 327 | struct list_head *tmp, *head; |
438 | 328 | ||
439 | spin_lock_irqsave(&uhci->lock, flags); | ||
440 | |||
441 | out += uhci_show_root_hub_state(uhci, out, len - (out - buf)); | 329 | out += uhci_show_root_hub_state(uhci, out, len - (out - buf)); |
442 | out += sprintf(out, "HC status\n"); | 330 | out += sprintf(out, "HC status\n"); |
443 | out += uhci_show_status(uhci, out, len - (out - buf)); | 331 | out += uhci_show_status(uhci, out, len - (out - buf)); |
332 | if (debug <= 1) | ||
333 | return out - buf; | ||
444 | 334 | ||
445 | out += sprintf(out, "Frame List\n"); | 335 | out += sprintf(out, "Frame List\n"); |
446 | for (i = 0; i < UHCI_NUMFRAMES; ++i) { | 336 | for (i = 0; i < UHCI_NUMFRAMES; ++i) { |
447 | int shown = 0; | ||
448 | td = uhci->frame_cpu[i]; | 337 | td = uhci->frame_cpu[i]; |
449 | if (!td) | 338 | if (!td) |
450 | continue; | 339 | continue; |
451 | 340 | ||
452 | if (td->dma_handle != (dma_addr_t)uhci->frame[i]) { | 341 | out += sprintf(out, "- Frame %d\n", i); \ |
453 | show_frame_num(); | 342 | if (td->dma_handle != (dma_addr_t)uhci->frame[i]) |
454 | out += sprintf(out, " frame list does not match td->dma_handle!\n"); | 343 | out += sprintf(out, " frame list does not match td->dma_handle!\n"); |
455 | } | ||
456 | show_frame_num(); | ||
457 | 344 | ||
458 | head = &td->fl_list; | 345 | head = &td->fl_list; |
459 | tmp = head; | 346 | tmp = head; |
@@ -467,14 +354,11 @@ static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len) | |||
467 | out += sprintf(out, "Skeleton QHs\n"); | 354 | out += sprintf(out, "Skeleton QHs\n"); |
468 | 355 | ||
469 | for (i = 0; i < UHCI_NUM_SKELQH; ++i) { | 356 | for (i = 0; i < UHCI_NUM_SKELQH; ++i) { |
470 | int shown = 0; | 357 | int cnt = 0; |
471 | 358 | ||
472 | qh = uhci->skelqh[i]; | 359 | qh = uhci->skelqh[i]; |
473 | 360 | out += sprintf(out, "- %s\n", qh_names[i]); \ | |
474 | if (debug > 1) { | 361 | out += uhci_show_qh(qh, out, len - (out - buf), 4); |
475 | show_qh_name(); | ||
476 | out += uhci_show_qh(qh, out, len - (out - buf), 4); | ||
477 | } | ||
478 | 362 | ||
479 | /* Last QH is the Terminating QH, it's different */ | 363 | /* Last QH is the Terminating QH, it's different */ |
480 | if (i == UHCI_NUM_SKELQH - 1) { | 364 | if (i == UHCI_NUM_SKELQH - 1) { |
@@ -487,53 +371,37 @@ static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len) | |||
487 | continue; | 371 | continue; |
488 | } | 372 | } |
489 | 373 | ||
490 | j = (i < 7) ? 7 : i+1; /* Next skeleton */ | 374 | j = (i < 9) ? 9 : i+1; /* Next skeleton */ |
491 | if (list_empty(&qh->list)) { | 375 | head = &qh->node; |
492 | if (i < UHCI_NUM_SKELQH - 1) { | ||
493 | if (qh->link != | ||
494 | (cpu_to_le32(uhci->skelqh[j]->dma_handle) | UHCI_PTR_QH)) { | ||
495 | show_qh_name(); | ||
496 | out += sprintf(out, " skeleton QH not linked to next skeleton QH!\n"); | ||
497 | } | ||
498 | } | ||
499 | |||
500 | continue; | ||
501 | } | ||
502 | |||
503 | show_qh_name(); | ||
504 | |||
505 | head = &qh->list; | ||
506 | tmp = head->next; | 376 | tmp = head->next; |
507 | 377 | ||
508 | while (tmp != head) { | 378 | while (tmp != head) { |
509 | qh = list_entry(tmp, struct uhci_qh, list); | 379 | qh = list_entry(tmp, struct uhci_qh, node); |
510 | |||
511 | tmp = tmp->next; | 380 | tmp = tmp->next; |
512 | 381 | if (++cnt <= 10) | |
513 | out += uhci_show_qh(qh, out, len - (out - buf), 4); | 382 | out += uhci_show_qh(qh, out, |
383 | len - (out - buf), 4); | ||
514 | } | 384 | } |
385 | if ((cnt -= 10) > 0) | ||
386 | out += sprintf(out, " Skipped %d QHs\n", cnt); | ||
515 | 387 | ||
516 | if (i < UHCI_NUM_SKELQH - 1) { | 388 | if (i > 1 && i < UHCI_NUM_SKELQH - 1) { |
517 | if (qh->link != | 389 | if (qh->link != |
518 | (cpu_to_le32(uhci->skelqh[j]->dma_handle) | UHCI_PTR_QH)) | 390 | (cpu_to_le32(uhci->skelqh[j]->dma_handle) | UHCI_PTR_QH)) |
519 | out += sprintf(out, " last QH not linked to next skeleton!\n"); | 391 | out += sprintf(out, " last QH not linked to next skeleton!\n"); |
520 | } | 392 | } |
521 | } | 393 | } |
522 | 394 | ||
523 | if (debug > 2) | ||
524 | out += uhci_show_lists(uhci, out, len - (out - buf)); | ||
525 | |||
526 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
527 | |||
528 | return out - buf; | 395 | return out - buf; |
529 | } | 396 | } |
530 | 397 | ||
398 | #ifdef CONFIG_DEBUG_FS | ||
399 | |||
531 | #define MAX_OUTPUT (64 * 1024) | 400 | #define MAX_OUTPUT (64 * 1024) |
532 | 401 | ||
533 | struct uhci_debug { | 402 | struct uhci_debug { |
534 | int size; | 403 | int size; |
535 | char *data; | 404 | char *data; |
536 | struct uhci_hcd *uhci; | ||
537 | }; | 405 | }; |
538 | 406 | ||
539 | static int uhci_debug_open(struct inode *inode, struct file *file) | 407 | static int uhci_debug_open(struct inode *inode, struct file *file) |
@@ -541,6 +409,7 @@ static int uhci_debug_open(struct inode *inode, struct file *file) | |||
541 | struct uhci_hcd *uhci = inode->u.generic_ip; | 409 | struct uhci_hcd *uhci = inode->u.generic_ip; |
542 | struct uhci_debug *up; | 410 | struct uhci_debug *up; |
543 | int ret = -ENOMEM; | 411 | int ret = -ENOMEM; |
412 | unsigned long flags; | ||
544 | 413 | ||
545 | lock_kernel(); | 414 | lock_kernel(); |
546 | up = kmalloc(sizeof(*up), GFP_KERNEL); | 415 | up = kmalloc(sizeof(*up), GFP_KERNEL); |
@@ -553,7 +422,11 @@ static int uhci_debug_open(struct inode *inode, struct file *file) | |||
553 | goto out; | 422 | goto out; |
554 | } | 423 | } |
555 | 424 | ||
556 | up->size = uhci_sprint_schedule(uhci, up->data, MAX_OUTPUT); | 425 | up->size = 0; |
426 | spin_lock_irqsave(&uhci->lock, flags); | ||
427 | if (uhci->is_initialized) | ||
428 | up->size = uhci_sprint_schedule(uhci, up->data, MAX_OUTPUT); | ||
429 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
557 | 430 | ||
558 | file->private_data = up; | 431 | file->private_data = up; |
559 | 432 | ||
@@ -604,15 +477,32 @@ static int uhci_debug_release(struct inode *inode, struct file *file) | |||
604 | return 0; | 477 | return 0; |
605 | } | 478 | } |
606 | 479 | ||
480 | #undef uhci_debug_operations | ||
607 | static struct file_operations uhci_debug_operations = { | 481 | static struct file_operations uhci_debug_operations = { |
482 | .owner = THIS_MODULE, | ||
608 | .open = uhci_debug_open, | 483 | .open = uhci_debug_open, |
609 | .llseek = uhci_debug_lseek, | 484 | .llseek = uhci_debug_lseek, |
610 | .read = uhci_debug_read, | 485 | .read = uhci_debug_read, |
611 | .release = uhci_debug_release, | 486 | .release = uhci_debug_release, |
612 | }; | 487 | }; |
613 | 488 | ||
614 | #else /* CONFIG_DEBUG_FS */ | 489 | #endif /* CONFIG_DEBUG_FS */ |
615 | 490 | ||
616 | #define uhci_debug_operations (* (struct file_operations *) NULL) | 491 | #else /* DEBUG */ |
492 | |||
493 | static inline void lprintk(char *buf) | ||
494 | {} | ||
495 | |||
496 | static inline int uhci_show_qh(struct uhci_qh *qh, char *buf, | ||
497 | int len, int space) | ||
498 | { | ||
499 | return 0; | ||
500 | } | ||
501 | |||
502 | static inline int uhci_sprint_schedule(struct uhci_hcd *uhci, | ||
503 | char *buf, int len) | ||
504 | { | ||
505 | return 0; | ||
506 | } | ||
617 | 507 | ||
618 | #endif | 508 | #endif |
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c index dfe121d35887..4edb8330c440 100644 --- a/drivers/usb/host/uhci-hcd.c +++ b/drivers/usb/host/uhci-hcd.c | |||
@@ -54,7 +54,7 @@ | |||
54 | /* | 54 | /* |
55 | * Version Information | 55 | * Version Information |
56 | */ | 56 | */ |
57 | #define DRIVER_VERSION "v2.3" | 57 | #define DRIVER_VERSION "v3.0" |
58 | #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ | 58 | #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ |
59 | Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ | 59 | Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ |
60 | Alan Stern" | 60 | Alan Stern" |
@@ -68,12 +68,16 @@ Alan Stern" | |||
68 | * debug = 3, show all TDs in URBs when dumping | 68 | * debug = 3, show all TDs in URBs when dumping |
69 | */ | 69 | */ |
70 | #ifdef DEBUG | 70 | #ifdef DEBUG |
71 | #define DEBUG_CONFIGURED 1 | ||
71 | static int debug = 1; | 72 | static int debug = 1; |
72 | #else | ||
73 | static int debug = 0; | ||
74 | #endif | ||
75 | module_param(debug, int, S_IRUGO | S_IWUSR); | 73 | module_param(debug, int, S_IRUGO | S_IWUSR); |
76 | MODULE_PARM_DESC(debug, "Debug level"); | 74 | MODULE_PARM_DESC(debug, "Debug level"); |
75 | |||
76 | #else | ||
77 | #define DEBUG_CONFIGURED 0 | ||
78 | #define debug 0 | ||
79 | #endif | ||
80 | |||
77 | static char *errbuf; | 81 | static char *errbuf; |
78 | #define ERRBUF_LEN (32 * 1024) | 82 | #define ERRBUF_LEN (32 * 1024) |
79 | 83 | ||
@@ -338,6 +342,12 @@ static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs) | |||
338 | dev_err(uhci_dev(uhci), | 342 | dev_err(uhci_dev(uhci), |
339 | "host controller halted, " | 343 | "host controller halted, " |
340 | "very bad!\n"); | 344 | "very bad!\n"); |
345 | if (debug > 1 && errbuf) { | ||
346 | /* Print the schedule for debugging */ | ||
347 | uhci_sprint_schedule(uhci, | ||
348 | errbuf, ERRBUF_LEN); | ||
349 | lprintk(errbuf); | ||
350 | } | ||
341 | hc_died(uhci); | 351 | hc_died(uhci); |
342 | 352 | ||
343 | /* Force a callback in case there are | 353 | /* Force a callback in case there are |
@@ -376,6 +386,14 @@ static void release_uhci(struct uhci_hcd *uhci) | |||
376 | { | 386 | { |
377 | int i; | 387 | int i; |
378 | 388 | ||
389 | if (DEBUG_CONFIGURED) { | ||
390 | spin_lock_irq(&uhci->lock); | ||
391 | uhci->is_initialized = 0; | ||
392 | spin_unlock_irq(&uhci->lock); | ||
393 | |||
394 | debugfs_remove(uhci->dentry); | ||
395 | } | ||
396 | |||
379 | for (i = 0; i < UHCI_NUM_SKELQH; i++) | 397 | for (i = 0; i < UHCI_NUM_SKELQH; i++) |
380 | uhci_free_qh(uhci, uhci->skelqh[i]); | 398 | uhci_free_qh(uhci, uhci->skelqh[i]); |
381 | 399 | ||
@@ -390,8 +408,6 @@ static void release_uhci(struct uhci_hcd *uhci) | |||
390 | dma_free_coherent(uhci_dev(uhci), | 408 | dma_free_coherent(uhci_dev(uhci), |
391 | UHCI_NUMFRAMES * sizeof(*uhci->frame), | 409 | UHCI_NUMFRAMES * sizeof(*uhci->frame), |
392 | uhci->frame, uhci->frame_dma_handle); | 410 | uhci->frame, uhci->frame_dma_handle); |
393 | |||
394 | debugfs_remove(uhci->dentry); | ||
395 | } | 411 | } |
396 | 412 | ||
397 | static int uhci_reset(struct usb_hcd *hcd) | 413 | static int uhci_reset(struct usb_hcd *hcd) |
@@ -474,33 +490,29 @@ static int uhci_start(struct usb_hcd *hcd) | |||
474 | 490 | ||
475 | hcd->uses_new_polling = 1; | 491 | hcd->uses_new_polling = 1; |
476 | 492 | ||
477 | dentry = debugfs_create_file(hcd->self.bus_name, | ||
478 | S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, | ||
479 | &uhci_debug_operations); | ||
480 | if (!dentry) { | ||
481 | dev_err(uhci_dev(uhci), | ||
482 | "couldn't create uhci debugfs entry\n"); | ||
483 | retval = -ENOMEM; | ||
484 | goto err_create_debug_entry; | ||
485 | } | ||
486 | uhci->dentry = dentry; | ||
487 | |||
488 | uhci->fsbr = 0; | 493 | uhci->fsbr = 0; |
489 | uhci->fsbrtimeout = 0; | 494 | uhci->fsbrtimeout = 0; |
490 | 495 | ||
491 | spin_lock_init(&uhci->lock); | 496 | spin_lock_init(&uhci->lock); |
492 | INIT_LIST_HEAD(&uhci->qh_remove_list); | ||
493 | 497 | ||
494 | INIT_LIST_HEAD(&uhci->td_remove_list); | 498 | INIT_LIST_HEAD(&uhci->td_remove_list); |
495 | 499 | INIT_LIST_HEAD(&uhci->idle_qh_list); | |
496 | INIT_LIST_HEAD(&uhci->urb_remove_list); | ||
497 | |||
498 | INIT_LIST_HEAD(&uhci->urb_list); | ||
499 | |||
500 | INIT_LIST_HEAD(&uhci->complete_list); | ||
501 | 500 | ||
502 | init_waitqueue_head(&uhci->waitqh); | 501 | init_waitqueue_head(&uhci->waitqh); |
503 | 502 | ||
503 | if (DEBUG_CONFIGURED) { | ||
504 | dentry = debugfs_create_file(hcd->self.bus_name, | ||
505 | S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, | ||
506 | uhci, &uhci_debug_operations); | ||
507 | if (!dentry) { | ||
508 | dev_err(uhci_dev(uhci), "couldn't create uhci " | ||
509 | "debugfs entry\n"); | ||
510 | retval = -ENOMEM; | ||
511 | goto err_create_debug_entry; | ||
512 | } | ||
513 | uhci->dentry = dentry; | ||
514 | } | ||
515 | |||
504 | uhci->frame = dma_alloc_coherent(uhci_dev(uhci), | 516 | uhci->frame = dma_alloc_coherent(uhci_dev(uhci), |
505 | UHCI_NUMFRAMES * sizeof(*uhci->frame), | 517 | UHCI_NUMFRAMES * sizeof(*uhci->frame), |
506 | &uhci->frame_dma_handle, 0); | 518 | &uhci->frame_dma_handle, 0); |
@@ -540,7 +552,7 @@ static int uhci_start(struct usb_hcd *hcd) | |||
540 | } | 552 | } |
541 | 553 | ||
542 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { | 554 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { |
543 | uhci->skelqh[i] = uhci_alloc_qh(uhci); | 555 | uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL); |
544 | if (!uhci->skelqh[i]) { | 556 | if (!uhci->skelqh[i]) { |
545 | dev_err(uhci_dev(uhci), "unable to allocate QH\n"); | 557 | dev_err(uhci_dev(uhci), "unable to allocate QH\n"); |
546 | goto err_alloc_skelqh; | 558 | goto err_alloc_skelqh; |
@@ -557,13 +569,17 @@ static int uhci_start(struct usb_hcd *hcd) | |||
557 | uhci->skel_int16_qh->link = | 569 | uhci->skel_int16_qh->link = |
558 | uhci->skel_int8_qh->link = | 570 | uhci->skel_int8_qh->link = |
559 | uhci->skel_int4_qh->link = | 571 | uhci->skel_int4_qh->link = |
560 | uhci->skel_int2_qh->link = | 572 | uhci->skel_int2_qh->link = UHCI_PTR_QH | |
561 | cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH; | 573 | cpu_to_le32(uhci->skel_int1_qh->dma_handle); |
562 | uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH; | 574 | |
563 | 575 | uhci->skel_int1_qh->link = UHCI_PTR_QH | | |
564 | uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH; | 576 | cpu_to_le32(uhci->skel_ls_control_qh->dma_handle); |
565 | uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH; | 577 | uhci->skel_ls_control_qh->link = UHCI_PTR_QH | |
566 | uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH; | 578 | cpu_to_le32(uhci->skel_fs_control_qh->dma_handle); |
579 | uhci->skel_fs_control_qh->link = UHCI_PTR_QH | | ||
580 | cpu_to_le32(uhci->skel_bulk_qh->dma_handle); | ||
581 | uhci->skel_bulk_qh->link = UHCI_PTR_QH | | ||
582 | cpu_to_le32(uhci->skel_term_qh->dma_handle); | ||
567 | 583 | ||
568 | /* This dummy TD is to work around a bug in Intel PIIX controllers */ | 584 | /* This dummy TD is to work around a bug in Intel PIIX controllers */ |
569 | uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | | 585 | uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | |
@@ -589,15 +605,15 @@ static int uhci_start(struct usb_hcd *hcd) | |||
589 | 605 | ||
590 | /* | 606 | /* |
591 | * ffs (Find First bit Set) does exactly what we need: | 607 | * ffs (Find First bit Set) does exactly what we need: |
592 | * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6], | 608 | * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[8], |
593 | * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc. | 609 | * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc. |
594 | * ffs > 6 => not on any high-period queue, so use | 610 | * ffs >= 7 => not on any high-period queue, so use |
595 | * skel_int1_qh = skelqh[7]. | 611 | * skel_int1_qh = skelqh[9]. |
596 | * Add UHCI_NUMFRAMES to insure at least one bit is set. | 612 | * Add UHCI_NUMFRAMES to insure at least one bit is set. |
597 | */ | 613 | */ |
598 | irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES); | 614 | irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES); |
599 | if (irq < 0) | 615 | if (irq <= 1) |
600 | irq = 7; | 616 | irq = 9; |
601 | 617 | ||
602 | /* Only place we don't use the frame list routines */ | 618 | /* Only place we don't use the frame list routines */ |
603 | uhci->frame[i] = UHCI_PTR_QH | | 619 | uhci->frame[i] = UHCI_PTR_QH | |
@@ -611,6 +627,7 @@ static int uhci_start(struct usb_hcd *hcd) | |||
611 | mb(); | 627 | mb(); |
612 | 628 | ||
613 | configure_hc(uhci); | 629 | configure_hc(uhci); |
630 | uhci->is_initialized = 1; | ||
614 | start_rh(uhci); | 631 | start_rh(uhci); |
615 | return 0; | 632 | return 0; |
616 | 633 | ||
@@ -767,13 +784,30 @@ static int uhci_resume(struct usb_hcd *hcd) | |||
767 | } | 784 | } |
768 | #endif | 785 | #endif |
769 | 786 | ||
770 | /* Wait until all the URBs for a particular device/endpoint are gone */ | 787 | /* Wait until a particular device/endpoint's QH is idle, and free it */ |
771 | static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, | 788 | static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, |
772 | struct usb_host_endpoint *ep) | 789 | struct usb_host_endpoint *hep) |
773 | { | 790 | { |
774 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 791 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
792 | struct uhci_qh *qh; | ||
793 | |||
794 | spin_lock_irq(&uhci->lock); | ||
795 | qh = (struct uhci_qh *) hep->hcpriv; | ||
796 | if (qh == NULL) | ||
797 | goto done; | ||
798 | |||
799 | while (qh->state != QH_STATE_IDLE) { | ||
800 | ++uhci->num_waiting; | ||
801 | spin_unlock_irq(&uhci->lock); | ||
802 | wait_event_interruptible(uhci->waitqh, | ||
803 | qh->state == QH_STATE_IDLE); | ||
804 | spin_lock_irq(&uhci->lock); | ||
805 | --uhci->num_waiting; | ||
806 | } | ||
775 | 807 | ||
776 | wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list)); | 808 | uhci_free_qh(uhci, qh); |
809 | done: | ||
810 | spin_unlock_irq(&uhci->lock); | ||
777 | } | 811 | } |
778 | 812 | ||
779 | static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) | 813 | static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) |
@@ -857,16 +891,15 @@ static int __init uhci_hcd_init(void) | |||
857 | if (usb_disabled()) | 891 | if (usb_disabled()) |
858 | return -ENODEV; | 892 | return -ENODEV; |
859 | 893 | ||
860 | if (debug) { | 894 | if (DEBUG_CONFIGURED) { |
861 | errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); | 895 | errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); |
862 | if (!errbuf) | 896 | if (!errbuf) |
863 | goto errbuf_failed; | 897 | goto errbuf_failed; |
898 | uhci_debugfs_root = debugfs_create_dir("uhci", NULL); | ||
899 | if (!uhci_debugfs_root) | ||
900 | goto debug_failed; | ||
864 | } | 901 | } |
865 | 902 | ||
866 | uhci_debugfs_root = debugfs_create_dir("uhci", NULL); | ||
867 | if (!uhci_debugfs_root) | ||
868 | goto debug_failed; | ||
869 | |||
870 | uhci_up_cachep = kmem_cache_create("uhci_urb_priv", | 903 | uhci_up_cachep = kmem_cache_create("uhci_urb_priv", |
871 | sizeof(struct urb_priv), 0, 0, NULL, NULL); | 904 | sizeof(struct urb_priv), 0, 0, NULL, NULL); |
872 | if (!uhci_up_cachep) | 905 | if (!uhci_up_cachep) |
diff --git a/drivers/usb/host/uhci-hcd.h b/drivers/usb/host/uhci-hcd.h index 8b4b887a7d41..4a69c7eb09bd 100644 --- a/drivers/usb/host/uhci-hcd.h +++ b/drivers/usb/host/uhci-hcd.h | |||
@@ -28,8 +28,9 @@ | |||
28 | #define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */ | 28 | #define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */ |
29 | #define USBSTS_ERROR 0x0002 /* Interrupt due to error */ | 29 | #define USBSTS_ERROR 0x0002 /* Interrupt due to error */ |
30 | #define USBSTS_RD 0x0004 /* Resume Detect */ | 30 | #define USBSTS_RD 0x0004 /* Resume Detect */ |
31 | #define USBSTS_HSE 0x0008 /* Host System Error - basically PCI problems */ | 31 | #define USBSTS_HSE 0x0008 /* Host System Error: PCI problems */ |
32 | #define USBSTS_HCPE 0x0010 /* Host Controller Process Error - the scripts were buggy */ | 32 | #define USBSTS_HCPE 0x0010 /* Host Controller Process Error: |
33 | * the schedule is buggy */ | ||
33 | #define USBSTS_HCH 0x0020 /* HC Halted */ | 34 | #define USBSTS_HCH 0x0020 /* HC Halted */ |
34 | 35 | ||
35 | /* Interrupt enable register */ | 36 | /* Interrupt enable register */ |
@@ -47,7 +48,8 @@ | |||
47 | /* USB port status and control registers */ | 48 | /* USB port status and control registers */ |
48 | #define USBPORTSC1 16 | 49 | #define USBPORTSC1 16 |
49 | #define USBPORTSC2 18 | 50 | #define USBPORTSC2 18 |
50 | #define USBPORTSC_CCS 0x0001 /* Current Connect Status ("device present") */ | 51 | #define USBPORTSC_CCS 0x0001 /* Current Connect Status |
52 | * ("device present") */ | ||
51 | #define USBPORTSC_CSC 0x0002 /* Connect Status Change */ | 53 | #define USBPORTSC_CSC 0x0002 /* Connect Status Change */ |
52 | #define USBPORTSC_PE 0x0004 /* Port Enable */ | 54 | #define USBPORTSC_PE 0x0004 /* Port Enable */ |
53 | #define USBPORTSC_PEC 0x0008 /* Port Enable Change */ | 55 | #define USBPORTSC_PEC 0x0008 /* Port Enable Change */ |
@@ -71,15 +73,16 @@ | |||
71 | #define USBLEGSUP_RWC 0x8f00 /* the R/WC bits */ | 73 | #define USBLEGSUP_RWC 0x8f00 /* the R/WC bits */ |
72 | #define USBLEGSUP_RO 0x5040 /* R/O and reserved bits */ | 74 | #define USBLEGSUP_RO 0x5040 /* R/O and reserved bits */ |
73 | 75 | ||
74 | #define UHCI_PTR_BITS cpu_to_le32(0x000F) | 76 | #define UHCI_PTR_BITS __constant_cpu_to_le32(0x000F) |
75 | #define UHCI_PTR_TERM cpu_to_le32(0x0001) | 77 | #define UHCI_PTR_TERM __constant_cpu_to_le32(0x0001) |
76 | #define UHCI_PTR_QH cpu_to_le32(0x0002) | 78 | #define UHCI_PTR_QH __constant_cpu_to_le32(0x0002) |
77 | #define UHCI_PTR_DEPTH cpu_to_le32(0x0004) | 79 | #define UHCI_PTR_DEPTH __constant_cpu_to_le32(0x0004) |
78 | #define UHCI_PTR_BREADTH cpu_to_le32(0x0000) | 80 | #define UHCI_PTR_BREADTH __constant_cpu_to_le32(0x0000) |
79 | 81 | ||
80 | #define UHCI_NUMFRAMES 1024 /* in the frame list [array] */ | 82 | #define UHCI_NUMFRAMES 1024 /* in the frame list [array] */ |
81 | #define UHCI_MAX_SOF_NUMBER 2047 /* in an SOF packet */ | 83 | #define UHCI_MAX_SOF_NUMBER 2047 /* in an SOF packet */ |
82 | #define CAN_SCHEDULE_FRAMES 1000 /* how far future frames can be scheduled */ | 84 | #define CAN_SCHEDULE_FRAMES 1000 /* how far in the future frames |
85 | * can be scheduled */ | ||
83 | 86 | ||
84 | 87 | ||
85 | /* | 88 | /* |
@@ -87,38 +90,59 @@ | |||
87 | */ | 90 | */ |
88 | 91 | ||
89 | /* | 92 | /* |
90 | * One role of a QH is to hold a queue of TDs for some endpoint. Each QH is | 93 | * One role of a QH is to hold a queue of TDs for some endpoint. One QH goes |
91 | * used with one URB, and qh->element (updated by the HC) is either: | 94 | * with each endpoint, and qh->element (updated by the HC) is either: |
92 | * - the next unprocessed TD for the URB, or | 95 | * - the next unprocessed TD in the endpoint's queue, or |
93 | * - UHCI_PTR_TERM (when there's no more traffic for this endpoint), or | 96 | * - UHCI_PTR_TERM (when there's no more traffic for this endpoint). |
94 | * - the QH for the next URB queued to the same endpoint. | ||
95 | * | 97 | * |
96 | * The other role of a QH is to serve as a "skeleton" framelist entry, so we | 98 | * The other role of a QH is to serve as a "skeleton" framelist entry, so we |
97 | * can easily splice a QH for some endpoint into the schedule at the right | 99 | * can easily splice a QH for some endpoint into the schedule at the right |
98 | * place. Then qh->element is UHCI_PTR_TERM. | 100 | * place. Then qh->element is UHCI_PTR_TERM. |
99 | * | 101 | * |
100 | * In the frame list, qh->link maintains a list of QHs seen by the HC: | 102 | * In the schedule, qh->link maintains a list of QHs seen by the HC: |
101 | * skel1 --> ep1-qh --> ep2-qh --> ... --> skel2 --> ... | 103 | * skel1 --> ep1-qh --> ep2-qh --> ... --> skel2 --> ... |
104 | * | ||
105 | * qh->node is the software equivalent of qh->link. The differences | ||
106 | * are that the software list is doubly-linked and QHs in the UNLINKING | ||
107 | * state are on the software list but not the hardware schedule. | ||
108 | * | ||
109 | * For bookkeeping purposes we maintain QHs even for Isochronous endpoints, | ||
110 | * but they never get added to the hardware schedule. | ||
102 | */ | 111 | */ |
112 | #define QH_STATE_IDLE 1 /* QH is not being used */ | ||
113 | #define QH_STATE_UNLINKING 2 /* QH has been removed from the | ||
114 | * schedule but the hardware may | ||
115 | * still be using it */ | ||
116 | #define QH_STATE_ACTIVE 3 /* QH is on the schedule */ | ||
117 | |||
103 | struct uhci_qh { | 118 | struct uhci_qh { |
104 | /* Hardware fields */ | 119 | /* Hardware fields */ |
105 | __le32 link; /* Next queue */ | 120 | __le32 link; /* Next QH in the schedule */ |
106 | __le32 element; /* Queue element pointer */ | 121 | __le32 element; /* Queue element (TD) pointer */ |
107 | 122 | ||
108 | /* Software fields */ | 123 | /* Software fields */ |
109 | dma_addr_t dma_handle; | 124 | dma_addr_t dma_handle; |
110 | 125 | ||
111 | struct urb_priv *urbp; | 126 | struct list_head node; /* Node in the list of QHs */ |
127 | struct usb_host_endpoint *hep; /* Endpoint information */ | ||
128 | struct usb_device *udev; | ||
129 | struct list_head queue; /* Queue of urbps for this QH */ | ||
130 | struct uhci_qh *skel; /* Skeleton for this QH */ | ||
131 | struct uhci_td *dummy_td; /* Dummy TD to end the queue */ | ||
112 | 132 | ||
113 | struct list_head list; | 133 | unsigned int unlink_frame; /* When the QH was unlinked */ |
114 | struct list_head remove_list; | 134 | int state; /* QH_STATE_xxx; see above */ |
135 | |||
136 | unsigned int initial_toggle:1; /* Endpoint's current toggle value */ | ||
137 | unsigned int needs_fixup:1; /* Must fix the TD toggle values */ | ||
138 | unsigned int is_stopped:1; /* Queue was stopped by an error */ | ||
115 | } __attribute__((aligned(16))); | 139 | } __attribute__((aligned(16))); |
116 | 140 | ||
117 | /* | 141 | /* |
118 | * We need a special accessor for the element pointer because it is | 142 | * We need a special accessor for the element pointer because it is |
119 | * subject to asynchronous updates by the controller. | 143 | * subject to asynchronous updates by the controller. |
120 | */ | 144 | */ |
121 | static __le32 inline qh_element(struct uhci_qh *qh) { | 145 | static inline __le32 qh_element(struct uhci_qh *qh) { |
122 | __le32 element = qh->element; | 146 | __le32 element = qh->element; |
123 | 147 | ||
124 | barrier(); | 148 | barrier(); |
@@ -149,11 +173,13 @@ static __le32 inline qh_element(struct uhci_qh *qh) { | |||
149 | #define TD_CTRL_ACTLEN_MASK 0x7FF /* actual length, encoded as n - 1 */ | 173 | #define TD_CTRL_ACTLEN_MASK 0x7FF /* actual length, encoded as n - 1 */ |
150 | 174 | ||
151 | #define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \ | 175 | #define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \ |
152 | TD_CTRL_BABBLE | TD_CTRL_CRCTIME | TD_CTRL_BITSTUFF) | 176 | TD_CTRL_BABBLE | TD_CTRL_CRCTIME | \ |
177 | TD_CTRL_BITSTUFF) | ||
153 | 178 | ||
154 | #define uhci_maxerr(err) ((err) << TD_CTRL_C_ERR_SHIFT) | 179 | #define uhci_maxerr(err) ((err) << TD_CTRL_C_ERR_SHIFT) |
155 | #define uhci_status_bits(ctrl_sts) ((ctrl_sts) & 0xF60000) | 180 | #define uhci_status_bits(ctrl_sts) ((ctrl_sts) & 0xF60000) |
156 | #define uhci_actual_length(ctrl_sts) (((ctrl_sts) + 1) & TD_CTRL_ACTLEN_MASK) /* 1-based */ | 181 | #define uhci_actual_length(ctrl_sts) (((ctrl_sts) + 1) & \ |
182 | TD_CTRL_ACTLEN_MASK) /* 1-based */ | ||
157 | 183 | ||
158 | /* | 184 | /* |
159 | * for TD <info>: (a.k.a. Token) | 185 | * for TD <info>: (a.k.a. Token) |
@@ -163,7 +189,7 @@ static __le32 inline qh_element(struct uhci_qh *qh) { | |||
163 | #define TD_TOKEN_TOGGLE_SHIFT 19 | 189 | #define TD_TOKEN_TOGGLE_SHIFT 19 |
164 | #define TD_TOKEN_TOGGLE (1 << 19) | 190 | #define TD_TOKEN_TOGGLE (1 << 19) |
165 | #define TD_TOKEN_EXPLEN_SHIFT 21 | 191 | #define TD_TOKEN_EXPLEN_SHIFT 21 |
166 | #define TD_TOKEN_EXPLEN_MASK 0x7FF /* expected length, encoded as n - 1 */ | 192 | #define TD_TOKEN_EXPLEN_MASK 0x7FF /* expected length, encoded as n-1 */ |
167 | #define TD_TOKEN_PID_MASK 0xFF | 193 | #define TD_TOKEN_PID_MASK 0xFF |
168 | 194 | ||
169 | #define uhci_explen(len) ((((len) - 1) & TD_TOKEN_EXPLEN_MASK) << \ | 195 | #define uhci_explen(len) ((((len) - 1) & TD_TOKEN_EXPLEN_MASK) << \ |
@@ -187,7 +213,7 @@ static __le32 inline qh_element(struct uhci_qh *qh) { | |||
187 | * sw space after the TD entry. | 213 | * sw space after the TD entry. |
188 | * | 214 | * |
189 | * td->link points to either another TD (not necessarily for the same urb or | 215 | * td->link points to either another TD (not necessarily for the same urb or |
190 | * even the same endpoint), or nothing (PTR_TERM), or a QH (for queued urbs). | 216 | * even the same endpoint), or nothing (PTR_TERM), or a QH. |
191 | */ | 217 | */ |
192 | struct uhci_td { | 218 | struct uhci_td { |
193 | /* Hardware fields */ | 219 | /* Hardware fields */ |
@@ -210,7 +236,7 @@ struct uhci_td { | |||
210 | * We need a special accessor for the control/status word because it is | 236 | * We need a special accessor for the control/status word because it is |
211 | * subject to asynchronous updates by the controller. | 237 | * subject to asynchronous updates by the controller. |
212 | */ | 238 | */ |
213 | static u32 inline td_status(struct uhci_td *td) { | 239 | static inline u32 td_status(struct uhci_td *td) { |
214 | __le32 status = td->status; | 240 | __le32 status = td->status; |
215 | 241 | ||
216 | barrier(); | 242 | barrier(); |
@@ -223,17 +249,14 @@ static u32 inline td_status(struct uhci_td *td) { | |||
223 | */ | 249 | */ |
224 | 250 | ||
225 | /* | 251 | /* |
226 | * The UHCI driver places Interrupt, Control and Bulk into QHs both | 252 | * The UHCI driver uses QHs with Interrupt, Control and Bulk URBs for |
227 | * to group together TDs for one transfer, and also to facilitate queuing | 253 | * automatic queuing. To make it easy to insert entries into the schedule, |
228 | * of URBs. To make it easy to insert entries into the schedule, we have | 254 | * we have a skeleton of QHs for each predefined Interrupt latency, |
229 | * a skeleton of QHs for each predefined Interrupt latency, low-speed | 255 | * low-speed control, full-speed control, bulk, and terminating QH |
230 | * control, full-speed control and terminating QH (see explanation for | 256 | * (see explanation for the terminating QH below). |
231 | * the terminating QH below). | ||
232 | * | 257 | * |
233 | * When we want to add a new QH, we add it to the end of the list for the | 258 | * When we want to add a new QH, we add it to the end of the list for the |
234 | * skeleton QH. | 259 | * skeleton QH. For instance, the schedule list can look like this: |
235 | * | ||
236 | * For instance, the queue can look like this: | ||
237 | * | 260 | * |
238 | * skel int128 QH | 261 | * skel int128 QH |
239 | * dev 1 interrupt QH | 262 | * dev 1 interrupt QH |
@@ -256,26 +279,31 @@ static u32 inline td_status(struct uhci_td *td) { | |||
256 | * - To loop back to the full-speed control queue for full-speed bandwidth | 279 | * - To loop back to the full-speed control queue for full-speed bandwidth |
257 | * reclamation. | 280 | * reclamation. |
258 | * | 281 | * |
259 | * Isochronous transfers are stored before the start of the skeleton | 282 | * There's a special skeleton QH for Isochronous QHs. It never appears |
260 | * schedule and don't use QHs. While the UHCI spec doesn't forbid the | 283 | * on the schedule, and Isochronous TDs go on the schedule before the |
261 | * use of QHs for Isochronous, it doesn't use them either. And the spec | 284 | * the skeleton QHs. The hardware accesses them directly rather than |
262 | * says that queues never advance on an error completion status, which | 285 | * through their QH, which is used only for bookkeeping purposes. |
263 | * makes them totally unsuitable for Isochronous transfers. | 286 | * While the UHCI spec doesn't forbid the use of QHs for Isochronous, |
287 | * it doesn't use them either. And the spec says that queues never | ||
288 | * advance on an error completion status, which makes them totally | ||
289 | * unsuitable for Isochronous transfers. | ||
264 | */ | 290 | */ |
265 | 291 | ||
266 | #define UHCI_NUM_SKELQH 12 | 292 | #define UHCI_NUM_SKELQH 14 |
267 | #define skel_int128_qh skelqh[0] | 293 | #define skel_unlink_qh skelqh[0] |
268 | #define skel_int64_qh skelqh[1] | 294 | #define skel_iso_qh skelqh[1] |
269 | #define skel_int32_qh skelqh[2] | 295 | #define skel_int128_qh skelqh[2] |
270 | #define skel_int16_qh skelqh[3] | 296 | #define skel_int64_qh skelqh[3] |
271 | #define skel_int8_qh skelqh[4] | 297 | #define skel_int32_qh skelqh[4] |
272 | #define skel_int4_qh skelqh[5] | 298 | #define skel_int16_qh skelqh[5] |
273 | #define skel_int2_qh skelqh[6] | 299 | #define skel_int8_qh skelqh[6] |
274 | #define skel_int1_qh skelqh[7] | 300 | #define skel_int4_qh skelqh[7] |
275 | #define skel_ls_control_qh skelqh[8] | 301 | #define skel_int2_qh skelqh[8] |
276 | #define skel_fs_control_qh skelqh[9] | 302 | #define skel_int1_qh skelqh[9] |
277 | #define skel_bulk_qh skelqh[10] | 303 | #define skel_ls_control_qh skelqh[10] |
278 | #define skel_term_qh skelqh[11] | 304 | #define skel_fs_control_qh skelqh[11] |
305 | #define skel_bulk_qh skelqh[12] | ||
306 | #define skel_term_qh skelqh[13] | ||
279 | 307 | ||
280 | /* | 308 | /* |
281 | * Search tree for determining where <interval> fits in the skelqh[] | 309 | * Search tree for determining where <interval> fits in the skelqh[] |
@@ -293,21 +321,21 @@ static inline int __interval_to_skel(int interval) | |||
293 | if (interval < 16) { | 321 | if (interval < 16) { |
294 | if (interval < 4) { | 322 | if (interval < 4) { |
295 | if (interval < 2) | 323 | if (interval < 2) |
296 | return 7; /* int1 for 0-1 ms */ | 324 | return 9; /* int1 for 0-1 ms */ |
297 | return 6; /* int2 for 2-3 ms */ | 325 | return 8; /* int2 for 2-3 ms */ |
298 | } | 326 | } |
299 | if (interval < 8) | 327 | if (interval < 8) |
300 | return 5; /* int4 for 4-7 ms */ | 328 | return 7; /* int4 for 4-7 ms */ |
301 | return 4; /* int8 for 8-15 ms */ | 329 | return 6; /* int8 for 8-15 ms */ |
302 | } | 330 | } |
303 | if (interval < 64) { | 331 | if (interval < 64) { |
304 | if (interval < 32) | 332 | if (interval < 32) |
305 | return 3; /* int16 for 16-31 ms */ | 333 | return 5; /* int16 for 16-31 ms */ |
306 | return 2; /* int32 for 32-63 ms */ | 334 | return 4; /* int32 for 32-63 ms */ |
307 | } | 335 | } |
308 | if (interval < 128) | 336 | if (interval < 128) |
309 | return 1; /* int64 for 64-127 ms */ | 337 | return 3; /* int64 for 64-127 ms */ |
310 | return 0; /* int128 for 128-255 ms (Max.) */ | 338 | return 2; /* int128 for 128-255 ms (Max.) */ |
311 | } | 339 | } |
312 | 340 | ||
313 | 341 | ||
@@ -360,15 +388,16 @@ struct uhci_hcd { | |||
360 | 388 | ||
361 | struct uhci_td *term_td; /* Terminating TD, see UHCI bug */ | 389 | struct uhci_td *term_td; /* Terminating TD, see UHCI bug */ |
362 | struct uhci_qh *skelqh[UHCI_NUM_SKELQH]; /* Skeleton QHs */ | 390 | struct uhci_qh *skelqh[UHCI_NUM_SKELQH]; /* Skeleton QHs */ |
391 | struct uhci_qh *next_qh; /* Next QH to scan */ | ||
363 | 392 | ||
364 | spinlock_t lock; | 393 | spinlock_t lock; |
365 | 394 | ||
366 | dma_addr_t frame_dma_handle; /* Hardware frame list */ | 395 | dma_addr_t frame_dma_handle; /* Hardware frame list */ |
367 | __le32 *frame; | 396 | __le32 *frame; |
368 | void **frame_cpu; /* CPU's frame list */ | 397 | void **frame_cpu; /* CPU's frame list */ |
369 | 398 | ||
370 | int fsbr; /* Full-speed bandwidth reclamation */ | 399 | int fsbr; /* Full-speed bandwidth reclamation */ |
371 | unsigned long fsbrtimeout; /* FSBR delay */ | 400 | unsigned long fsbrtimeout; /* FSBR delay */ |
372 | 401 | ||
373 | enum uhci_rh_state rh_state; | 402 | enum uhci_rh_state rh_state; |
374 | unsigned long auto_stop_time; /* When to AUTO_STOP */ | 403 | unsigned long auto_stop_time; /* When to AUTO_STOP */ |
@@ -382,6 +411,7 @@ struct uhci_hcd { | |||
382 | unsigned int hc_inaccessible:1; /* HC is suspended or dead */ | 411 | unsigned int hc_inaccessible:1; /* HC is suspended or dead */ |
383 | unsigned int working_RD:1; /* Suspended root hub doesn't | 412 | unsigned int working_RD:1; /* Suspended root hub doesn't |
384 | need to be polled */ | 413 | need to be polled */ |
414 | unsigned int is_initialized:1; /* Data structure is usable */ | ||
385 | 415 | ||
386 | /* Support for port suspend/resume/reset */ | 416 | /* Support for port suspend/resume/reset */ |
387 | unsigned long port_c_suspend; /* Bit-arrays of ports */ | 417 | unsigned long port_c_suspend; /* Bit-arrays of ports */ |
@@ -389,27 +419,16 @@ struct uhci_hcd { | |||
389 | unsigned long resuming_ports; | 419 | unsigned long resuming_ports; |
390 | unsigned long ports_timeout; /* Time to stop signalling */ | 420 | unsigned long ports_timeout; /* Time to stop signalling */ |
391 | 421 | ||
392 | /* Main list of URBs currently controlled by this HC */ | ||
393 | struct list_head urb_list; | ||
394 | |||
395 | /* List of QHs that are done, but waiting to be unlinked (race) */ | ||
396 | struct list_head qh_remove_list; | ||
397 | unsigned int qh_remove_age; /* Age in frames */ | ||
398 | |||
399 | /* List of TDs that are done, but waiting to be freed (race) */ | 422 | /* List of TDs that are done, but waiting to be freed (race) */ |
400 | struct list_head td_remove_list; | 423 | struct list_head td_remove_list; |
401 | unsigned int td_remove_age; /* Age in frames */ | 424 | unsigned int td_remove_age; /* Age in frames */ |
402 | 425 | ||
403 | /* List of asynchronously unlinked URBs */ | 426 | struct list_head idle_qh_list; /* Where the idle QHs live */ |
404 | struct list_head urb_remove_list; | ||
405 | unsigned int urb_remove_age; /* Age in frames */ | ||
406 | |||
407 | /* List of URBs awaiting completion callback */ | ||
408 | struct list_head complete_list; | ||
409 | 427 | ||
410 | int rh_numports; /* Number of root-hub ports */ | 428 | int rh_numports; /* Number of root-hub ports */ |
411 | 429 | ||
412 | wait_queue_head_t waitqh; /* endpoint_disable waiters */ | 430 | wait_queue_head_t waitqh; /* endpoint_disable waiters */ |
431 | int num_waiting; /* Number of waiters */ | ||
413 | }; | 432 | }; |
414 | 433 | ||
415 | /* Convert between a usb_hcd pointer and the corresponding uhci_hcd */ | 434 | /* Convert between a usb_hcd pointer and the corresponding uhci_hcd */ |
@@ -429,7 +448,7 @@ static inline struct usb_hcd *uhci_to_hcd(struct uhci_hcd *uhci) | |||
429 | * Private per-URB data | 448 | * Private per-URB data |
430 | */ | 449 | */ |
431 | struct urb_priv { | 450 | struct urb_priv { |
432 | struct list_head urb_list; | 451 | struct list_head node; /* Node in the QH's urbp list */ |
433 | 452 | ||
434 | struct urb *urb; | 453 | struct urb *urb; |
435 | 454 | ||
@@ -437,15 +456,8 @@ struct urb_priv { | |||
437 | struct list_head td_list; | 456 | struct list_head td_list; |
438 | 457 | ||
439 | unsigned fsbr : 1; /* URB turned on FSBR */ | 458 | unsigned fsbr : 1; /* URB turned on FSBR */ |
440 | unsigned fsbr_timeout : 1; /* URB timed out on FSBR */ | 459 | unsigned short_transfer : 1; /* URB got a short transfer, no |
441 | unsigned queued : 1; /* QH was queued (not linked in) */ | 460 | * need to rescan */ |
442 | unsigned short_control_packet : 1; /* If we get a short packet during */ | ||
443 | /* a control transfer, retrigger */ | ||
444 | /* the status phase */ | ||
445 | |||
446 | unsigned long fsbrtime; /* In jiffies */ | ||
447 | |||
448 | struct list_head queue_list; | ||
449 | }; | 461 | }; |
450 | 462 | ||
451 | 463 | ||
diff --git a/drivers/usb/host/uhci-hub.c b/drivers/usb/host/uhci-hub.c index a71e48a66805..152971d16769 100644 --- a/drivers/usb/host/uhci-hub.c +++ b/drivers/usb/host/uhci-hub.c | |||
@@ -99,6 +99,21 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port, | |||
99 | } | 99 | } |
100 | } | 100 | } |
101 | 101 | ||
102 | /* Wait for the UHCI controller in HP's iLO2 server management chip. | ||
103 | * It can take up to 250 us to finish a reset and set the CSC bit. | ||
104 | */ | ||
105 | static void wait_for_HP(unsigned long port_addr) | ||
106 | { | ||
107 | int i; | ||
108 | |||
109 | for (i = 10; i < 250; i += 10) { | ||
110 | if (inw(port_addr) & USBPORTSC_CSC) | ||
111 | return; | ||
112 | udelay(10); | ||
113 | } | ||
114 | /* Log a warning? */ | ||
115 | } | ||
116 | |||
102 | static void uhci_check_ports(struct uhci_hcd *uhci) | 117 | static void uhci_check_ports(struct uhci_hcd *uhci) |
103 | { | 118 | { |
104 | unsigned int port; | 119 | unsigned int port; |
@@ -113,6 +128,12 @@ static void uhci_check_ports(struct uhci_hcd *uhci) | |||
113 | CLR_RH_PORTSTAT(USBPORTSC_PR); | 128 | CLR_RH_PORTSTAT(USBPORTSC_PR); |
114 | udelay(10); | 129 | udelay(10); |
115 | 130 | ||
131 | /* HP's server management chip requires | ||
132 | * a longer delay. */ | ||
133 | if (to_pci_dev(uhci_dev(uhci))->vendor == | ||
134 | PCI_VENDOR_ID_HP) | ||
135 | wait_for_HP(port_addr); | ||
136 | |||
116 | /* If the port was enabled before, turning | 137 | /* If the port was enabled before, turning |
117 | * reset on caused a port enable change. | 138 | * reset on caused a port enable change. |
118 | * Turning reset off causes a port connect | 139 | * Turning reset off causes a port connect |
diff --git a/drivers/usb/host/uhci-q.c b/drivers/usb/host/uhci-q.c index 782398045f9f..a06d84c19e13 100644 --- a/drivers/usb/host/uhci-q.c +++ b/drivers/usb/host/uhci-q.c | |||
@@ -13,13 +13,9 @@ | |||
13 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface | 13 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface |
14 | * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). | 14 | * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). |
15 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) | 15 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) |
16 | * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu | 16 | * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu |
17 | */ | 17 | */ |
18 | 18 | ||
19 | static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb); | ||
20 | static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb); | ||
21 | static void uhci_remove_pending_urbps(struct uhci_hcd *uhci); | ||
22 | static void uhci_free_pending_qhs(struct uhci_hcd *uhci); | ||
23 | static void uhci_free_pending_tds(struct uhci_hcd *uhci); | 19 | static void uhci_free_pending_tds(struct uhci_hcd *uhci); |
24 | 20 | ||
25 | /* | 21 | /* |
@@ -30,7 +26,7 @@ static void uhci_free_pending_tds(struct uhci_hcd *uhci); | |||
30 | * games with the FSBR code to make sure we get the correct order in all | 26 | * games with the FSBR code to make sure we get the correct order in all |
31 | * the cases. I don't think it's worth the effort | 27 | * the cases. I don't think it's worth the effort |
32 | */ | 28 | */ |
33 | static inline void uhci_set_next_interrupt(struct uhci_hcd *uhci) | 29 | static void uhci_set_next_interrupt(struct uhci_hcd *uhci) |
34 | { | 30 | { |
35 | if (uhci->is_stopped) | 31 | if (uhci->is_stopped) |
36 | mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); | 32 | mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); |
@@ -42,12 +38,6 @@ static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci) | |||
42 | uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC); | 38 | uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC); |
43 | } | 39 | } |
44 | 40 | ||
45 | static inline void uhci_moveto_complete(struct uhci_hcd *uhci, | ||
46 | struct urb_priv *urbp) | ||
47 | { | ||
48 | list_move_tail(&urbp->urb_list, &uhci->complete_list); | ||
49 | } | ||
50 | |||
51 | static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci) | 41 | static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci) |
52 | { | 42 | { |
53 | dma_addr_t dma_handle; | 43 | dma_addr_t dma_handle; |
@@ -58,10 +48,6 @@ static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci) | |||
58 | return NULL; | 48 | return NULL; |
59 | 49 | ||
60 | td->dma_handle = dma_handle; | 50 | td->dma_handle = dma_handle; |
61 | |||
62 | td->link = UHCI_PTR_TERM; | ||
63 | td->buffer = 0; | ||
64 | |||
65 | td->frame = -1; | 51 | td->frame = -1; |
66 | 52 | ||
67 | INIT_LIST_HEAD(&td->list); | 53 | INIT_LIST_HEAD(&td->list); |
@@ -71,6 +57,18 @@ static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci) | |||
71 | return td; | 57 | return td; |
72 | } | 58 | } |
73 | 59 | ||
60 | static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td) | ||
61 | { | ||
62 | if (!list_empty(&td->list)) | ||
63 | dev_warn(uhci_dev(uhci), "td %p still in list!\n", td); | ||
64 | if (!list_empty(&td->remove_list)) | ||
65 | dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td); | ||
66 | if (!list_empty(&td->fl_list)) | ||
67 | dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td); | ||
68 | |||
69 | dma_pool_free(uhci->td_pool, td, td->dma_handle); | ||
70 | } | ||
71 | |||
74 | static inline void uhci_fill_td(struct uhci_td *td, u32 status, | 72 | static inline void uhci_fill_td(struct uhci_td *td, u32 status, |
75 | u32 token, u32 buffer) | 73 | u32 token, u32 buffer) |
76 | { | 74 | { |
@@ -82,7 +80,8 @@ static inline void uhci_fill_td(struct uhci_td *td, u32 status, | |||
82 | /* | 80 | /* |
83 | * We insert Isochronous URBs directly into the frame list at the beginning | 81 | * We insert Isochronous URBs directly into the frame list at the beginning |
84 | */ | 82 | */ |
85 | static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, unsigned framenum) | 83 | static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci, |
84 | struct uhci_td *td, unsigned framenum) | ||
86 | { | 85 | { |
87 | framenum &= (UHCI_NUMFRAMES - 1); | 86 | framenum &= (UHCI_NUMFRAMES - 1); |
88 | 87 | ||
@@ -108,7 +107,7 @@ static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, | |||
108 | } | 107 | } |
109 | } | 108 | } |
110 | 109 | ||
111 | static inline void uhci_remove_td_frame_list(struct uhci_hcd *uhci, | 110 | static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci, |
112 | struct uhci_td *td) | 111 | struct uhci_td *td) |
113 | { | 112 | { |
114 | /* If it's not inserted, don't remove it */ | 113 | /* If it's not inserted, don't remove it */ |
@@ -139,48 +138,21 @@ static inline void uhci_remove_td_frame_list(struct uhci_hcd *uhci, | |||
139 | td->frame = -1; | 138 | td->frame = -1; |
140 | } | 139 | } |
141 | 140 | ||
142 | static void unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb) | 141 | /* |
142 | * Remove all the TDs for an Isochronous URB from the frame list | ||
143 | */ | ||
144 | static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb) | ||
143 | { | 145 | { |
144 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; | 146 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; |
145 | struct uhci_td *td; | 147 | struct uhci_td *td; |
146 | 148 | ||
147 | list_for_each_entry(td, &urbp->td_list, list) | 149 | list_for_each_entry(td, &urbp->td_list, list) |
148 | uhci_remove_td_frame_list(uhci, td); | 150 | uhci_remove_td_from_frame_list(uhci, td); |
149 | wmb(); | 151 | wmb(); |
150 | } | 152 | } |
151 | 153 | ||
152 | /* | 154 | static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci, |
153 | * Inserts a td list into qh. | 155 | struct usb_device *udev, struct usb_host_endpoint *hep) |
154 | */ | ||
155 | static void uhci_insert_tds_in_qh(struct uhci_qh *qh, struct urb *urb, __le32 breadth) | ||
156 | { | ||
157 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | ||
158 | struct uhci_td *td; | ||
159 | __le32 *plink; | ||
160 | |||
161 | /* Ordering isn't important here yet since the QH hasn't been */ | ||
162 | /* inserted into the schedule yet */ | ||
163 | plink = &qh->element; | ||
164 | list_for_each_entry(td, &urbp->td_list, list) { | ||
165 | *plink = cpu_to_le32(td->dma_handle) | breadth; | ||
166 | plink = &td->link; | ||
167 | } | ||
168 | *plink = UHCI_PTR_TERM; | ||
169 | } | ||
170 | |||
171 | static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td) | ||
172 | { | ||
173 | if (!list_empty(&td->list)) | ||
174 | dev_warn(uhci_dev(uhci), "td %p still in list!\n", td); | ||
175 | if (!list_empty(&td->remove_list)) | ||
176 | dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td); | ||
177 | if (!list_empty(&td->fl_list)) | ||
178 | dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td); | ||
179 | |||
180 | dma_pool_free(uhci->td_pool, td, td->dma_handle); | ||
181 | } | ||
182 | |||
183 | static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci) | ||
184 | { | 156 | { |
185 | dma_addr_t dma_handle; | 157 | dma_addr_t dma_handle; |
186 | struct uhci_qh *qh; | 158 | struct uhci_qh *qh; |
@@ -194,256 +166,217 @@ static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci) | |||
194 | qh->element = UHCI_PTR_TERM; | 166 | qh->element = UHCI_PTR_TERM; |
195 | qh->link = UHCI_PTR_TERM; | 167 | qh->link = UHCI_PTR_TERM; |
196 | 168 | ||
197 | qh->urbp = NULL; | 169 | INIT_LIST_HEAD(&qh->queue); |
198 | 170 | INIT_LIST_HEAD(&qh->node); | |
199 | INIT_LIST_HEAD(&qh->list); | ||
200 | INIT_LIST_HEAD(&qh->remove_list); | ||
201 | 171 | ||
172 | if (udev) { /* Normal QH */ | ||
173 | qh->dummy_td = uhci_alloc_td(uhci); | ||
174 | if (!qh->dummy_td) { | ||
175 | dma_pool_free(uhci->qh_pool, qh, dma_handle); | ||
176 | return NULL; | ||
177 | } | ||
178 | qh->state = QH_STATE_IDLE; | ||
179 | qh->hep = hep; | ||
180 | qh->udev = udev; | ||
181 | hep->hcpriv = qh; | ||
182 | |||
183 | } else { /* Skeleton QH */ | ||
184 | qh->state = QH_STATE_ACTIVE; | ||
185 | qh->udev = NULL; | ||
186 | } | ||
202 | return qh; | 187 | return qh; |
203 | } | 188 | } |
204 | 189 | ||
205 | static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) | 190 | static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) |
206 | { | 191 | { |
207 | if (!list_empty(&qh->list)) | 192 | WARN_ON(qh->state != QH_STATE_IDLE && qh->udev); |
193 | if (!list_empty(&qh->queue)) | ||
208 | dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh); | 194 | dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh); |
209 | if (!list_empty(&qh->remove_list)) | ||
210 | dev_warn(uhci_dev(uhci), "qh %p still in remove_list!\n", qh); | ||
211 | 195 | ||
196 | list_del(&qh->node); | ||
197 | if (qh->udev) { | ||
198 | qh->hep->hcpriv = NULL; | ||
199 | uhci_free_td(uhci, qh->dummy_td); | ||
200 | } | ||
212 | dma_pool_free(uhci->qh_pool, qh, qh->dma_handle); | 201 | dma_pool_free(uhci->qh_pool, qh, qh->dma_handle); |
213 | } | 202 | } |
214 | 203 | ||
215 | /* | 204 | /* |
216 | * Append this urb's qh after the last qh in skelqh->list | 205 | * When the currently executing URB is dequeued, save its current toggle value |
217 | * | ||
218 | * Note that urb_priv.queue_list doesn't have a separate queue head; | ||
219 | * it's a ring with every element "live". | ||
220 | */ | 206 | */ |
221 | static void uhci_insert_qh(struct uhci_hcd *uhci, struct uhci_qh *skelqh, struct urb *urb) | 207 | static void uhci_save_toggle(struct uhci_qh *qh, struct urb *urb) |
222 | { | 208 | { |
223 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | 209 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; |
224 | struct urb_priv *turbp; | 210 | struct uhci_td *td; |
225 | struct uhci_qh *lqh; | ||
226 | 211 | ||
227 | /* Grab the last QH */ | 212 | /* If the QH element pointer is UHCI_PTR_TERM then then currently |
228 | lqh = list_entry(skelqh->list.prev, struct uhci_qh, list); | 213 | * executing URB has already been unlinked, so this one isn't it. */ |
214 | if (qh_element(qh) == UHCI_PTR_TERM || | ||
215 | qh->queue.next != &urbp->node) | ||
216 | return; | ||
217 | qh->element = UHCI_PTR_TERM; | ||
229 | 218 | ||
230 | /* Point to the next skelqh */ | 219 | /* Only bulk and interrupt pipes have to worry about toggles */ |
231 | urbp->qh->link = lqh->link; | 220 | if (!(usb_pipetype(urb->pipe) == PIPE_BULK || |
232 | wmb(); /* Ordering is important */ | 221 | usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) |
222 | return; | ||
233 | 223 | ||
234 | /* | 224 | /* Find the first active TD; that's the device's toggle state */ |
235 | * Patch QHs for previous endpoint's queued URBs? HC goes | 225 | list_for_each_entry(td, &urbp->td_list, list) { |
236 | * here next, not to the next skelqh it now points to. | 226 | if (td_status(td) & TD_CTRL_ACTIVE) { |
237 | * | 227 | qh->needs_fixup = 1; |
238 | * lqh --> td ... --> qh ... --> td --> qh ... --> td | 228 | qh->initial_toggle = uhci_toggle(td_token(td)); |
239 | * | | | | 229 | return; |
240 | * v v v | 230 | } |
241 | * +<----------------+-----------------+ | ||
242 | * v | ||
243 | * newqh --> td ... --> td | ||
244 | * | | ||
245 | * v | ||
246 | * ... | ||
247 | * | ||
248 | * The HC could see (and use!) any of these as we write them. | ||
249 | */ | ||
250 | lqh->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH; | ||
251 | if (lqh->urbp) { | ||
252 | list_for_each_entry(turbp, &lqh->urbp->queue_list, queue_list) | ||
253 | turbp->qh->link = lqh->link; | ||
254 | } | 231 | } |
255 | 232 | ||
256 | list_add_tail(&urbp->qh->list, &skelqh->list); | 233 | WARN_ON(1); |
257 | } | 234 | } |
258 | 235 | ||
259 | /* | 236 | /* |
260 | * Start removal of QH from schedule; it finishes next frame. | 237 | * Fix up the data toggles for URBs in a queue, when one of them |
261 | * TDs should be unlinked before this is called. | 238 | * terminates early (short transfer, error, or dequeued). |
262 | */ | 239 | */ |
263 | static void uhci_remove_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) | 240 | static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first) |
264 | { | 241 | { |
265 | struct uhci_qh *pqh; | 242 | struct urb_priv *urbp = NULL; |
266 | __le32 newlink; | 243 | struct uhci_td *td; |
267 | 244 | unsigned int toggle = qh->initial_toggle; | |
268 | if (!qh) | 245 | unsigned int pipe; |
269 | return; | 246 | |
270 | 247 | /* Fixups for a short transfer start with the second URB in the | |
271 | /* | 248 | * queue (the short URB is the first). */ |
272 | * Only go through the hoops if it's actually linked in | 249 | if (skip_first) |
273 | */ | 250 | urbp = list_entry(qh->queue.next, struct urb_priv, node); |
274 | if (!list_empty(&qh->list)) { | 251 | |
275 | 252 | /* When starting with the first URB, if the QH element pointer is | |
276 | /* If our queue is nonempty, make the next URB the head */ | 253 | * still valid then we know the URB's toggles are okay. */ |
277 | if (!list_empty(&qh->urbp->queue_list)) { | 254 | else if (qh_element(qh) != UHCI_PTR_TERM) |
278 | struct urb_priv *nurbp; | 255 | toggle = 2; |
279 | 256 | ||
280 | nurbp = list_entry(qh->urbp->queue_list.next, | 257 | /* Fix up the toggle for the URBs in the queue. Normally this |
281 | struct urb_priv, queue_list); | 258 | * loop won't run more than once: When an error or short transfer |
282 | nurbp->queued = 0; | 259 | * occurs, the queue usually gets emptied. */ |
283 | list_add(&nurbp->qh->list, &qh->list); | 260 | urbp = list_prepare_entry(urbp, &qh->queue, node); |
284 | newlink = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH; | 261 | list_for_each_entry_continue(urbp, &qh->queue, node) { |
285 | } else | 262 | |
286 | newlink = qh->link; | 263 | /* If the first TD has the right toggle value, we don't |
287 | 264 | * need to change any toggles in this URB */ | |
288 | /* Fix up the previous QH's queue to link to either | 265 | td = list_entry(urbp->td_list.next, struct uhci_td, list); |
289 | * the new head of this queue or the start of the | 266 | if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) { |
290 | * next endpoint's queue. */ | 267 | td = list_entry(urbp->td_list.next, struct uhci_td, |
291 | pqh = list_entry(qh->list.prev, struct uhci_qh, list); | 268 | list); |
292 | pqh->link = newlink; | 269 | toggle = uhci_toggle(td_token(td)) ^ 1; |
293 | if (pqh->urbp) { | 270 | |
294 | struct urb_priv *turbp; | 271 | /* Otherwise all the toggles in the URB have to be switched */ |
295 | 272 | } else { | |
296 | list_for_each_entry(turbp, &pqh->urbp->queue_list, | 273 | list_for_each_entry(td, &urbp->td_list, list) { |
297 | queue_list) | 274 | td->token ^= __constant_cpu_to_le32( |
298 | turbp->qh->link = newlink; | 275 | TD_TOKEN_TOGGLE); |
276 | toggle ^= 1; | ||
277 | } | ||
299 | } | 278 | } |
300 | wmb(); | ||
301 | |||
302 | /* Leave qh->link in case the HC is on the QH now, it will */ | ||
303 | /* continue the rest of the schedule */ | ||
304 | qh->element = UHCI_PTR_TERM; | ||
305 | |||
306 | list_del_init(&qh->list); | ||
307 | } | ||
308 | |||
309 | list_del_init(&qh->urbp->queue_list); | ||
310 | qh->urbp = NULL; | ||
311 | |||
312 | uhci_get_current_frame_number(uhci); | ||
313 | if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) { | ||
314 | uhci_free_pending_qhs(uhci); | ||
315 | uhci->qh_remove_age = uhci->frame_number; | ||
316 | } | 279 | } |
317 | 280 | ||
318 | /* Check to see if the remove list is empty. Set the IOC bit */ | 281 | wmb(); |
319 | /* to force an interrupt so we can remove the QH */ | 282 | pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe; |
320 | if (list_empty(&uhci->qh_remove_list)) | 283 | usb_settoggle(qh->udev, usb_pipeendpoint(pipe), |
321 | uhci_set_next_interrupt(uhci); | 284 | usb_pipeout(pipe), toggle); |
322 | 285 | qh->needs_fixup = 0; | |
323 | list_add(&qh->remove_list, &uhci->qh_remove_list); | ||
324 | } | 286 | } |
325 | 287 | ||
326 | static int uhci_fixup_toggle(struct urb *urb, unsigned int toggle) | 288 | /* |
289 | * Put a QH on the schedule in both hardware and software | ||
290 | */ | ||
291 | static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) | ||
327 | { | 292 | { |
328 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | 293 | struct uhci_qh *pqh; |
329 | struct uhci_td *td; | ||
330 | |||
331 | list_for_each_entry(td, &urbp->td_list, list) { | ||
332 | if (toggle) | ||
333 | td->token |= cpu_to_le32(TD_TOKEN_TOGGLE); | ||
334 | else | ||
335 | td->token &= ~cpu_to_le32(TD_TOKEN_TOGGLE); | ||
336 | |||
337 | toggle ^= 1; | ||
338 | } | ||
339 | |||
340 | return toggle; | ||
341 | } | ||
342 | 294 | ||
343 | /* This function will append one URB's QH to another URB's QH. This is for */ | 295 | WARN_ON(list_empty(&qh->queue)); |
344 | /* queuing interrupt, control or bulk transfers */ | ||
345 | static void uhci_append_queued_urb(struct uhci_hcd *uhci, struct urb *eurb, struct urb *urb) | ||
346 | { | ||
347 | struct urb_priv *eurbp, *urbp, *furbp, *lurbp; | ||
348 | struct uhci_td *lltd; | ||
349 | 296 | ||
350 | eurbp = eurb->hcpriv; | 297 | /* Set the element pointer if it isn't set already. |
351 | urbp = urb->hcpriv; | 298 | * This isn't needed for Isochronous queues, but it doesn't hurt. */ |
299 | if (qh_element(qh) == UHCI_PTR_TERM) { | ||
300 | struct urb_priv *urbp = list_entry(qh->queue.next, | ||
301 | struct urb_priv, node); | ||
302 | struct uhci_td *td = list_entry(urbp->td_list.next, | ||
303 | struct uhci_td, list); | ||
352 | 304 | ||
353 | /* Find the first URB in the queue */ | 305 | qh->element = cpu_to_le32(td->dma_handle); |
354 | furbp = eurbp; | ||
355 | if (eurbp->queued) { | ||
356 | list_for_each_entry(furbp, &eurbp->queue_list, queue_list) | ||
357 | if (!furbp->queued) | ||
358 | break; | ||
359 | } | 306 | } |
360 | 307 | ||
361 | lurbp = list_entry(furbp->queue_list.prev, struct urb_priv, queue_list); | 308 | if (qh->state == QH_STATE_ACTIVE) |
362 | 309 | return; | |
363 | lltd = list_entry(lurbp->td_list.prev, struct uhci_td, list); | 310 | qh->state = QH_STATE_ACTIVE; |
364 | 311 | ||
365 | /* Control transfers always start with toggle 0 */ | 312 | /* Move the QH from its old list to the end of the appropriate |
366 | if (!usb_pipecontrol(urb->pipe)) | 313 | * skeleton's list */ |
367 | usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), | 314 | if (qh == uhci->next_qh) |
368 | usb_pipeout(urb->pipe), | 315 | uhci->next_qh = list_entry(qh->node.next, struct uhci_qh, |
369 | uhci_fixup_toggle(urb, | 316 | node); |
370 | uhci_toggle(td_token(lltd)) ^ 1)); | 317 | list_move_tail(&qh->node, &qh->skel->node); |
371 | 318 | ||
372 | /* All qhs in the queue need to link to the next queue */ | 319 | /* Link it into the schedule */ |
373 | urbp->qh->link = eurbp->qh->link; | 320 | pqh = list_entry(qh->node.prev, struct uhci_qh, node); |
374 | 321 | qh->link = pqh->link; | |
375 | wmb(); /* Make sure we flush everything */ | 322 | wmb(); |
376 | 323 | pqh->link = UHCI_PTR_QH | cpu_to_le32(qh->dma_handle); | |
377 | lltd->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH; | ||
378 | |||
379 | list_add_tail(&urbp->queue_list, &furbp->queue_list); | ||
380 | |||
381 | urbp->queued = 1; | ||
382 | } | 324 | } |
383 | 325 | ||
384 | static void uhci_delete_queued_urb(struct uhci_hcd *uhci, struct urb *urb) | 326 | /* |
327 | * Take a QH off the hardware schedule | ||
328 | */ | ||
329 | static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) | ||
385 | { | 330 | { |
386 | struct urb_priv *urbp, *nurbp, *purbp, *turbp; | 331 | struct uhci_qh *pqh; |
387 | struct uhci_td *pltd; | ||
388 | unsigned int toggle; | ||
389 | |||
390 | urbp = urb->hcpriv; | ||
391 | 332 | ||
392 | if (list_empty(&urbp->queue_list)) | 333 | if (qh->state == QH_STATE_UNLINKING) |
393 | return; | 334 | return; |
335 | WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev); | ||
336 | qh->state = QH_STATE_UNLINKING; | ||
394 | 337 | ||
395 | nurbp = list_entry(urbp->queue_list.next, struct urb_priv, queue_list); | 338 | /* Unlink the QH from the schedule and record when we did it */ |
339 | pqh = list_entry(qh->node.prev, struct uhci_qh, node); | ||
340 | pqh->link = qh->link; | ||
341 | mb(); | ||
396 | 342 | ||
397 | /* | 343 | uhci_get_current_frame_number(uhci); |
398 | * Fix up the toggle for the following URBs in the queue. | 344 | qh->unlink_frame = uhci->frame_number; |
399 | * Only needed for bulk and interrupt: control and isochronous | ||
400 | * endpoints don't propagate toggles between messages. | ||
401 | */ | ||
402 | if (usb_pipebulk(urb->pipe) || usb_pipeint(urb->pipe)) { | ||
403 | if (!urbp->queued) | ||
404 | /* We just set the toggle in uhci_unlink_generic */ | ||
405 | toggle = usb_gettoggle(urb->dev, | ||
406 | usb_pipeendpoint(urb->pipe), | ||
407 | usb_pipeout(urb->pipe)); | ||
408 | else { | ||
409 | /* If we're in the middle of the queue, grab the */ | ||
410 | /* toggle from the TD previous to us */ | ||
411 | purbp = list_entry(urbp->queue_list.prev, | ||
412 | struct urb_priv, queue_list); | ||
413 | pltd = list_entry(purbp->td_list.prev, | ||
414 | struct uhci_td, list); | ||
415 | toggle = uhci_toggle(td_token(pltd)) ^ 1; | ||
416 | } | ||
417 | 345 | ||
418 | list_for_each_entry(turbp, &urbp->queue_list, queue_list) { | 346 | /* Force an interrupt so we know when the QH is fully unlinked */ |
419 | if (!turbp->queued) | 347 | if (list_empty(&uhci->skel_unlink_qh->node)) |
420 | break; | 348 | uhci_set_next_interrupt(uhci); |
421 | toggle = uhci_fixup_toggle(turbp->urb, toggle); | ||
422 | } | ||
423 | 349 | ||
424 | usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), | 350 | /* Move the QH from its old list to the end of the unlinking list */ |
425 | usb_pipeout(urb->pipe), toggle); | 351 | if (qh == uhci->next_qh) |
426 | } | 352 | uhci->next_qh = list_entry(qh->node.next, struct uhci_qh, |
353 | node); | ||
354 | list_move_tail(&qh->node, &uhci->skel_unlink_qh->node); | ||
355 | } | ||
427 | 356 | ||
428 | if (urbp->queued) { | 357 | /* |
429 | /* We're somewhere in the middle (or end). The case where | 358 | * When we and the controller are through with a QH, it becomes IDLE. |
430 | * we're at the head is handled in uhci_remove_qh(). */ | 359 | * This happens when a QH has been off the schedule (on the unlinking |
431 | purbp = list_entry(urbp->queue_list.prev, struct urb_priv, | 360 | * list) for more than one frame, or when an error occurs while adding |
432 | queue_list); | 361 | * the first URB onto a new QH. |
362 | */ | ||
363 | static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh) | ||
364 | { | ||
365 | WARN_ON(qh->state == QH_STATE_ACTIVE); | ||
433 | 366 | ||
434 | pltd = list_entry(purbp->td_list.prev, struct uhci_td, list); | 367 | if (qh == uhci->next_qh) |
435 | if (nurbp->queued) | 368 | uhci->next_qh = list_entry(qh->node.next, struct uhci_qh, |
436 | pltd->link = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH; | 369 | node); |
437 | else | 370 | list_move(&qh->node, &uhci->idle_qh_list); |
438 | /* The next URB happens to be the beginning, so */ | 371 | qh->state = QH_STATE_IDLE; |
439 | /* we're the last, end the chain */ | ||
440 | pltd->link = UHCI_PTR_TERM; | ||
441 | } | ||
442 | 372 | ||
443 | /* urbp->queue_list is handled in uhci_remove_qh() */ | 373 | /* If anyone is waiting for a QH to become idle, wake them up */ |
374 | if (uhci->num_waiting) | ||
375 | wake_up_all(&uhci->waitqh); | ||
444 | } | 376 | } |
445 | 377 | ||
446 | static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *urb) | 378 | static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, |
379 | struct urb *urb) | ||
447 | { | 380 | { |
448 | struct urb_priv *urbp; | 381 | struct urb_priv *urbp; |
449 | 382 | ||
@@ -453,16 +386,11 @@ static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *u | |||
453 | 386 | ||
454 | memset((void *)urbp, 0, sizeof(*urbp)); | 387 | memset((void *)urbp, 0, sizeof(*urbp)); |
455 | 388 | ||
456 | urbp->fsbrtime = jiffies; | ||
457 | urbp->urb = urb; | 389 | urbp->urb = urb; |
390 | urb->hcpriv = urbp; | ||
458 | 391 | ||
392 | INIT_LIST_HEAD(&urbp->node); | ||
459 | INIT_LIST_HEAD(&urbp->td_list); | 393 | INIT_LIST_HEAD(&urbp->td_list); |
460 | INIT_LIST_HEAD(&urbp->queue_list); | ||
461 | INIT_LIST_HEAD(&urbp->urb_list); | ||
462 | |||
463 | list_add_tail(&urbp->urb_list, &uhci->urb_list); | ||
464 | |||
465 | urb->hcpriv = urbp; | ||
466 | 394 | ||
467 | return urbp; | 395 | return urbp; |
468 | } | 396 | } |
@@ -482,18 +410,14 @@ static void uhci_remove_td_from_urb(struct uhci_td *td) | |||
482 | list_del_init(&td->list); | 410 | list_del_init(&td->list); |
483 | } | 411 | } |
484 | 412 | ||
485 | static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb) | 413 | static void uhci_free_urb_priv(struct uhci_hcd *uhci, |
414 | struct urb_priv *urbp) | ||
486 | { | 415 | { |
487 | struct uhci_td *td, *tmp; | 416 | struct uhci_td *td, *tmp; |
488 | struct urb_priv *urbp; | ||
489 | |||
490 | urbp = (struct urb_priv *)urb->hcpriv; | ||
491 | if (!urbp) | ||
492 | return; | ||
493 | 417 | ||
494 | if (!list_empty(&urbp->urb_list)) | 418 | if (!list_empty(&urbp->node)) |
495 | dev_warn(uhci_dev(uhci), "urb %p still on uhci->urb_list " | 419 | dev_warn(uhci_dev(uhci), "urb %p still on QH's list!\n", |
496 | "or uhci->remove_list!\n", urb); | 420 | urbp->urb); |
497 | 421 | ||
498 | uhci_get_current_frame_number(uhci); | 422 | uhci_get_current_frame_number(uhci); |
499 | if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) { | 423 | if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) { |
@@ -502,7 +426,7 @@ static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb) | |||
502 | } | 426 | } |
503 | 427 | ||
504 | /* Check to see if the remove list is empty. Set the IOC bit */ | 428 | /* Check to see if the remove list is empty. Set the IOC bit */ |
505 | /* to force an interrupt so we can remove the TDs*/ | 429 | /* to force an interrupt so we can remove the TDs. */ |
506 | if (list_empty(&uhci->td_remove_list)) | 430 | if (list_empty(&uhci->td_remove_list)) |
507 | uhci_set_next_interrupt(uhci); | 431 | uhci_set_next_interrupt(uhci); |
508 | 432 | ||
@@ -511,7 +435,7 @@ static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb) | |||
511 | list_add(&td->remove_list, &uhci->td_remove_list); | 435 | list_add(&td->remove_list, &uhci->td_remove_list); |
512 | } | 436 | } |
513 | 437 | ||
514 | urb->hcpriv = NULL; | 438 | urbp->urb->hcpriv = NULL; |
515 | kmem_cache_free(uhci_up_cachep, urbp); | 439 | kmem_cache_free(uhci_up_cachep, urbp); |
516 | } | 440 | } |
517 | 441 | ||
@@ -570,34 +494,33 @@ static int uhci_map_status(int status, int dir_out) | |||
570 | /* | 494 | /* |
571 | * Control transfers | 495 | * Control transfers |
572 | */ | 496 | */ |
573 | static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb) | 497 | static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, |
498 | struct uhci_qh *qh) | ||
574 | { | 499 | { |
575 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | ||
576 | struct uhci_td *td; | 500 | struct uhci_td *td; |
577 | struct uhci_qh *qh, *skelqh; | ||
578 | unsigned long destination, status; | 501 | unsigned long destination, status; |
579 | int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); | 502 | int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize); |
580 | int len = urb->transfer_buffer_length; | 503 | int len = urb->transfer_buffer_length; |
581 | dma_addr_t data = urb->transfer_dma; | 504 | dma_addr_t data = urb->transfer_dma; |
505 | __le32 *plink; | ||
582 | 506 | ||
583 | /* The "pipe" thing contains the destination in bits 8--18 */ | 507 | /* The "pipe" thing contains the destination in bits 8--18 */ |
584 | destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; | 508 | destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; |
585 | 509 | ||
586 | /* 3 errors */ | 510 | /* 3 errors, dummy TD remains inactive */ |
587 | status = TD_CTRL_ACTIVE | uhci_maxerr(3); | 511 | status = uhci_maxerr(3); |
588 | if (urb->dev->speed == USB_SPEED_LOW) | 512 | if (urb->dev->speed == USB_SPEED_LOW) |
589 | status |= TD_CTRL_LS; | 513 | status |= TD_CTRL_LS; |
590 | 514 | ||
591 | /* | 515 | /* |
592 | * Build the TD for the control request setup packet | 516 | * Build the TD for the control request setup packet |
593 | */ | 517 | */ |
594 | td = uhci_alloc_td(uhci); | 518 | td = qh->dummy_td; |
595 | if (!td) | ||
596 | return -ENOMEM; | ||
597 | |||
598 | uhci_add_td_to_urb(urb, td); | 519 | uhci_add_td_to_urb(urb, td); |
599 | uhci_fill_td(td, status, destination | uhci_explen(8), | 520 | uhci_fill_td(td, status, destination | uhci_explen(8), |
600 | urb->setup_dma); | 521 | urb->setup_dma); |
522 | plink = &td->link; | ||
523 | status |= TD_CTRL_ACTIVE; | ||
601 | 524 | ||
602 | /* | 525 | /* |
603 | * If direction is "send", change the packet ID from SETUP (0x2D) | 526 | * If direction is "send", change the packet ID from SETUP (0x2D) |
@@ -615,21 +538,20 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
615 | * Build the DATA TDs | 538 | * Build the DATA TDs |
616 | */ | 539 | */ |
617 | while (len > 0) { | 540 | while (len > 0) { |
618 | int pktsze = len; | 541 | int pktsze = min(len, maxsze); |
619 | |||
620 | if (pktsze > maxsze) | ||
621 | pktsze = maxsze; | ||
622 | 542 | ||
623 | td = uhci_alloc_td(uhci); | 543 | td = uhci_alloc_td(uhci); |
624 | if (!td) | 544 | if (!td) |
625 | return -ENOMEM; | 545 | goto nomem; |
546 | *plink = cpu_to_le32(td->dma_handle); | ||
626 | 547 | ||
627 | /* Alternate Data0/1 (start with Data1) */ | 548 | /* Alternate Data0/1 (start with Data1) */ |
628 | destination ^= TD_TOKEN_TOGGLE; | 549 | destination ^= TD_TOKEN_TOGGLE; |
629 | 550 | ||
630 | uhci_add_td_to_urb(urb, td); | 551 | uhci_add_td_to_urb(urb, td); |
631 | uhci_fill_td(td, status, destination | uhci_explen(pktsze), | 552 | uhci_fill_td(td, status, destination | uhci_explen(pktsze), |
632 | data); | 553 | data); |
554 | plink = &td->link; | ||
633 | 555 | ||
634 | data += pktsze; | 556 | data += pktsze; |
635 | len -= pktsze; | 557 | len -= pktsze; |
@@ -640,7 +562,8 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
640 | */ | 562 | */ |
641 | td = uhci_alloc_td(uhci); | 563 | td = uhci_alloc_td(uhci); |
642 | if (!td) | 564 | if (!td) |
643 | return -ENOMEM; | 565 | goto nomem; |
566 | *plink = cpu_to_le32(td->dma_handle); | ||
644 | 567 | ||
645 | /* | 568 | /* |
646 | * It's IN if the pipe is an output pipe or we're not expecting | 569 | * It's IN if the pipe is an output pipe or we're not expecting |
@@ -658,16 +581,21 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
658 | 581 | ||
659 | uhci_add_td_to_urb(urb, td); | 582 | uhci_add_td_to_urb(urb, td); |
660 | uhci_fill_td(td, status | TD_CTRL_IOC, | 583 | uhci_fill_td(td, status | TD_CTRL_IOC, |
661 | destination | uhci_explen(0), 0); | 584 | destination | uhci_explen(0), 0); |
662 | 585 | plink = &td->link; | |
663 | qh = uhci_alloc_qh(uhci); | ||
664 | if (!qh) | ||
665 | return -ENOMEM; | ||
666 | 586 | ||
667 | urbp->qh = qh; | 587 | /* |
668 | qh->urbp = urbp; | 588 | * Build the new dummy TD and activate the old one |
589 | */ | ||
590 | td = uhci_alloc_td(uhci); | ||
591 | if (!td) | ||
592 | goto nomem; | ||
593 | *plink = cpu_to_le32(td->dma_handle); | ||
669 | 594 | ||
670 | uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH); | 595 | uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0); |
596 | wmb(); | ||
597 | qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE); | ||
598 | qh->dummy_td = td; | ||
671 | 599 | ||
672 | /* Low-speed transfers get a different queue, and won't hog the bus. | 600 | /* Low-speed transfers get a different queue, and won't hog the bus. |
673 | * Also, some devices enumerate better without FSBR; the easiest way | 601 | * Also, some devices enumerate better without FSBR; the easiest way |
@@ -675,18 +603,17 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
675 | * isn't in the CONFIGURED state. */ | 603 | * isn't in the CONFIGURED state. */ |
676 | if (urb->dev->speed == USB_SPEED_LOW || | 604 | if (urb->dev->speed == USB_SPEED_LOW || |
677 | urb->dev->state != USB_STATE_CONFIGURED) | 605 | urb->dev->state != USB_STATE_CONFIGURED) |
678 | skelqh = uhci->skel_ls_control_qh; | 606 | qh->skel = uhci->skel_ls_control_qh; |
679 | else { | 607 | else { |
680 | skelqh = uhci->skel_fs_control_qh; | 608 | qh->skel = uhci->skel_fs_control_qh; |
681 | uhci_inc_fsbr(uhci, urb); | 609 | uhci_inc_fsbr(uhci, urb); |
682 | } | 610 | } |
611 | return 0; | ||
683 | 612 | ||
684 | if (eurb) | 613 | nomem: |
685 | uhci_append_queued_urb(uhci, eurb, urb); | 614 | /* Remove the dummy TD from the td_list so it doesn't get freed */ |
686 | else | 615 | uhci_remove_td_from_urb(qh->dummy_td); |
687 | uhci_insert_qh(uhci, skelqh, urb); | 616 | return -ENOMEM; |
688 | |||
689 | return -EINPROGRESS; | ||
690 | } | 617 | } |
691 | 618 | ||
692 | /* | 619 | /* |
@@ -703,7 +630,7 @@ static int usb_control_retrigger_status(struct uhci_hcd *uhci, struct urb *urb) | |||
703 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | 630 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; |
704 | struct uhci_td *td; | 631 | struct uhci_td *td; |
705 | 632 | ||
706 | urbp->short_control_packet = 1; | 633 | urbp->short_transfer = 1; |
707 | 634 | ||
708 | td = list_entry(urbp->td_list.prev, struct uhci_td, list); | 635 | td = list_entry(urbp->td_list.prev, struct uhci_td, list); |
709 | urbp->qh->element = cpu_to_le32(td->dma_handle); | 636 | urbp->qh->element = cpu_to_le32(td->dma_handle); |
@@ -720,16 +647,14 @@ static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb) | |||
720 | unsigned int status; | 647 | unsigned int status; |
721 | int ret = 0; | 648 | int ret = 0; |
722 | 649 | ||
723 | if (list_empty(&urbp->td_list)) | ||
724 | return -EINVAL; | ||
725 | |||
726 | head = &urbp->td_list; | 650 | head = &urbp->td_list; |
727 | 651 | if (urbp->short_transfer) { | |
728 | if (urbp->short_control_packet) { | ||
729 | tmp = head->prev; | 652 | tmp = head->prev; |
730 | goto status_stage; | 653 | goto status_stage; |
731 | } | 654 | } |
732 | 655 | ||
656 | urb->actual_length = 0; | ||
657 | |||
733 | tmp = head->next; | 658 | tmp = head->next; |
734 | td = list_entry(tmp, struct uhci_td, list); | 659 | td = list_entry(tmp, struct uhci_td, list); |
735 | 660 | ||
@@ -742,8 +667,6 @@ static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb) | |||
742 | if (status) | 667 | if (status) |
743 | goto td_error; | 668 | goto td_error; |
744 | 669 | ||
745 | urb->actual_length = 0; | ||
746 | |||
747 | /* The rest of the TDs (but the last) are data */ | 670 | /* The rest of the TDs (but the last) are data */ |
748 | tmp = tmp->next; | 671 | tmp = tmp->next; |
749 | while (tmp != head && tmp->next != head) { | 672 | while (tmp != head && tmp->next != head) { |
@@ -770,10 +693,7 @@ static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb) | |||
770 | goto err; | 693 | goto err; |
771 | } | 694 | } |
772 | 695 | ||
773 | if (uhci_packetid(td_token(td)) == USB_PID_IN) | 696 | return usb_control_retrigger_status(uhci, urb); |
774 | return usb_control_retrigger_status(uhci, urb); | ||
775 | else | ||
776 | return 0; | ||
777 | } | 697 | } |
778 | } | 698 | } |
779 | 699 | ||
@@ -814,34 +734,40 @@ err: | |||
814 | if (errbuf) { | 734 | if (errbuf) { |
815 | /* Print the chain for debugging purposes */ | 735 | /* Print the chain for debugging purposes */ |
816 | uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0); | 736 | uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0); |
817 | |||
818 | lprintk(errbuf); | 737 | lprintk(errbuf); |
819 | } | 738 | } |
820 | } | 739 | } |
821 | 740 | ||
741 | /* Note that the queue has stopped */ | ||
742 | urbp->qh->element = UHCI_PTR_TERM; | ||
743 | urbp->qh->is_stopped = 1; | ||
822 | return ret; | 744 | return ret; |
823 | } | 745 | } |
824 | 746 | ||
825 | /* | 747 | /* |
826 | * Common submit for bulk and interrupt | 748 | * Common submit for bulk and interrupt |
827 | */ | 749 | */ |
828 | static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb, struct uhci_qh *skelqh) | 750 | static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, |
751 | struct uhci_qh *qh) | ||
829 | { | 752 | { |
830 | struct uhci_td *td; | 753 | struct uhci_td *td; |
831 | struct uhci_qh *qh; | ||
832 | unsigned long destination, status; | 754 | unsigned long destination, status; |
833 | int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); | 755 | int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize); |
834 | int len = urb->transfer_buffer_length; | 756 | int len = urb->transfer_buffer_length; |
835 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | ||
836 | dma_addr_t data = urb->transfer_dma; | 757 | dma_addr_t data = urb->transfer_dma; |
758 | __le32 *plink; | ||
759 | unsigned int toggle; | ||
837 | 760 | ||
838 | if (len < 0) | 761 | if (len < 0) |
839 | return -EINVAL; | 762 | return -EINVAL; |
840 | 763 | ||
841 | /* The "pipe" thing contains the destination in bits 8--18 */ | 764 | /* The "pipe" thing contains the destination in bits 8--18 */ |
842 | destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); | 765 | destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); |
766 | toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), | ||
767 | usb_pipeout(urb->pipe)); | ||
843 | 768 | ||
844 | status = uhci_maxerr(3) | TD_CTRL_ACTIVE; | 769 | /* 3 errors, dummy TD remains inactive */ |
770 | status = uhci_maxerr(3); | ||
845 | if (urb->dev->speed == USB_SPEED_LOW) | 771 | if (urb->dev->speed == USB_SPEED_LOW) |
846 | status |= TD_CTRL_LS; | 772 | status |= TD_CTRL_LS; |
847 | if (usb_pipein(urb->pipe)) | 773 | if (usb_pipein(urb->pipe)) |
@@ -850,30 +776,34 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb | |||
850 | /* | 776 | /* |
851 | * Build the DATA TDs | 777 | * Build the DATA TDs |
852 | */ | 778 | */ |
779 | plink = NULL; | ||
780 | td = qh->dummy_td; | ||
853 | do { /* Allow zero length packets */ | 781 | do { /* Allow zero length packets */ |
854 | int pktsze = maxsze; | 782 | int pktsze = maxsze; |
855 | 783 | ||
856 | if (pktsze >= len) { | 784 | if (len <= pktsze) { /* The last packet */ |
857 | pktsze = len; | 785 | pktsze = len; |
858 | if (!(urb->transfer_flags & URB_SHORT_NOT_OK)) | 786 | if (!(urb->transfer_flags & URB_SHORT_NOT_OK)) |
859 | status &= ~TD_CTRL_SPD; | 787 | status &= ~TD_CTRL_SPD; |
860 | } | 788 | } |
861 | 789 | ||
862 | td = uhci_alloc_td(uhci); | 790 | if (plink) { |
863 | if (!td) | 791 | td = uhci_alloc_td(uhci); |
864 | return -ENOMEM; | 792 | if (!td) |
865 | 793 | goto nomem; | |
794 | *plink = cpu_to_le32(td->dma_handle); | ||
795 | } | ||
866 | uhci_add_td_to_urb(urb, td); | 796 | uhci_add_td_to_urb(urb, td); |
867 | uhci_fill_td(td, status, destination | uhci_explen(pktsze) | | 797 | uhci_fill_td(td, status, |
868 | (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), | 798 | destination | uhci_explen(pktsze) | |
869 | usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT), | 799 | (toggle << TD_TOKEN_TOGGLE_SHIFT), |
870 | data); | 800 | data); |
801 | plink = &td->link; | ||
802 | status |= TD_CTRL_ACTIVE; | ||
871 | 803 | ||
872 | data += pktsze; | 804 | data += pktsze; |
873 | len -= maxsze; | 805 | len -= maxsze; |
874 | 806 | toggle ^= 1; | |
875 | usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe), | ||
876 | usb_pipeout(urb->pipe)); | ||
877 | } while (len > 0); | 807 | } while (len > 0); |
878 | 808 | ||
879 | /* | 809 | /* |
@@ -883,20 +813,22 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb | |||
883 | * however, if transfer_length == 0, the zero packet was already | 813 | * however, if transfer_length == 0, the zero packet was already |
884 | * prepared above. | 814 | * prepared above. |
885 | */ | 815 | */ |
886 | if (usb_pipeout(urb->pipe) && (urb->transfer_flags & URB_ZERO_PACKET) && | 816 | if ((urb->transfer_flags & URB_ZERO_PACKET) && |
887 | !len && urb->transfer_buffer_length) { | 817 | usb_pipeout(urb->pipe) && len == 0 && |
818 | urb->transfer_buffer_length > 0) { | ||
888 | td = uhci_alloc_td(uhci); | 819 | td = uhci_alloc_td(uhci); |
889 | if (!td) | 820 | if (!td) |
890 | return -ENOMEM; | 821 | goto nomem; |
822 | *plink = cpu_to_le32(td->dma_handle); | ||
891 | 823 | ||
892 | uhci_add_td_to_urb(urb, td); | 824 | uhci_add_td_to_urb(urb, td); |
893 | uhci_fill_td(td, status, destination | uhci_explen(0) | | 825 | uhci_fill_td(td, status, |
894 | (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), | 826 | destination | uhci_explen(0) | |
895 | usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT), | 827 | (toggle << TD_TOKEN_TOGGLE_SHIFT), |
896 | data); | 828 | data); |
829 | plink = &td->link; | ||
897 | 830 | ||
898 | usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe), | 831 | toggle ^= 1; |
899 | usb_pipeout(urb->pipe)); | ||
900 | } | 832 | } |
901 | 833 | ||
902 | /* Set the interrupt-on-completion flag on the last packet. | 834 | /* Set the interrupt-on-completion flag on the last packet. |
@@ -905,24 +837,29 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb | |||
905 | * fast side but not enough to justify delaying an interrupt | 837 | * fast side but not enough to justify delaying an interrupt |
906 | * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT | 838 | * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT |
907 | * flag setting. */ | 839 | * flag setting. */ |
908 | td->status |= cpu_to_le32(TD_CTRL_IOC); | 840 | td->status |= __constant_cpu_to_le32(TD_CTRL_IOC); |
909 | 841 | ||
910 | qh = uhci_alloc_qh(uhci); | 842 | /* |
911 | if (!qh) | 843 | * Build the new dummy TD and activate the old one |
912 | return -ENOMEM; | 844 | */ |
913 | 845 | td = uhci_alloc_td(uhci); | |
914 | urbp->qh = qh; | 846 | if (!td) |
915 | qh->urbp = urbp; | 847 | goto nomem; |
848 | *plink = cpu_to_le32(td->dma_handle); | ||
916 | 849 | ||
917 | /* Always breadth first */ | 850 | uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0); |
918 | uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH); | 851 | wmb(); |
852 | qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE); | ||
853 | qh->dummy_td = td; | ||
919 | 854 | ||
920 | if (eurb) | 855 | usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), |
921 | uhci_append_queued_urb(uhci, eurb, urb); | 856 | usb_pipeout(urb->pipe), toggle); |
922 | else | 857 | return 0; |
923 | uhci_insert_qh(uhci, skelqh, urb); | ||
924 | 858 | ||
925 | return -EINPROGRESS; | 859 | nomem: |
860 | /* Remove the dummy TD from the td_list so it doesn't get freed */ | ||
861 | uhci_remove_td_from_urb(qh->dummy_td); | ||
862 | return -ENOMEM; | ||
926 | } | 863 | } |
927 | 864 | ||
928 | /* | 865 | /* |
@@ -954,8 +891,27 @@ static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb) | |||
954 | if (urb->transfer_flags & URB_SHORT_NOT_OK) { | 891 | if (urb->transfer_flags & URB_SHORT_NOT_OK) { |
955 | ret = -EREMOTEIO; | 892 | ret = -EREMOTEIO; |
956 | goto err; | 893 | goto err; |
957 | } else | 894 | } |
958 | return 0; | 895 | |
896 | /* | ||
897 | * This URB stopped short of its end. We have to | ||
898 | * fix up the toggles of the following URBs on the | ||
899 | * queue and restart the queue. | ||
900 | * | ||
901 | * Do this only the first time we encounter the | ||
902 | * short URB. | ||
903 | */ | ||
904 | if (!urbp->short_transfer) { | ||
905 | urbp->short_transfer = 1; | ||
906 | urbp->qh->initial_toggle = | ||
907 | uhci_toggle(td_token(td)) ^ 1; | ||
908 | uhci_fixup_toggles(urbp->qh, 1); | ||
909 | |||
910 | td = list_entry(urbp->td_list.prev, | ||
911 | struct uhci_td, list); | ||
912 | urbp->qh->element = td->link; | ||
913 | } | ||
914 | break; | ||
959 | } | 915 | } |
960 | } | 916 | } |
961 | 917 | ||
@@ -964,31 +920,30 @@ static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb) | |||
964 | td_error: | 920 | td_error: |
965 | ret = uhci_map_status(status, uhci_packetout(td_token(td))); | 921 | ret = uhci_map_status(status, uhci_packetout(td_token(td))); |
966 | 922 | ||
967 | err: | ||
968 | /* | ||
969 | * Enable this chunk of code if you want to see some more debugging. | ||
970 | * But be careful, it has the tendancy to starve out khubd and prevent | ||
971 | * disconnects from happening successfully if you have a slow debug | ||
972 | * log interface (like a serial console. | ||
973 | */ | ||
974 | #if 0 | ||
975 | if ((debug == 1 && ret != -EPIPE) || debug > 1) { | 923 | if ((debug == 1 && ret != -EPIPE) || debug > 1) { |
976 | /* Some debugging code */ | 924 | /* Some debugging code */ |
977 | dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n", | 925 | dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n", |
978 | __FUNCTION__, status); | 926 | __FUNCTION__, status); |
979 | 927 | ||
980 | if (errbuf) { | 928 | if (debug > 1 && errbuf) { |
981 | /* Print the chain for debugging purposes */ | 929 | /* Print the chain for debugging purposes */ |
982 | uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0); | 930 | uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0); |
983 | |||
984 | lprintk(errbuf); | 931 | lprintk(errbuf); |
985 | } | 932 | } |
986 | } | 933 | } |
987 | #endif | 934 | err: |
935 | |||
936 | /* Note that the queue has stopped and save the next toggle value */ | ||
937 | urbp->qh->element = UHCI_PTR_TERM; | ||
938 | urbp->qh->is_stopped = 1; | ||
939 | urbp->qh->needs_fixup = 1; | ||
940 | urbp->qh->initial_toggle = uhci_toggle(td_token(td)) ^ | ||
941 | (ret == -EREMOTEIO); | ||
988 | return ret; | 942 | return ret; |
989 | } | 943 | } |
990 | 944 | ||
991 | static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb) | 945 | static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, |
946 | struct uhci_qh *qh) | ||
992 | { | 947 | { |
993 | int ret; | 948 | int ret; |
994 | 949 | ||
@@ -996,95 +951,60 @@ static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, struc | |||
996 | if (urb->dev->speed == USB_SPEED_LOW) | 951 | if (urb->dev->speed == USB_SPEED_LOW) |
997 | return -EINVAL; | 952 | return -EINVAL; |
998 | 953 | ||
999 | ret = uhci_submit_common(uhci, urb, eurb, uhci->skel_bulk_qh); | 954 | qh->skel = uhci->skel_bulk_qh; |
1000 | if (ret == -EINPROGRESS) | 955 | ret = uhci_submit_common(uhci, urb, qh); |
956 | if (ret == 0) | ||
1001 | uhci_inc_fsbr(uhci, urb); | 957 | uhci_inc_fsbr(uhci, urb); |
1002 | |||
1003 | return ret; | 958 | return ret; |
1004 | } | 959 | } |
1005 | 960 | ||
1006 | static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb) | 961 | static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, |
962 | struct uhci_qh *qh) | ||
1007 | { | 963 | { |
1008 | /* USB 1.1 interrupt transfers only involve one packet per interval; | 964 | /* USB 1.1 interrupt transfers only involve one packet per interval. |
1009 | * that's the uhci_submit_common() "breadth first" policy. Drivers | 965 | * Drivers can submit URBs of any length, but longer ones will need |
1010 | * can submit urbs of any length, but longer ones might need many | 966 | * multiple intervals to complete. |
1011 | * intervals to complete. | ||
1012 | */ | 967 | */ |
1013 | return uhci_submit_common(uhci, urb, eurb, uhci->skelqh[__interval_to_skel(urb->interval)]); | 968 | qh->skel = uhci->skelqh[__interval_to_skel(urb->interval)]; |
969 | return uhci_submit_common(uhci, urb, qh); | ||
1014 | } | 970 | } |
1015 | 971 | ||
1016 | /* | 972 | /* |
1017 | * Isochronous transfers | 973 | * Isochronous transfers |
1018 | */ | 974 | */ |
1019 | static int isochronous_find_limits(struct uhci_hcd *uhci, struct urb *urb, unsigned int *start, unsigned int *end) | 975 | static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb, |
1020 | { | 976 | struct uhci_qh *qh) |
1021 | struct urb *last_urb = NULL; | ||
1022 | struct urb_priv *up; | ||
1023 | int ret = 0; | ||
1024 | |||
1025 | list_for_each_entry(up, &uhci->urb_list, urb_list) { | ||
1026 | struct urb *u = up->urb; | ||
1027 | |||
1028 | /* look for pending URBs with identical pipe handle */ | ||
1029 | if ((urb->pipe == u->pipe) && (urb->dev == u->dev) && | ||
1030 | (u->status == -EINPROGRESS) && (u != urb)) { | ||
1031 | if (!last_urb) | ||
1032 | *start = u->start_frame; | ||
1033 | last_urb = u; | ||
1034 | } | ||
1035 | } | ||
1036 | |||
1037 | if (last_urb) { | ||
1038 | *end = (last_urb->start_frame + last_urb->number_of_packets * | ||
1039 | last_urb->interval) & (UHCI_NUMFRAMES-1); | ||
1040 | ret = 0; | ||
1041 | } else | ||
1042 | ret = -1; /* no previous urb found */ | ||
1043 | |||
1044 | return ret; | ||
1045 | } | ||
1046 | |||
1047 | static int isochronous_find_start(struct uhci_hcd *uhci, struct urb *urb) | ||
1048 | { | 977 | { |
1049 | int limits; | 978 | struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */ |
1050 | unsigned int start = 0, end = 0; | 979 | int i, frame; |
980 | unsigned long destination, status; | ||
981 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; | ||
1051 | 982 | ||
1052 | if (urb->number_of_packets > 900) /* 900? Why? */ | 983 | if (urb->number_of_packets > 900) /* 900? Why? */ |
1053 | return -EFBIG; | 984 | return -EFBIG; |
1054 | 985 | ||
1055 | limits = isochronous_find_limits(uhci, urb, &start, &end); | 986 | status = TD_CTRL_ACTIVE | TD_CTRL_IOS; |
987 | destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); | ||
1056 | 988 | ||
989 | /* Figure out the starting frame number */ | ||
1057 | if (urb->transfer_flags & URB_ISO_ASAP) { | 990 | if (urb->transfer_flags & URB_ISO_ASAP) { |
1058 | if (limits) { | 991 | if (list_empty(&qh->queue)) { |
1059 | uhci_get_current_frame_number(uhci); | 992 | uhci_get_current_frame_number(uhci); |
1060 | urb->start_frame = (uhci->frame_number + 10) | 993 | urb->start_frame = (uhci->frame_number + 10); |
1061 | & (UHCI_NUMFRAMES - 1); | 994 | |
1062 | } else | 995 | } else { /* Go right after the last one */ |
1063 | urb->start_frame = end; | 996 | struct urb *last_urb; |
997 | |||
998 | last_urb = list_entry(qh->queue.prev, | ||
999 | struct urb_priv, node)->urb; | ||
1000 | urb->start_frame = (last_urb->start_frame + | ||
1001 | last_urb->number_of_packets * | ||
1002 | last_urb->interval); | ||
1003 | } | ||
1064 | } else { | 1004 | } else { |
1065 | urb->start_frame &= (UHCI_NUMFRAMES - 1); | ||
1066 | /* FIXME: Sanity check */ | 1005 | /* FIXME: Sanity check */ |
1067 | } | 1006 | } |
1068 | 1007 | urb->start_frame &= (UHCI_NUMFRAMES - 1); | |
1069 | return 0; | ||
1070 | } | ||
1071 | |||
1072 | /* | ||
1073 | * Isochronous transfers | ||
1074 | */ | ||
1075 | static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb) | ||
1076 | { | ||
1077 | struct uhci_td *td; | ||
1078 | int i, ret, frame; | ||
1079 | int status, destination; | ||
1080 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; | ||
1081 | |||
1082 | status = TD_CTRL_ACTIVE | TD_CTRL_IOS; | ||
1083 | destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); | ||
1084 | |||
1085 | ret = isochronous_find_start(uhci, urb); | ||
1086 | if (ret) | ||
1087 | return ret; | ||
1088 | 1008 | ||
1089 | for (i = 0; i < urb->number_of_packets; i++) { | 1009 | for (i = 0; i < urb->number_of_packets; i++) { |
1090 | td = uhci_alloc_td(uhci); | 1010 | td = uhci_alloc_td(uhci); |
@@ -1092,20 +1012,25 @@ static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb) | |||
1092 | return -ENOMEM; | 1012 | return -ENOMEM; |
1093 | 1013 | ||
1094 | uhci_add_td_to_urb(urb, td); | 1014 | uhci_add_td_to_urb(urb, td); |
1095 | uhci_fill_td(td, status, destination | uhci_explen(urb->iso_frame_desc[i].length), | 1015 | uhci_fill_td(td, status, destination | |
1096 | urb->transfer_dma + urb->iso_frame_desc[i].offset); | 1016 | uhci_explen(urb->iso_frame_desc[i].length), |
1097 | 1017 | urb->transfer_dma + | |
1098 | if (i + 1 >= urb->number_of_packets) | 1018 | urb->iso_frame_desc[i].offset); |
1099 | td->status |= cpu_to_le32(TD_CTRL_IOC); | ||
1100 | } | 1019 | } |
1101 | 1020 | ||
1021 | /* Set the interrupt-on-completion flag on the last packet. */ | ||
1022 | td->status |= __constant_cpu_to_le32(TD_CTRL_IOC); | ||
1023 | |||
1024 | qh->skel = uhci->skel_iso_qh; | ||
1025 | |||
1026 | /* Add the TDs to the frame list */ | ||
1102 | frame = urb->start_frame; | 1027 | frame = urb->start_frame; |
1103 | list_for_each_entry(td, &urbp->td_list, list) { | 1028 | list_for_each_entry(td, &urbp->td_list, list) { |
1104 | uhci_insert_td_frame_list(uhci, td, frame); | 1029 | uhci_insert_td_in_frame_list(uhci, td, frame); |
1105 | frame += urb->interval; | 1030 | frame += urb->interval; |
1106 | } | 1031 | } |
1107 | 1032 | ||
1108 | return -EINPROGRESS; | 1033 | return 0; |
1109 | } | 1034 | } |
1110 | 1035 | ||
1111 | static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb) | 1036 | static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb) |
@@ -1139,80 +1064,67 @@ static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb) | |||
1139 | 1064 | ||
1140 | i++; | 1065 | i++; |
1141 | } | 1066 | } |
1142 | unlink_isochronous_tds(uhci, urb); | ||
1143 | 1067 | ||
1144 | return ret; | 1068 | return ret; |
1145 | } | 1069 | } |
1146 | 1070 | ||
1147 | static struct urb *uhci_find_urb_ep(struct uhci_hcd *uhci, struct urb *urb) | ||
1148 | { | ||
1149 | struct urb_priv *up; | ||
1150 | |||
1151 | /* We don't match Isoc transfers since they are special */ | ||
1152 | if (usb_pipeisoc(urb->pipe)) | ||
1153 | return NULL; | ||
1154 | |||
1155 | list_for_each_entry(up, &uhci->urb_list, urb_list) { | ||
1156 | struct urb *u = up->urb; | ||
1157 | |||
1158 | if (u->dev == urb->dev && u->status == -EINPROGRESS) { | ||
1159 | /* For control, ignore the direction */ | ||
1160 | if (usb_pipecontrol(urb->pipe) && | ||
1161 | (u->pipe & ~USB_DIR_IN) == (urb->pipe & ~USB_DIR_IN)) | ||
1162 | return u; | ||
1163 | else if (u->pipe == urb->pipe) | ||
1164 | return u; | ||
1165 | } | ||
1166 | } | ||
1167 | |||
1168 | return NULL; | ||
1169 | } | ||
1170 | |||
1171 | static int uhci_urb_enqueue(struct usb_hcd *hcd, | 1071 | static int uhci_urb_enqueue(struct usb_hcd *hcd, |
1172 | struct usb_host_endpoint *ep, | 1072 | struct usb_host_endpoint *hep, |
1173 | struct urb *urb, gfp_t mem_flags) | 1073 | struct urb *urb, gfp_t mem_flags) |
1174 | { | 1074 | { |
1175 | int ret; | 1075 | int ret; |
1176 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 1076 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
1177 | unsigned long flags; | 1077 | unsigned long flags; |
1178 | struct urb *eurb; | 1078 | struct urb_priv *urbp; |
1079 | struct uhci_qh *qh; | ||
1179 | int bustime; | 1080 | int bustime; |
1180 | 1081 | ||
1181 | spin_lock_irqsave(&uhci->lock, flags); | 1082 | spin_lock_irqsave(&uhci->lock, flags); |
1182 | 1083 | ||
1183 | ret = urb->status; | 1084 | ret = urb->status; |
1184 | if (ret != -EINPROGRESS) /* URB already unlinked! */ | 1085 | if (ret != -EINPROGRESS) /* URB already unlinked! */ |
1185 | goto out; | 1086 | goto done; |
1186 | 1087 | ||
1187 | eurb = uhci_find_urb_ep(uhci, urb); | 1088 | ret = -ENOMEM; |
1089 | urbp = uhci_alloc_urb_priv(uhci, urb); | ||
1090 | if (!urbp) | ||
1091 | goto done; | ||
1188 | 1092 | ||
1189 | if (!uhci_alloc_urb_priv(uhci, urb)) { | 1093 | if (hep->hcpriv) |
1190 | ret = -ENOMEM; | 1094 | qh = (struct uhci_qh *) hep->hcpriv; |
1191 | goto out; | 1095 | else { |
1096 | qh = uhci_alloc_qh(uhci, urb->dev, hep); | ||
1097 | if (!qh) | ||
1098 | goto err_no_qh; | ||
1192 | } | 1099 | } |
1100 | urbp->qh = qh; | ||
1193 | 1101 | ||
1194 | switch (usb_pipetype(urb->pipe)) { | 1102 | switch (usb_pipetype(urb->pipe)) { |
1195 | case PIPE_CONTROL: | 1103 | case PIPE_CONTROL: |
1196 | ret = uhci_submit_control(uhci, urb, eurb); | 1104 | ret = uhci_submit_control(uhci, urb, qh); |
1105 | break; | ||
1106 | case PIPE_BULK: | ||
1107 | ret = uhci_submit_bulk(uhci, urb, qh); | ||
1197 | break; | 1108 | break; |
1198 | case PIPE_INTERRUPT: | 1109 | case PIPE_INTERRUPT: |
1199 | if (!eurb) { | 1110 | if (list_empty(&qh->queue)) { |
1200 | bustime = usb_check_bandwidth(urb->dev, urb); | 1111 | bustime = usb_check_bandwidth(urb->dev, urb); |
1201 | if (bustime < 0) | 1112 | if (bustime < 0) |
1202 | ret = bustime; | 1113 | ret = bustime; |
1203 | else { | 1114 | else { |
1204 | ret = uhci_submit_interrupt(uhci, urb, eurb); | 1115 | ret = uhci_submit_interrupt(uhci, urb, qh); |
1205 | if (ret == -EINPROGRESS) | 1116 | if (ret == 0) |
1206 | usb_claim_bandwidth(urb->dev, urb, bustime, 0); | 1117 | usb_claim_bandwidth(urb->dev, urb, bustime, 0); |
1207 | } | 1118 | } |
1208 | } else { /* inherit from parent */ | 1119 | } else { /* inherit from parent */ |
1209 | urb->bandwidth = eurb->bandwidth; | 1120 | struct urb_priv *eurbp; |
1210 | ret = uhci_submit_interrupt(uhci, urb, eurb); | 1121 | |
1122 | eurbp = list_entry(qh->queue.prev, struct urb_priv, | ||
1123 | node); | ||
1124 | urb->bandwidth = eurbp->urb->bandwidth; | ||
1125 | ret = uhci_submit_interrupt(uhci, urb, qh); | ||
1211 | } | 1126 | } |
1212 | break; | 1127 | break; |
1213 | case PIPE_BULK: | ||
1214 | ret = uhci_submit_bulk(uhci, urb, eurb); | ||
1215 | break; | ||
1216 | case PIPE_ISOCHRONOUS: | 1128 | case PIPE_ISOCHRONOUS: |
1217 | bustime = usb_check_bandwidth(urb->dev, urb); | 1129 | bustime = usb_check_bandwidth(urb->dev, urb); |
1218 | if (bustime < 0) { | 1130 | if (bustime < 0) { |
@@ -1220,221 +1132,208 @@ static int uhci_urb_enqueue(struct usb_hcd *hcd, | |||
1220 | break; | 1132 | break; |
1221 | } | 1133 | } |
1222 | 1134 | ||
1223 | ret = uhci_submit_isochronous(uhci, urb); | 1135 | ret = uhci_submit_isochronous(uhci, urb, qh); |
1224 | if (ret == -EINPROGRESS) | 1136 | if (ret == 0) |
1225 | usb_claim_bandwidth(urb->dev, urb, bustime, 1); | 1137 | usb_claim_bandwidth(urb->dev, urb, bustime, 1); |
1226 | break; | 1138 | break; |
1227 | } | 1139 | } |
1140 | if (ret != 0) | ||
1141 | goto err_submit_failed; | ||
1142 | |||
1143 | /* Add this URB to the QH */ | ||
1144 | urbp->qh = qh; | ||
1145 | list_add_tail(&urbp->node, &qh->queue); | ||
1228 | 1146 | ||
1229 | if (ret != -EINPROGRESS) { | 1147 | /* If the new URB is the first and only one on this QH then either |
1230 | /* Submit failed, so delete it from the urb_list */ | 1148 | * the QH is new and idle or else it's unlinked and waiting to |
1231 | struct urb_priv *urbp = urb->hcpriv; | 1149 | * become idle, so we can activate it right away. */ |
1150 | if (qh->queue.next == &urbp->node) | ||
1151 | uhci_activate_qh(uhci, qh); | ||
1152 | goto done; | ||
1232 | 1153 | ||
1233 | list_del_init(&urbp->urb_list); | 1154 | err_submit_failed: |
1234 | uhci_destroy_urb_priv(uhci, urb); | 1155 | if (qh->state == QH_STATE_IDLE) |
1235 | } else | 1156 | uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */ |
1236 | ret = 0; | ||
1237 | 1157 | ||
1238 | out: | 1158 | err_no_qh: |
1159 | uhci_free_urb_priv(uhci, urbp); | ||
1160 | |||
1161 | done: | ||
1239 | spin_unlock_irqrestore(&uhci->lock, flags); | 1162 | spin_unlock_irqrestore(&uhci->lock, flags); |
1240 | return ret; | 1163 | return ret; |
1241 | } | 1164 | } |
1242 | 1165 | ||
1243 | /* | 1166 | static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) |
1244 | * Return the result of a transfer | ||
1245 | */ | ||
1246 | static void uhci_transfer_result(struct uhci_hcd *uhci, struct urb *urb) | ||
1247 | { | 1167 | { |
1248 | int ret = -EINPROGRESS; | 1168 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
1169 | unsigned long flags; | ||
1249 | struct urb_priv *urbp; | 1170 | struct urb_priv *urbp; |
1250 | 1171 | ||
1251 | spin_lock(&urb->lock); | 1172 | spin_lock_irqsave(&uhci->lock, flags); |
1173 | urbp = urb->hcpriv; | ||
1174 | if (!urbp) /* URB was never linked! */ | ||
1175 | goto done; | ||
1176 | |||
1177 | /* Remove Isochronous TDs from the frame list ASAP */ | ||
1178 | if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) | ||
1179 | uhci_unlink_isochronous_tds(uhci, urb); | ||
1180 | uhci_unlink_qh(uhci, urbp->qh); | ||
1181 | |||
1182 | done: | ||
1183 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
1184 | return 0; | ||
1185 | } | ||
1252 | 1186 | ||
1253 | urbp = (struct urb_priv *)urb->hcpriv; | 1187 | /* |
1188 | * Finish unlinking an URB and give it back | ||
1189 | */ | ||
1190 | static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh, | ||
1191 | struct urb *urb, struct pt_regs *regs) | ||
1192 | __releases(uhci->lock) | ||
1193 | __acquires(uhci->lock) | ||
1194 | { | ||
1195 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; | ||
1254 | 1196 | ||
1255 | if (urb->status != -EINPROGRESS) /* URB already dequeued */ | 1197 | /* Isochronous TDs get unlinked directly from the frame list */ |
1256 | goto out; | 1198 | if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) |
1199 | uhci_unlink_isochronous_tds(uhci, urb); | ||
1200 | |||
1201 | /* If the URB isn't first on its queue, adjust the link pointer | ||
1202 | * of the last TD in the previous URB. */ | ||
1203 | else if (qh->queue.next != &urbp->node) { | ||
1204 | struct urb_priv *purbp; | ||
1205 | struct uhci_td *ptd, *ltd; | ||
1206 | |||
1207 | purbp = list_entry(urbp->node.prev, struct urb_priv, node); | ||
1208 | ptd = list_entry(purbp->td_list.prev, struct uhci_td, | ||
1209 | list); | ||
1210 | ltd = list_entry(urbp->td_list.prev, struct uhci_td, | ||
1211 | list); | ||
1212 | ptd->link = ltd->link; | ||
1213 | } | ||
1257 | 1214 | ||
1258 | switch (usb_pipetype(urb->pipe)) { | 1215 | /* Take the URB off the QH's queue. If the queue is now empty, |
1259 | case PIPE_CONTROL: | 1216 | * this is a perfect time for a toggle fixup. */ |
1260 | ret = uhci_result_control(uhci, urb); | 1217 | list_del_init(&urbp->node); |
1261 | break; | 1218 | if (list_empty(&qh->queue) && qh->needs_fixup) { |
1262 | case PIPE_BULK: | 1219 | usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), |
1263 | case PIPE_INTERRUPT: | 1220 | usb_pipeout(urb->pipe), qh->initial_toggle); |
1264 | ret = uhci_result_common(uhci, urb); | 1221 | qh->needs_fixup = 0; |
1265 | break; | ||
1266 | case PIPE_ISOCHRONOUS: | ||
1267 | ret = uhci_result_isochronous(uhci, urb); | ||
1268 | break; | ||
1269 | } | 1222 | } |
1270 | 1223 | ||
1271 | if (ret == -EINPROGRESS) | 1224 | uhci_dec_fsbr(uhci, urb); /* Safe since it checks */ |
1272 | goto out; | 1225 | uhci_free_urb_priv(uhci, urbp); |
1273 | urb->status = ret; | ||
1274 | 1226 | ||
1275 | switch (usb_pipetype(urb->pipe)) { | 1227 | switch (usb_pipetype(urb->pipe)) { |
1276 | case PIPE_CONTROL: | ||
1277 | case PIPE_BULK: | ||
1278 | case PIPE_ISOCHRONOUS: | 1228 | case PIPE_ISOCHRONOUS: |
1279 | /* Release bandwidth for Interrupt or Isoc. transfers */ | 1229 | /* Release bandwidth for Interrupt or Isoc. transfers */ |
1280 | if (urb->bandwidth) | 1230 | if (urb->bandwidth) |
1281 | usb_release_bandwidth(urb->dev, urb, 1); | 1231 | usb_release_bandwidth(urb->dev, urb, 1); |
1282 | uhci_unlink_generic(uhci, urb); | ||
1283 | break; | 1232 | break; |
1284 | case PIPE_INTERRUPT: | 1233 | case PIPE_INTERRUPT: |
1285 | /* Release bandwidth for Interrupt or Isoc. transfers */ | 1234 | /* Release bandwidth for Interrupt or Isoc. transfers */ |
1286 | /* Make sure we don't release if we have a queued URB */ | 1235 | /* Make sure we don't release if we have a queued URB */ |
1287 | if (list_empty(&urbp->queue_list) && urb->bandwidth) | 1236 | if (list_empty(&qh->queue) && urb->bandwidth) |
1288 | usb_release_bandwidth(urb->dev, urb, 0); | 1237 | usb_release_bandwidth(urb->dev, urb, 0); |
1289 | else | 1238 | else |
1290 | /* bandwidth was passed on to queued URB, */ | 1239 | /* bandwidth was passed on to queued URB, */ |
1291 | /* so don't let usb_unlink_urb() release it */ | 1240 | /* so don't let usb_unlink_urb() release it */ |
1292 | urb->bandwidth = 0; | 1241 | urb->bandwidth = 0; |
1293 | uhci_unlink_generic(uhci, urb); | ||
1294 | break; | 1242 | break; |
1295 | default: | ||
1296 | dev_info(uhci_dev(uhci), "%s: unknown pipe type %d " | ||
1297 | "for urb %p\n", | ||
1298 | __FUNCTION__, usb_pipetype(urb->pipe), urb); | ||
1299 | } | 1243 | } |
1300 | 1244 | ||
1301 | /* Move it from uhci->urb_list to uhci->complete_list */ | 1245 | spin_unlock(&uhci->lock); |
1302 | uhci_moveto_complete(uhci, urbp); | 1246 | usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb, regs); |
1303 | 1247 | spin_lock(&uhci->lock); | |
1304 | out: | ||
1305 | spin_unlock(&urb->lock); | ||
1306 | } | ||
1307 | |||
1308 | static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb) | ||
1309 | { | ||
1310 | struct list_head *head; | ||
1311 | struct uhci_td *td; | ||
1312 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | ||
1313 | int prevactive = 0; | ||
1314 | |||
1315 | uhci_dec_fsbr(uhci, urb); /* Safe since it checks */ | ||
1316 | 1248 | ||
1317 | /* | 1249 | /* If the queue is now empty, we can unlink the QH and give up its |
1318 | * Now we need to find out what the last successful toggle was | 1250 | * reserved bandwidth. */ |
1319 | * so we can update the local data toggle for the next transfer | 1251 | if (list_empty(&qh->queue)) { |
1320 | * | 1252 | uhci_unlink_qh(uhci, qh); |
1321 | * There are 2 ways the last successful completed TD is found: | ||
1322 | * | ||
1323 | * 1) The TD is NOT active and the actual length < expected length | ||
1324 | * 2) The TD is NOT active and it's the last TD in the chain | ||
1325 | * | ||
1326 | * and a third way the first uncompleted TD is found: | ||
1327 | * | ||
1328 | * 3) The TD is active and the previous TD is NOT active | ||
1329 | * | ||
1330 | * Control and Isochronous ignore the toggle, so this is safe | ||
1331 | * for all types | ||
1332 | * | ||
1333 | * FIXME: The toggle fixups won't be 100% reliable until we | ||
1334 | * change over to using a single queue for each endpoint and | ||
1335 | * stop the queue before unlinking. | ||
1336 | */ | ||
1337 | head = &urbp->td_list; | ||
1338 | list_for_each_entry(td, head, list) { | ||
1339 | unsigned int ctrlstat = td_status(td); | ||
1340 | 1253 | ||
1341 | if (!(ctrlstat & TD_CTRL_ACTIVE) && | 1254 | /* Bandwidth stuff not yet implemented */ |
1342 | (uhci_actual_length(ctrlstat) < | ||
1343 | uhci_expected_length(td_token(td)) || | ||
1344 | td->list.next == head)) | ||
1345 | usb_settoggle(urb->dev, uhci_endpoint(td_token(td)), | ||
1346 | uhci_packetout(td_token(td)), | ||
1347 | uhci_toggle(td_token(td)) ^ 1); | ||
1348 | else if ((ctrlstat & TD_CTRL_ACTIVE) && !prevactive) | ||
1349 | usb_settoggle(urb->dev, uhci_endpoint(td_token(td)), | ||
1350 | uhci_packetout(td_token(td)), | ||
1351 | uhci_toggle(td_token(td))); | ||
1352 | |||
1353 | prevactive = ctrlstat & TD_CTRL_ACTIVE; | ||
1354 | } | 1255 | } |
1355 | |||
1356 | uhci_delete_queued_urb(uhci, urb); | ||
1357 | |||
1358 | /* The interrupt loop will reclaim the QHs */ | ||
1359 | uhci_remove_qh(uhci, urbp->qh); | ||
1360 | urbp->qh = NULL; | ||
1361 | } | 1256 | } |
1362 | 1257 | ||
1363 | static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) | 1258 | /* |
1259 | * Scan the URBs in a QH's queue | ||
1260 | */ | ||
1261 | #define QH_FINISHED_UNLINKING(qh) \ | ||
1262 | (qh->state == QH_STATE_UNLINKING && \ | ||
1263 | uhci->frame_number + uhci->is_stopped != qh->unlink_frame) | ||
1264 | |||
1265 | static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh, | ||
1266 | struct pt_regs *regs) | ||
1364 | { | 1267 | { |
1365 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | ||
1366 | unsigned long flags; | ||
1367 | struct urb_priv *urbp; | 1268 | struct urb_priv *urbp; |
1269 | struct urb *urb; | ||
1270 | int status; | ||
1368 | 1271 | ||
1369 | spin_lock_irqsave(&uhci->lock, flags); | 1272 | while (!list_empty(&qh->queue)) { |
1370 | urbp = urb->hcpriv; | 1273 | urbp = list_entry(qh->queue.next, struct urb_priv, node); |
1371 | if (!urbp) /* URB was never linked! */ | 1274 | urb = urbp->urb; |
1372 | goto done; | ||
1373 | list_del_init(&urbp->urb_list); | ||
1374 | |||
1375 | if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) | ||
1376 | unlink_isochronous_tds(uhci, urb); | ||
1377 | uhci_unlink_generic(uhci, urb); | ||
1378 | |||
1379 | uhci_get_current_frame_number(uhci); | ||
1380 | if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age) { | ||
1381 | uhci_remove_pending_urbps(uhci); | ||
1382 | uhci->urb_remove_age = uhci->frame_number; | ||
1383 | } | ||
1384 | |||
1385 | /* If we're the first, set the next interrupt bit */ | ||
1386 | if (list_empty(&uhci->urb_remove_list)) | ||
1387 | uhci_set_next_interrupt(uhci); | ||
1388 | list_add_tail(&urbp->urb_list, &uhci->urb_remove_list); | ||
1389 | |||
1390 | done: | ||
1391 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
1392 | return 0; | ||
1393 | } | ||
1394 | 1275 | ||
1395 | static int uhci_fsbr_timeout(struct uhci_hcd *uhci, struct urb *urb) | 1276 | switch (usb_pipetype(urb->pipe)) { |
1396 | { | 1277 | case PIPE_CONTROL: |
1397 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | 1278 | status = uhci_result_control(uhci, urb); |
1398 | struct list_head *head; | 1279 | break; |
1399 | struct uhci_td *td; | 1280 | case PIPE_ISOCHRONOUS: |
1400 | int count = 0; | 1281 | status = uhci_result_isochronous(uhci, urb); |
1401 | 1282 | break; | |
1402 | uhci_dec_fsbr(uhci, urb); | 1283 | default: /* PIPE_BULK or PIPE_INTERRUPT */ |
1284 | status = uhci_result_common(uhci, urb); | ||
1285 | break; | ||
1286 | } | ||
1287 | if (status == -EINPROGRESS) | ||
1288 | break; | ||
1403 | 1289 | ||
1404 | urbp->fsbr_timeout = 1; | 1290 | spin_lock(&urb->lock); |
1291 | if (urb->status == -EINPROGRESS) /* Not dequeued */ | ||
1292 | urb->status = status; | ||
1293 | else | ||
1294 | status = -ECONNRESET; | ||
1295 | spin_unlock(&urb->lock); | ||
1405 | 1296 | ||
1406 | /* | 1297 | /* Dequeued but completed URBs can't be given back unless |
1407 | * Ideally we would want to fix qh->element as well, but it's | 1298 | * the QH is stopped or has finished unlinking. */ |
1408 | * read/write by the HC, so that can introduce a race. It's not | 1299 | if (status == -ECONNRESET && |
1409 | * really worth the hassle | 1300 | !(qh->is_stopped || QH_FINISHED_UNLINKING(qh))) |
1410 | */ | 1301 | return; |
1411 | 1302 | ||
1412 | head = &urbp->td_list; | 1303 | uhci_giveback_urb(uhci, qh, urb, regs); |
1413 | list_for_each_entry(td, head, list) { | 1304 | if (qh->is_stopped) |
1414 | /* | 1305 | break; |
1415 | * Make sure we don't do the last one (since it'll have the | ||
1416 | * TERM bit set) as well as we skip every so many TDs to | ||
1417 | * make sure it doesn't hog the bandwidth | ||
1418 | */ | ||
1419 | if (td->list.next != head && (count % DEPTH_INTERVAL) == | ||
1420 | (DEPTH_INTERVAL - 1)) | ||
1421 | td->link |= UHCI_PTR_DEPTH; | ||
1422 | |||
1423 | count++; | ||
1424 | } | 1306 | } |
1425 | 1307 | ||
1426 | return 0; | 1308 | /* If the QH is neither stopped nor finished unlinking (normal case), |
1427 | } | 1309 | * our work here is done. */ |
1428 | 1310 | restart: | |
1429 | static void uhci_free_pending_qhs(struct uhci_hcd *uhci) | 1311 | if (!(qh->is_stopped || QH_FINISHED_UNLINKING(qh))) |
1430 | { | 1312 | return; |
1431 | struct uhci_qh *qh, *tmp; | ||
1432 | |||
1433 | list_for_each_entry_safe(qh, tmp, &uhci->qh_remove_list, remove_list) { | ||
1434 | list_del_init(&qh->remove_list); | ||
1435 | 1313 | ||
1436 | uhci_free_qh(uhci, qh); | 1314 | /* Otherwise give back each of the dequeued URBs */ |
1315 | list_for_each_entry(urbp, &qh->queue, node) { | ||
1316 | urb = urbp->urb; | ||
1317 | if (urb->status != -EINPROGRESS) { | ||
1318 | uhci_save_toggle(qh, urb); | ||
1319 | uhci_giveback_urb(uhci, qh, urb, regs); | ||
1320 | goto restart; | ||
1321 | } | ||
1322 | } | ||
1323 | qh->is_stopped = 0; | ||
1324 | |||
1325 | /* There are no more dequeued URBs. If there are still URBs on the | ||
1326 | * queue, the QH can now be re-activated. */ | ||
1327 | if (!list_empty(&qh->queue)) { | ||
1328 | if (qh->needs_fixup) | ||
1329 | uhci_fixup_toggles(qh, 0); | ||
1330 | uhci_activate_qh(uhci, qh); | ||
1437 | } | 1331 | } |
1332 | |||
1333 | /* The queue is empty. The QH can become idle if it is fully | ||
1334 | * unlinked. */ | ||
1335 | else if (QH_FINISHED_UNLINKING(qh)) | ||
1336 | uhci_make_qh_idle(uhci, qh); | ||
1438 | } | 1337 | } |
1439 | 1338 | ||
1440 | static void uhci_free_pending_tds(struct uhci_hcd *uhci) | 1339 | static void uhci_free_pending_tds(struct uhci_hcd *uhci) |
@@ -1448,43 +1347,13 @@ static void uhci_free_pending_tds(struct uhci_hcd *uhci) | |||
1448 | } | 1347 | } |
1449 | } | 1348 | } |
1450 | 1349 | ||
1451 | static void | 1350 | /* |
1452 | uhci_finish_urb(struct usb_hcd *hcd, struct urb *urb, struct pt_regs *regs) | 1351 | * Process events in the schedule, but only in one thread at a time |
1453 | __releases(uhci->lock) | 1352 | */ |
1454 | __acquires(uhci->lock) | ||
1455 | { | ||
1456 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | ||
1457 | |||
1458 | uhci_destroy_urb_priv(uhci, urb); | ||
1459 | |||
1460 | spin_unlock(&uhci->lock); | ||
1461 | usb_hcd_giveback_urb(hcd, urb, regs); | ||
1462 | spin_lock(&uhci->lock); | ||
1463 | } | ||
1464 | |||
1465 | static void uhci_finish_completion(struct uhci_hcd *uhci, struct pt_regs *regs) | ||
1466 | { | ||
1467 | struct urb_priv *urbp, *tmp; | ||
1468 | |||
1469 | list_for_each_entry_safe(urbp, tmp, &uhci->complete_list, urb_list) { | ||
1470 | struct urb *urb = urbp->urb; | ||
1471 | |||
1472 | list_del_init(&urbp->urb_list); | ||
1473 | uhci_finish_urb(uhci_to_hcd(uhci), urb, regs); | ||
1474 | } | ||
1475 | } | ||
1476 | |||
1477 | static void uhci_remove_pending_urbps(struct uhci_hcd *uhci) | ||
1478 | { | ||
1479 | |||
1480 | /* Splice the urb_remove_list onto the end of the complete_list */ | ||
1481 | list_splice_init(&uhci->urb_remove_list, uhci->complete_list.prev); | ||
1482 | } | ||
1483 | |||
1484 | /* Process events in the schedule, but only in one thread at a time */ | ||
1485 | static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs) | 1353 | static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs) |
1486 | { | 1354 | { |
1487 | struct urb_priv *urbp, *tmp; | 1355 | int i; |
1356 | struct uhci_qh *qh; | ||
1488 | 1357 | ||
1489 | /* Don't allow re-entrant calls */ | 1358 | /* Don't allow re-entrant calls */ |
1490 | if (uhci->scan_in_progress) { | 1359 | if (uhci->scan_in_progress) { |
@@ -1498,60 +1367,39 @@ static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs) | |||
1498 | uhci_clear_next_interrupt(uhci); | 1367 | uhci_clear_next_interrupt(uhci); |
1499 | uhci_get_current_frame_number(uhci); | 1368 | uhci_get_current_frame_number(uhci); |
1500 | 1369 | ||
1501 | if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) | ||
1502 | uhci_free_pending_qhs(uhci); | ||
1503 | if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) | 1370 | if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) |
1504 | uhci_free_pending_tds(uhci); | 1371 | uhci_free_pending_tds(uhci); |
1505 | if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age) | ||
1506 | uhci_remove_pending_urbps(uhci); | ||
1507 | |||
1508 | /* Walk the list of pending URBs to see which ones completed | ||
1509 | * (must be _safe because uhci_transfer_result() dequeues URBs) */ | ||
1510 | list_for_each_entry_safe(urbp, tmp, &uhci->urb_list, urb_list) { | ||
1511 | struct urb *urb = urbp->urb; | ||
1512 | 1372 | ||
1513 | /* Checks the status and does all of the magic necessary */ | 1373 | /* Go through all the QH queues and process the URBs in each one */ |
1514 | uhci_transfer_result(uhci, urb); | 1374 | for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) { |
1515 | } | 1375 | uhci->next_qh = list_entry(uhci->skelqh[i]->node.next, |
1516 | uhci_finish_completion(uhci, regs); | 1376 | struct uhci_qh, node); |
1517 | 1377 | while ((qh = uhci->next_qh) != uhci->skelqh[i]) { | |
1518 | /* If the controller is stopped, we can finish these off right now */ | 1378 | uhci->next_qh = list_entry(qh->node.next, |
1519 | if (uhci->is_stopped) { | 1379 | struct uhci_qh, node); |
1520 | uhci_free_pending_qhs(uhci); | 1380 | uhci_scan_qh(uhci, qh, regs); |
1521 | uhci_free_pending_tds(uhci); | 1381 | } |
1522 | uhci_remove_pending_urbps(uhci); | ||
1523 | } | 1382 | } |
1524 | 1383 | ||
1525 | if (uhci->need_rescan) | 1384 | if (uhci->need_rescan) |
1526 | goto rescan; | 1385 | goto rescan; |
1527 | uhci->scan_in_progress = 0; | 1386 | uhci->scan_in_progress = 0; |
1528 | 1387 | ||
1529 | if (list_empty(&uhci->urb_remove_list) && | 1388 | /* If the controller is stopped, we can finish these off right now */ |
1530 | list_empty(&uhci->td_remove_list) && | 1389 | if (uhci->is_stopped) |
1531 | list_empty(&uhci->qh_remove_list)) | 1390 | uhci_free_pending_tds(uhci); |
1391 | |||
1392 | if (list_empty(&uhci->td_remove_list) && | ||
1393 | list_empty(&uhci->skel_unlink_qh->node)) | ||
1532 | uhci_clear_next_interrupt(uhci); | 1394 | uhci_clear_next_interrupt(uhci); |
1533 | else | 1395 | else |
1534 | uhci_set_next_interrupt(uhci); | 1396 | uhci_set_next_interrupt(uhci); |
1535 | |||
1536 | /* Wake up anyone waiting for an URB to complete */ | ||
1537 | wake_up_all(&uhci->waitqh); | ||
1538 | } | 1397 | } |
1539 | 1398 | ||
1540 | static void check_fsbr(struct uhci_hcd *uhci) | 1399 | static void check_fsbr(struct uhci_hcd *uhci) |
1541 | { | 1400 | { |
1542 | struct urb_priv *up; | 1401 | /* For now, don't scan URBs for FSBR timeouts. |
1543 | 1402 | * Add it back in later... */ | |
1544 | list_for_each_entry(up, &uhci->urb_list, urb_list) { | ||
1545 | struct urb *u = up->urb; | ||
1546 | |||
1547 | spin_lock(&u->lock); | ||
1548 | |||
1549 | /* Check if the FSBR timed out */ | ||
1550 | if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT)) | ||
1551 | uhci_fsbr_timeout(uhci, u); | ||
1552 | |||
1553 | spin_unlock(&u->lock); | ||
1554 | } | ||
1555 | 1403 | ||
1556 | /* Really disable FSBR */ | 1404 | /* Really disable FSBR */ |
1557 | if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) { | 1405 | if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) { |