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authorOlav Kongas <ok@artecdesign.ee>2005-04-09 15:57:39 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-06-27 17:43:42 -0400
commit4808a1c0261176f9c7e28e7f108d41a381a7d0fc (patch)
tree3995a52136db8b999fe48335f5dc2ec8007909cd /drivers/usb/host
parent313980c92724cf42877a7bdafdef439ee9d68ccb (diff)
[PATCH] USB: Add isp116x-hcd USB host controller driver
This patch provides an "isp116x-hcd" driver for Philips' ISP1160/ISP1161 USB host controllers. The driver: - is relatively small, meant for use on embedded platforms. - runs usbtests 1-14 without problems for days. - has been in use by 6-7 different people on ARM and PPC platforms, running a range of devices including USB hubs. - supports suspend/resume of both the platform device and the root hub; supports remote wakeup of the root hub (but NOT the platform device) by USB devices. - does NOT support ISO transfers (nobody has asked for them). - is PIO-only. Signed-off-by: Olav Kongas <ok@artecdesign.ee> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host')
-rw-r--r--drivers/usb/host/Kconfig13
-rw-r--r--drivers/usb/host/Makefile1
-rw-r--r--drivers/usb/host/isp116x-hcd.c1882
-rw-r--r--drivers/usb/host/isp116x.h583
4 files changed, 2479 insertions, 0 deletions
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 19e598c9641f..ed1899d307db 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -49,6 +49,19 @@ config USB_EHCI_ROOT_HUB_TT
49 49
50 This supports the EHCI implementation from TransDimension Inc. 50 This supports the EHCI implementation from TransDimension Inc.
51 51
52config USB_ISP116X_HCD
53 tristate "ISP116X HCD support"
54 depends on USB
55 default N
56 ---help---
57 The ISP1160 and ISP1161 chips are USB host controllers. Enable this
58 option if your board has this chip. If unsure, say N.
59
60 This driver does not support isochronous transfers.
61
62 To compile this driver as a module, choose M here: the
63 module will be called isp116x-hcd.
64
52config USB_OHCI_HCD 65config USB_OHCI_HCD
53 tristate "OHCI HCD support" 66 tristate "OHCI HCD support"
54 depends on USB && USB_ARCH_HAS_OHCI 67 depends on USB && USB_ARCH_HAS_OHCI
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 5dbd3e7a27c7..350d14fc1cc9 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -4,6 +4,7 @@
4# 4#
5 5
6obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o 6obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
7obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
7obj-$(CONFIG_USB_OHCI_HCD) += ohci-hcd.o 8obj-$(CONFIG_USB_OHCI_HCD) += ohci-hcd.o
8obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o 9obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o
9obj-$(CONFIG_USB_SL811_HCD) += sl811-hcd.o 10obj-$(CONFIG_USB_SL811_HCD) += sl811-hcd.o
diff --git a/drivers/usb/host/isp116x-hcd.c b/drivers/usb/host/isp116x-hcd.c
new file mode 100644
index 000000000000..69e7433d9ce8
--- /dev/null
+++ b/drivers/usb/host/isp116x-hcd.c
@@ -0,0 +1,1882 @@
1/*
2 * ISP116x HCD (Host Controller Driver) for USB.
3 *
4 * Derived from the SL811 HCD, rewritten for ISP116x.
5 * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
6 *
7 * Portions:
8 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
9 * Copyright (C) 2004 David Brownell
10 *
11 * Periodic scheduling is based on Roman's OHCI code
12 * Copyright (C) 1999 Roman Weissgaerber
13 *
14 */
15
16/*
17 * The driver basically works. A number of people have used it with a range
18 * of devices.
19 *
20 *The driver passes all usbtests 1-14.
21 *
22 * Suspending/resuming of root hub via sysfs works. Remote wakeup works too.
23 * And suspending/resuming of platform device works too. Suspend/resume
24 * via HCD operations vector is not implemented.
25 *
26 * Iso transfer support is not implemented. Adding this would include
27 * implementing recovery from the failure to service the processed ITL
28 * fifo ram in time, which will involve chip reset.
29 *
30 * TODO:
31 + More testing of suspend/resume.
32*/
33
34/*
35 ISP116x chips require certain delays between accesses to its
36 registers. The following timing options exist.
37
38 1. Configure your memory controller (the best)
39 2. Implement platform-specific delay function possibly
40 combined with configuring the memory controller; see
41 include/linux/usb-isp116x.h for more info. Some broken
42 memory controllers line LH7A400 SMC need this. Also,
43 uncomment for that to work the following
44 USE_PLATFORM_DELAY macro.
45 3. Use ndelay (easiest, poorest). For that, uncomment
46 the following USE_NDELAY macro.
47*/
48#define USE_PLATFORM_DELAY
49//#define USE_NDELAY
50
51//#define DEBUG
52//#define VERBOSE
53/* Transfer descriptors. See dump_ptd() for printout format */
54//#define PTD_TRACE
55/* enqueuing/finishing log of urbs */
56//#define URB_TRACE
57
58#include <linux/config.h>
59#include <linux/module.h>
60#include <linux/moduleparam.h>
61#include <linux/kernel.h>
62#include <linux/delay.h>
63#include <linux/ioport.h>
64#include <linux/sched.h>
65#include <linux/slab.h>
66#include <linux/smp_lock.h>
67#include <linux/errno.h>
68#include <linux/init.h>
69#include <linux/list.h>
70#include <linux/interrupt.h>
71#include <linux/usb.h>
72#include <linux/usb_isp116x.h>
73
74#include <asm/io.h>
75#include <asm/irq.h>
76#include <asm/system.h>
77#include <asm/byteorder.h>
78
79#ifndef DEBUG
80# define STUB_DEBUG_FILE
81#endif
82
83#include "../core/hcd.h"
84#include "isp116x.h"
85
86#define DRIVER_VERSION "08 Apr 2005"
87#define DRIVER_DESC "ISP116x USB Host Controller Driver"
88
89MODULE_DESCRIPTION(DRIVER_DESC);
90MODULE_LICENSE("GPL");
91
92static const char hcd_name[] = "isp116x-hcd";
93
94/*-----------------------------------------------------------------*/
95
96/*
97 Write len bytes to fifo, pad till 32-bit boundary
98 */
99static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
100{
101 u8 *dp = (u8 *) buf;
102 u16 *dp2 = (u16 *) buf;
103 u16 w;
104 int quot = len % 4;
105
106 if ((unsigned long)dp2 & 1) {
107 /* not aligned */
108 for (; len > 1; len -= 2) {
109 w = *dp++;
110 w |= *dp++ << 8;
111 isp116x_raw_write_data16(isp116x, w);
112 }
113 if (len)
114 isp116x_write_data16(isp116x, (u16) * dp);
115 } else {
116 /* aligned */
117 for (; len > 1; len -= 2)
118 isp116x_raw_write_data16(isp116x, *dp2++);
119 if (len)
120 isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
121 }
122 if (quot == 1 || quot == 2)
123 isp116x_raw_write_data16(isp116x, 0);
124}
125
126/*
127 Read len bytes from fifo and then read till 32-bit boundary.
128 */
129static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
130{
131 u8 *dp = (u8 *) buf;
132 u16 *dp2 = (u16 *) buf;
133 u16 w;
134 int quot = len % 4;
135
136 if ((unsigned long)dp2 & 1) {
137 /* not aligned */
138 for (; len > 1; len -= 2) {
139 w = isp116x_raw_read_data16(isp116x);
140 *dp++ = w & 0xff;
141 *dp++ = (w >> 8) & 0xff;
142 }
143 if (len)
144 *dp = 0xff & isp116x_read_data16(isp116x);
145 } else {
146 /* aligned */
147 for (; len > 1; len -= 2)
148 *dp2++ = isp116x_raw_read_data16(isp116x);
149 if (len)
150 *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
151 }
152 if (quot == 1 || quot == 2)
153 isp116x_raw_read_data16(isp116x);
154}
155
156/*
157 Write ptd's and data for scheduled transfers into
158 the fifo ram. Fifo must be empty and ready.
159*/
160static void pack_fifo(struct isp116x *isp116x)
161{
162 struct isp116x_ep *ep;
163 struct ptd *ptd;
164 int buflen = isp116x->atl_last_dir == PTD_DIR_IN
165 ? isp116x->atl_bufshrt : isp116x->atl_buflen;
166 int ptd_count = 0;
167
168 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
169 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
170 isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
171 for (ep = isp116x->atl_active; ep; ep = ep->active) {
172 ++ptd_count;
173 ptd = &ep->ptd;
174 dump_ptd(ptd);
175 dump_ptd_out_data(ptd, ep->data);
176 isp116x_write_data16(isp116x, ptd->count);
177 isp116x_write_data16(isp116x, ptd->mps);
178 isp116x_write_data16(isp116x, ptd->len);
179 isp116x_write_data16(isp116x, ptd->faddr);
180 buflen -= sizeof(struct ptd);
181 /* Skip writing data for last IN PTD */
182 if (ep->active || (isp116x->atl_last_dir != PTD_DIR_IN)) {
183 write_ptddata_to_fifo(isp116x, ep->data, ep->length);
184 buflen -= ALIGN(ep->length, 4);
185 }
186 }
187 BUG_ON(buflen);
188}
189
190/*
191 Read the processed ptd's and data from fifo ram back to
192 URBs' buffers. Fifo must be full and done
193*/
194static void unpack_fifo(struct isp116x *isp116x)
195{
196 struct isp116x_ep *ep;
197 struct ptd *ptd;
198 int buflen = isp116x->atl_last_dir == PTD_DIR_IN
199 ? isp116x->atl_buflen : isp116x->atl_bufshrt;
200
201 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
202 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
203 isp116x_write_addr(isp116x, HCATLPORT);
204 for (ep = isp116x->atl_active; ep; ep = ep->active) {
205 ptd = &ep->ptd;
206 ptd->count = isp116x_read_data16(isp116x);
207 ptd->mps = isp116x_read_data16(isp116x);
208 ptd->len = isp116x_read_data16(isp116x);
209 ptd->faddr = isp116x_read_data16(isp116x);
210 buflen -= sizeof(struct ptd);
211 /* Skip reading data for last Setup or Out PTD */
212 if (ep->active || (isp116x->atl_last_dir == PTD_DIR_IN)) {
213 read_ptddata_from_fifo(isp116x, ep->data, ep->length);
214 buflen -= ALIGN(ep->length, 4);
215 }
216 dump_ptd(ptd);
217 dump_ptd_in_data(ptd, ep->data);
218 }
219 BUG_ON(buflen);
220}
221
222/*---------------------------------------------------------------*/
223
224/*
225 Set up PTD's.
226*/
227static void preproc_atl_queue(struct isp116x *isp116x)
228{
229 struct isp116x_ep *ep;
230 struct urb *urb;
231 struct ptd *ptd;
232 u16 toggle, dir, len;
233
234 for (ep = isp116x->atl_active; ep; ep = ep->active) {
235 BUG_ON(list_empty(&ep->hep->urb_list));
236 urb = container_of(ep->hep->urb_list.next,
237 struct urb, urb_list);
238 ptd = &ep->ptd;
239 len = ep->length;
240 spin_lock(&urb->lock);
241 ep->data = (unsigned char *)urb->transfer_buffer
242 + urb->actual_length;
243
244 switch (ep->nextpid) {
245 case USB_PID_IN:
246 toggle = usb_gettoggle(urb->dev, ep->epnum, 0);
247 dir = PTD_DIR_IN;
248 break;
249 case USB_PID_OUT:
250 toggle = usb_gettoggle(urb->dev, ep->epnum, 1);
251 dir = PTD_DIR_OUT;
252 break;
253 case USB_PID_SETUP:
254 toggle = 0;
255 dir = PTD_DIR_SETUP;
256 len = sizeof(struct usb_ctrlrequest);
257 ep->data = urb->setup_packet;
258 break;
259 case USB_PID_ACK:
260 toggle = 1;
261 len = 0;
262 dir = (urb->transfer_buffer_length
263 && usb_pipein(urb->pipe))
264 ? PTD_DIR_OUT : PTD_DIR_IN;
265 break;
266 default:
267 /* To please gcc */
268 toggle = dir = 0;
269 ERR("%s %d: ep->nextpid %d\n", __func__, __LINE__,
270 ep->nextpid);
271 BUG_ON(1);
272 }
273
274 ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle);
275 ptd->mps = PTD_MPS(ep->maxpacket)
276 | PTD_SPD(urb->dev->speed == USB_SPEED_LOW)
277 | PTD_EP(ep->epnum);
278 ptd->len = PTD_LEN(len) | PTD_DIR(dir);
279 ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));
280 spin_unlock(&urb->lock);
281 if (!ep->active) {
282 ptd->mps |= PTD_LAST_MSK;
283 isp116x->atl_last_dir = dir;
284 }
285 isp116x->atl_bufshrt = sizeof(struct ptd) + isp116x->atl_buflen;
286 isp116x->atl_buflen = isp116x->atl_bufshrt + ALIGN(len, 4);
287 }
288}
289
290/*
291 Analyze transfer results, handle partial transfers and errors
292*/
293static void postproc_atl_queue(struct isp116x *isp116x)
294{
295 struct isp116x_ep *ep;
296 struct urb *urb;
297 struct usb_device *udev;
298 struct ptd *ptd;
299 int short_not_ok;
300 u8 cc;
301
302 for (ep = isp116x->atl_active; ep; ep = ep->active) {
303 BUG_ON(list_empty(&ep->hep->urb_list));
304 urb =
305 container_of(ep->hep->urb_list.next, struct urb, urb_list);
306 udev = urb->dev;
307 ptd = &ep->ptd;
308 cc = PTD_GET_CC(ptd);
309
310 spin_lock(&urb->lock);
311 short_not_ok = 1;
312
313 /* Data underrun is special. For allowed underrun
314 we clear the error and continue as normal. For
315 forbidden underrun we finish the DATA stage
316 immediately while for control transfer,
317 we do a STATUS stage. */
318 if (cc == TD_DATAUNDERRUN) {
319 if (!(urb->transfer_flags & URB_SHORT_NOT_OK)) {
320 DBG("Allowed data underrun\n");
321 cc = TD_CC_NOERROR;
322 short_not_ok = 0;
323 } else {
324 ep->error_count = 1;
325 if (usb_pipecontrol(urb->pipe))
326 ep->nextpid = USB_PID_ACK;
327 else
328 usb_settoggle(udev, ep->epnum,
329 ep->nextpid ==
330 USB_PID_OUT,
331 PTD_GET_TOGGLE(ptd) ^ 1);
332 urb->status = cc_to_error[TD_DATAUNDERRUN];
333 spin_unlock(&urb->lock);
334 continue;
335 }
336 }
337 /* Keep underrun error through the STATUS stage */
338 if (urb->status == cc_to_error[TD_DATAUNDERRUN])
339 cc = TD_DATAUNDERRUN;
340
341 if (cc != TD_CC_NOERROR && cc != TD_NOTACCESSED
342 && (++ep->error_count >= 3 || cc == TD_CC_STALL
343 || cc == TD_DATAOVERRUN)) {
344 if (urb->status == -EINPROGRESS)
345 urb->status = cc_to_error[cc];
346 if (ep->nextpid == USB_PID_ACK)
347 ep->nextpid = 0;
348 spin_unlock(&urb->lock);
349 continue;
350 }
351 /* According to usb spec, zero-length Int transfer signals
352 finishing of the urb. Hey, does this apply only
353 for IN endpoints? */
354 if (usb_pipeint(urb->pipe) && !PTD_GET_LEN(ptd)) {
355 if (urb->status == -EINPROGRESS)
356 urb->status = 0;
357 spin_unlock(&urb->lock);
358 continue;
359 }
360
361 /* Relax after previously failed, but later succeeded
362 or correctly NAK'ed retransmission attempt */
363 if (ep->error_count
364 && (cc == TD_CC_NOERROR || cc == TD_NOTACCESSED))
365 ep->error_count = 0;
366
367 /* Take into account idiosyncracies of the isp116x chip
368 regarding toggle bit for failed transfers */
369 if (ep->nextpid == USB_PID_OUT)
370 usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd)
371 ^ (ep->error_count > 0));
372 else if (ep->nextpid == USB_PID_IN)
373 usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd)
374 ^ (ep->error_count > 0));
375
376 switch (ep->nextpid) {
377 case USB_PID_IN:
378 case USB_PID_OUT:
379 urb->actual_length += PTD_GET_COUNT(ptd);
380 if (PTD_GET_ACTIVE(ptd)
381 || (cc != TD_CC_NOERROR && cc < 0x0E))
382 break;
383 if (urb->transfer_buffer_length != urb->actual_length) {
384 if (short_not_ok)
385 break;
386 } else {
387 if (urb->transfer_flags & URB_ZERO_PACKET
388 && ep->nextpid == USB_PID_OUT
389 && !(PTD_GET_COUNT(ptd) % ep->maxpacket)) {
390 DBG("Zero packet requested\n");
391 break;
392 }
393 }
394 /* All data for this URB is transferred, let's finish */
395 if (usb_pipecontrol(urb->pipe))
396 ep->nextpid = USB_PID_ACK;
397 else if (urb->status == -EINPROGRESS)
398 urb->status = 0;
399 break;
400 case USB_PID_SETUP:
401 if (PTD_GET_ACTIVE(ptd)
402 || (cc != TD_CC_NOERROR && cc < 0x0E))
403 break;
404 if (urb->transfer_buffer_length == urb->actual_length)
405 ep->nextpid = USB_PID_ACK;
406 else if (usb_pipeout(urb->pipe)) {
407 usb_settoggle(udev, 0, 1, 1);
408 ep->nextpid = USB_PID_OUT;
409 } else {
410 usb_settoggle(udev, 0, 0, 1);
411 ep->nextpid = USB_PID_IN;
412 }
413 break;
414 case USB_PID_ACK:
415 if (PTD_GET_ACTIVE(ptd)
416 || (cc != TD_CC_NOERROR && cc < 0x0E))
417 break;
418 if (urb->status == -EINPROGRESS)
419 urb->status = 0;
420 ep->nextpid = 0;
421 break;
422 default:
423 BUG_ON(1);
424 }
425 spin_unlock(&urb->lock);
426 }
427}
428
429/*
430 Take done or failed requests out of schedule. Give back
431 processed urbs.
432*/
433static void finish_request(struct isp116x *isp116x, struct isp116x_ep *ep,
434 struct urb *urb, struct pt_regs *regs)
435__releases(isp116x->lock) __acquires(isp116x->lock)
436{
437 unsigned i;
438
439 urb->hcpriv = NULL;
440 ep->error_count = 0;
441
442 if (usb_pipecontrol(urb->pipe))
443 ep->nextpid = USB_PID_SETUP;
444
445 urb_dbg(urb, "Finish");
446
447 spin_unlock(&isp116x->lock);
448 usb_hcd_giveback_urb(isp116x_to_hcd(isp116x), urb, regs);
449 spin_lock(&isp116x->lock);
450
451 /* take idle endpoints out of the schedule */
452 if (!list_empty(&ep->hep->urb_list))
453 return;
454
455 /* async deschedule */
456 if (!list_empty(&ep->schedule)) {
457 list_del_init(&ep->schedule);
458 return;
459 }
460
461 /* periodic deschedule */
462 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
463 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
464 struct isp116x_ep *temp;
465 struct isp116x_ep **prev = &isp116x->periodic[i];
466
467 while (*prev && ((temp = *prev) != ep))
468 prev = &temp->next;
469 if (*prev)
470 *prev = ep->next;
471 isp116x->load[i] -= ep->load;
472 }
473 ep->branch = PERIODIC_SIZE;
474 isp116x_to_hcd(isp116x)->self.bandwidth_allocated -=
475 ep->load / ep->period;
476
477 /* switch irq type? */
478 if (!--isp116x->periodic_count) {
479 isp116x->irqenb &= ~HCuPINT_SOF;
480 isp116x->irqenb |= HCuPINT_ATL;
481 }
482}
483
484/*
485 Scan transfer lists, schedule transfers, send data off
486 to chip.
487 */
488static void start_atl_transfers(struct isp116x *isp116x)
489{
490 struct isp116x_ep *last_ep = NULL, *ep;
491 struct urb *urb;
492 u16 load = 0;
493 int len, index, speed, byte_time;
494
495 if (atomic_read(&isp116x->atl_finishing))
496 return;
497
498 if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state))
499 return;
500
501 /* FIFO not empty? */
502 if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL)
503 return;
504
505 isp116x->atl_active = NULL;
506 isp116x->atl_buflen = isp116x->atl_bufshrt = 0;
507
508 /* Schedule int transfers */
509 if (isp116x->periodic_count) {
510 isp116x->fmindex = index =
511 (isp116x->fmindex + 1) & (PERIODIC_SIZE - 1);
512 if ((load = isp116x->load[index])) {
513 /* Bring all int transfers for this frame
514 into the active queue */
515 isp116x->atl_active = last_ep =
516 isp116x->periodic[index];
517 while (last_ep->next)
518 last_ep = (last_ep->active = last_ep->next);
519 last_ep->active = NULL;
520 }
521 }
522
523 /* Schedule control/bulk transfers */
524 list_for_each_entry(ep, &isp116x->async, schedule) {
525 urb = container_of(ep->hep->urb_list.next,
526 struct urb, urb_list);
527 speed = urb->dev->speed;
528 byte_time = speed == USB_SPEED_LOW
529 ? BYTE_TIME_LOWSPEED : BYTE_TIME_FULLSPEED;
530
531 if (ep->nextpid == USB_PID_SETUP) {
532 len = sizeof(struct usb_ctrlrequest);
533 } else if (ep->nextpid == USB_PID_ACK) {
534 len = 0;
535 } else {
536 /* Find current free length ... */
537 len = (MAX_LOAD_LIMIT - load) / byte_time;
538
539 /* ... then limit it to configured max size ... */
540 len = min(len, speed == USB_SPEED_LOW ?
541 MAX_TRANSFER_SIZE_LOWSPEED :
542 MAX_TRANSFER_SIZE_FULLSPEED);
543
544 /* ... and finally cut to the multiple of MaxPacketSize,
545 or to the real length if there's enough room. */
546 if (len <
547 (urb->transfer_buffer_length -
548 urb->actual_length)) {
549 len -= len % ep->maxpacket;
550 if (!len)
551 continue;
552 } else
553 len = urb->transfer_buffer_length -
554 urb->actual_length;
555 BUG_ON(len < 0);
556 }
557
558 load += len * byte_time;
559 if (load > MAX_LOAD_LIMIT)
560 break;
561
562 ep->active = NULL;
563 ep->length = len;
564 if (last_ep)
565 last_ep->active = ep;
566 else
567 isp116x->atl_active = ep;
568 last_ep = ep;
569 }
570
571 /* Avoid starving of endpoints */
572 if ((&isp116x->async)->next != (&isp116x->async)->prev)
573 list_move(&isp116x->async, (&isp116x->async)->next);
574
575 if (isp116x->atl_active) {
576 preproc_atl_queue(isp116x);
577 pack_fifo(isp116x);
578 }
579}
580
581/*
582 Finish the processed transfers
583*/
584static void finish_atl_transfers(struct isp116x *isp116x, struct pt_regs *regs)
585{
586 struct isp116x_ep *ep;
587 struct urb *urb;
588
589 if (!isp116x->atl_active)
590 return;
591 /* Fifo not ready? */
592 if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE))
593 return;
594
595 atomic_inc(&isp116x->atl_finishing);
596 unpack_fifo(isp116x);
597 postproc_atl_queue(isp116x);
598 for (ep = isp116x->atl_active; ep; ep = ep->active) {
599 urb =
600 container_of(ep->hep->urb_list.next, struct urb, urb_list);
601 /* USB_PID_ACK check here avoids finishing of
602 control transfers, for which TD_DATAUNDERRUN
603 occured, while URB_SHORT_NOT_OK was set */
604 if (urb && urb->status != -EINPROGRESS
605 && ep->nextpid != USB_PID_ACK)
606 finish_request(isp116x, ep, urb, regs);
607 }
608 atomic_dec(&isp116x->atl_finishing);
609}
610
611static irqreturn_t isp116x_irq(struct usb_hcd *hcd, struct pt_regs *regs)
612{
613 struct isp116x *isp116x = hcd_to_isp116x(hcd);
614 u16 irqstat;
615 irqreturn_t ret = IRQ_NONE;
616
617 spin_lock(&isp116x->lock);
618 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
619 irqstat = isp116x_read_reg16(isp116x, HCuPINT);
620 isp116x_write_reg16(isp116x, HCuPINT, irqstat);
621
622 if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
623 ret = IRQ_HANDLED;
624 finish_atl_transfers(isp116x, regs);
625 }
626
627 if (irqstat & HCuPINT_OPR) {
628 u32 intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
629 isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
630 if (intstat & HCINT_UE) {
631 ERR("Unrecoverable error\n");
632 /* What should we do here? Reset? */
633 }
634 if (intstat & HCINT_RHSC) {
635 isp116x->rhstatus =
636 isp116x_read_reg32(isp116x, HCRHSTATUS);
637 isp116x->rhport[0] =
638 isp116x_read_reg32(isp116x, HCRHPORT1);
639 isp116x->rhport[1] =
640 isp116x_read_reg32(isp116x, HCRHPORT2);
641 }
642 if (intstat & HCINT_RD) {
643 DBG("---- remote wakeup\n");
644 schedule_work(&isp116x->rh_resume);
645 ret = IRQ_HANDLED;
646 }
647 irqstat &= ~HCuPINT_OPR;
648 ret = IRQ_HANDLED;
649 }
650
651 if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
652 start_atl_transfers(isp116x);
653 }
654
655 isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
656 spin_unlock(&isp116x->lock);
657 return ret;
658}
659
660/*-----------------------------------------------------------------*/
661
662/* usb 1.1 says max 90% of a frame is available for periodic transfers.
663 * this driver doesn't promise that much since it's got to handle an
664 * IRQ per packet; irq handling latencies also use up that time.
665 */
666
667/* out of 1000 us */
668#define MAX_PERIODIC_LOAD 600
669static int balance(struct isp116x *isp116x, u16 period, u16 load)
670{
671 int i, branch = -ENOSPC;
672
673 /* search for the least loaded schedule branch of that period
674 which has enough bandwidth left unreserved. */
675 for (i = 0; i < period; i++) {
676 if (branch < 0 || isp116x->load[branch] > isp116x->load[i]) {
677 int j;
678
679 for (j = i; j < PERIODIC_SIZE; j += period) {
680 if ((isp116x->load[j] + load)
681 > MAX_PERIODIC_LOAD)
682 break;
683 }
684 if (j < PERIODIC_SIZE)
685 continue;
686 branch = i;
687 }
688 }
689 return branch;
690}
691
692/* NB! ALL the code above this point runs with isp116x->lock
693 held, irqs off
694*/
695
696/*-----------------------------------------------------------------*/
697
698static int isp116x_urb_enqueue(struct usb_hcd *hcd,
699 struct usb_host_endpoint *hep, struct urb *urb,
700 int mem_flags)
701{
702 struct isp116x *isp116x = hcd_to_isp116x(hcd);
703 struct usb_device *udev = urb->dev;
704 unsigned int pipe = urb->pipe;
705 int is_out = !usb_pipein(pipe);
706 int type = usb_pipetype(pipe);
707 int epnum = usb_pipeendpoint(pipe);
708 struct isp116x_ep *ep = NULL;
709 unsigned long flags;
710 int i;
711 int ret = 0;
712
713 urb_dbg(urb, "Enqueue");
714
715 if (type == PIPE_ISOCHRONOUS) {
716 ERR("Isochronous transfers not supported\n");
717 urb_dbg(urb, "Refused to enqueue");
718 return -ENXIO;
719 }
720 /* avoid all allocations within spinlocks: request or endpoint */
721 if (!hep->hcpriv) {
722 ep = kcalloc(1, sizeof *ep, (__force unsigned)mem_flags);
723 if (!ep)
724 return -ENOMEM;
725 }
726
727 spin_lock_irqsave(&isp116x->lock, flags);
728 if (!HC_IS_RUNNING(hcd->state)) {
729 ret = -ENODEV;
730 goto fail;
731 }
732
733 if (hep->hcpriv)
734 ep = hep->hcpriv;
735 else {
736 INIT_LIST_HEAD(&ep->schedule);
737 ep->udev = usb_get_dev(udev);
738 ep->epnum = epnum;
739 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
740 usb_settoggle(udev, epnum, is_out, 0);
741
742 if (type == PIPE_CONTROL) {
743 ep->nextpid = USB_PID_SETUP;
744 } else if (is_out) {
745 ep->nextpid = USB_PID_OUT;
746 } else {
747 ep->nextpid = USB_PID_IN;
748 }
749
750 if (urb->interval) {
751 /*
752 With INT URBs submitted, the driver works with SOF
753 interrupt enabled and ATL interrupt disabled. After
754 the PTDs are written to fifo ram, the chip starts
755 fifo processing and usb transfers after the next
756 SOF and continues until the transfers are finished
757 (succeeded or failed) or the frame ends. Therefore,
758 the transfers occur only in every second frame,
759 while fifo reading/writing and data processing
760 occur in every other second frame. */
761 if (urb->interval < 2)
762 urb->interval = 2;
763 if (urb->interval > 2 * PERIODIC_SIZE)
764 urb->interval = 2 * PERIODIC_SIZE;
765 ep->period = urb->interval >> 1;
766 ep->branch = PERIODIC_SIZE;
767 ep->load = usb_calc_bus_time(udev->speed,
768 !is_out,
769 (type == PIPE_ISOCHRONOUS),
770 usb_maxpacket(udev, pipe,
771 is_out)) /
772 1000;
773 }
774 hep->hcpriv = ep;
775 ep->hep = hep;
776 }
777
778 /* maybe put endpoint into schedule */
779 switch (type) {
780 case PIPE_CONTROL:
781 case PIPE_BULK:
782 if (list_empty(&ep->schedule))
783 list_add_tail(&ep->schedule, &isp116x->async);
784 break;
785 case PIPE_INTERRUPT:
786 urb->interval = ep->period;
787 ep->length = min((int)ep->maxpacket,
788 urb->transfer_buffer_length);
789
790 /* urb submitted for already existing endpoint */
791 if (ep->branch < PERIODIC_SIZE)
792 break;
793
794 ret = ep->branch = balance(isp116x, ep->period, ep->load);
795 if (ret < 0)
796 goto fail;
797 ret = 0;
798
799 urb->start_frame = (isp116x->fmindex & (PERIODIC_SIZE - 1))
800 + ep->branch;
801
802 /* sort each schedule branch by period (slow before fast)
803 to share the faster parts of the tree without needing
804 dummy/placeholder nodes */
805 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
806 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
807 struct isp116x_ep **prev = &isp116x->periodic[i];
808 struct isp116x_ep *here = *prev;
809
810 while (here && ep != here) {
811 if (ep->period > here->period)
812 break;
813 prev = &here->next;
814 here = *prev;
815 }
816 if (ep != here) {
817 ep->next = here;
818 *prev = ep;
819 }
820 isp116x->load[i] += ep->load;
821 }
822 hcd->self.bandwidth_allocated += ep->load / ep->period;
823
824 /* switch over to SOFint */
825 if (!isp116x->periodic_count++) {
826 isp116x->irqenb &= ~HCuPINT_ATL;
827 isp116x->irqenb |= HCuPINT_SOF;
828 isp116x_write_reg16(isp116x, HCuPINTENB,
829 isp116x->irqenb);
830 }
831 }
832
833 /* in case of unlink-during-submit */
834 spin_lock(&urb->lock);
835 if (urb->status != -EINPROGRESS) {
836 spin_unlock(&urb->lock);
837 finish_request(isp116x, ep, urb, NULL);
838 ret = 0;
839 goto fail;
840 }
841 urb->hcpriv = hep;
842 spin_unlock(&urb->lock);
843 start_atl_transfers(isp116x);
844
845 fail:
846 spin_unlock_irqrestore(&isp116x->lock, flags);
847 return ret;
848}
849
850/*
851 Dequeue URBs.
852*/
853static int isp116x_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
854{
855 struct isp116x *isp116x = hcd_to_isp116x(hcd);
856 struct usb_host_endpoint *hep;
857 struct isp116x_ep *ep, *ep_act;
858 unsigned long flags;
859
860 spin_lock_irqsave(&isp116x->lock, flags);
861 hep = urb->hcpriv;
862 /* URB already unlinked (or never linked)? */
863 if (!hep) {
864 spin_unlock_irqrestore(&isp116x->lock, flags);
865 return 0;
866 }
867 ep = hep->hcpriv;
868 WARN_ON(hep != ep->hep);
869
870 /* In front of queue? */
871 if (ep->hep->urb_list.next == &urb->urb_list)
872 /* active? */
873 for (ep_act = isp116x->atl_active; ep_act;
874 ep_act = ep_act->active)
875 if (ep_act == ep) {
876 VDBG("dequeue, urb %p active; wait for irq\n",
877 urb);
878 urb = NULL;
879 break;
880 }
881
882 if (urb)
883 finish_request(isp116x, ep, urb, NULL);
884
885 spin_unlock_irqrestore(&isp116x->lock, flags);
886 return 0;
887}
888
889static void isp116x_endpoint_disable(struct usb_hcd *hcd,
890 struct usb_host_endpoint *hep)
891{
892 int i;
893 struct isp116x_ep *ep = hep->hcpriv;;
894
895 if (!ep)
896 return;
897
898 /* assume we'd just wait for the irq */
899 for (i = 0; i < 100 && !list_empty(&hep->urb_list); i++)
900 msleep(3);
901 if (!list_empty(&hep->urb_list))
902 WARN("ep %p not empty?\n", ep);
903
904 usb_put_dev(ep->udev);
905 kfree(ep);
906 hep->hcpriv = NULL;
907}
908
909static int isp116x_get_frame(struct usb_hcd *hcd)
910{
911 struct isp116x *isp116x = hcd_to_isp116x(hcd);
912 u32 fmnum;
913 unsigned long flags;
914
915 spin_lock_irqsave(&isp116x->lock, flags);
916 fmnum = isp116x_read_reg32(isp116x, HCFMNUM);
917 spin_unlock_irqrestore(&isp116x->lock, flags);
918 return (int)fmnum;
919}
920
921/*----------------------------------------------------------------*/
922
923/*
924 Adapted from ohci-hub.c. Currently we don't support autosuspend.
925*/
926static int isp116x_hub_status_data(struct usb_hcd *hcd, char *buf)
927{
928 struct isp116x *isp116x = hcd_to_isp116x(hcd);
929 int ports, i, changed = 0;
930
931 if (!HC_IS_RUNNING(hcd->state))
932 return -ESHUTDOWN;
933
934 ports = isp116x->rhdesca & RH_A_NDP;
935
936 /* init status */
937 if (isp116x->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
938 buf[0] = changed = 1;
939 else
940 buf[0] = 0;
941
942 for (i = 0; i < ports; i++) {
943 u32 status = isp116x->rhport[i];
944
945 if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC
946 | RH_PS_OCIC | RH_PS_PRSC)) {
947 changed = 1;
948 buf[0] |= 1 << (i + 1);
949 continue;
950 }
951 }
952 return changed;
953}
954
955static void isp116x_hub_descriptor(struct isp116x *isp116x,
956 struct usb_hub_descriptor *desc)
957{
958 u32 reg = isp116x->rhdesca;
959
960 desc->bDescriptorType = 0x29;
961 desc->bDescLength = 9;
962 desc->bHubContrCurrent = 0;
963 desc->bNbrPorts = (u8) (reg & 0x3);
964 /* Power switching, device type, overcurrent. */
965 desc->wHubCharacteristics =
966 (__force __u16) cpu_to_le16((u16) ((reg >> 8) & 0x1f));
967 desc->bPwrOn2PwrGood = (u8) ((reg >> 24) & 0xff);
968 /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */
969 desc->bitmap[0] = desc->bNbrPorts == 1 ? 1 << 1 : 3 << 1;
970 desc->bitmap[1] = ~0;
971}
972
973/* Perform reset of a given port.
974 It would be great to just start the reset and let the
975 USB core to clear the reset in due time. However,
976 root hub ports should be reset for at least 50 ms, while
977 our chip stays in reset for about 10 ms. I.e., we must
978 repeatedly reset it ourself here.
979*/
980static inline void root_port_reset(struct isp116x *isp116x, unsigned port)
981{
982 u32 tmp;
983 unsigned long flags, t;
984
985 /* Root hub reset should be 50 ms, but some devices
986 want it even longer. */
987 t = jiffies + msecs_to_jiffies(100);
988
989 while (time_before(jiffies, t)) {
990 spin_lock_irqsave(&isp116x->lock, flags);
991 /* spin until any current reset finishes */
992 for (;;) {
993 tmp = isp116x_read_reg32(isp116x, port ?
994 HCRHPORT2 : HCRHPORT1);
995 if (!(tmp & RH_PS_PRS))
996 break;
997 udelay(500);
998 }
999 /* Don't reset a disconnected port */
1000 if (!(tmp & RH_PS_CCS)) {
1001 spin_unlock_irqrestore(&isp116x->lock, flags);
1002 break;
1003 }
1004 /* Reset lasts 10ms (claims datasheet) */
1005 isp116x_write_reg32(isp116x, port ? HCRHPORT2 :
1006 HCRHPORT1, (RH_PS_PRS));
1007 spin_unlock_irqrestore(&isp116x->lock, flags);
1008 msleep(10);
1009 }
1010}
1011
1012/* Adapted from ohci-hub.c */
1013static int isp116x_hub_control(struct usb_hcd *hcd,
1014 u16 typeReq,
1015 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1016{
1017 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1018 int ret = 0;
1019 unsigned long flags;
1020 int ports = isp116x->rhdesca & RH_A_NDP;
1021 u32 tmp = 0;
1022
1023 switch (typeReq) {
1024 case ClearHubFeature:
1025 DBG("ClearHubFeature: ");
1026 switch (wValue) {
1027 case C_HUB_OVER_CURRENT:
1028 DBG("C_HUB_OVER_CURRENT\n");
1029 spin_lock_irqsave(&isp116x->lock, flags);
1030 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
1031 spin_unlock_irqrestore(&isp116x->lock, flags);
1032 case C_HUB_LOCAL_POWER:
1033 DBG("C_HUB_LOCAL_POWER\n");
1034 break;
1035 default:
1036 goto error;
1037 }
1038 break;
1039 case SetHubFeature:
1040 DBG("SetHubFeature: ");
1041 switch (wValue) {
1042 case C_HUB_OVER_CURRENT:
1043 case C_HUB_LOCAL_POWER:
1044 DBG("C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n");
1045 break;
1046 default:
1047 goto error;
1048 }
1049 break;
1050 case GetHubDescriptor:
1051 DBG("GetHubDescriptor\n");
1052 isp116x_hub_descriptor(isp116x,
1053 (struct usb_hub_descriptor *)buf);
1054 break;
1055 case GetHubStatus:
1056 DBG("GetHubStatus\n");
1057 *(__le32 *) buf = cpu_to_le32(0);
1058 break;
1059 case GetPortStatus:
1060 DBG("GetPortStatus\n");
1061 if (!wIndex || wIndex > ports)
1062 goto error;
1063 tmp = isp116x->rhport[--wIndex];
1064 *(__le32 *) buf = cpu_to_le32(tmp);
1065 DBG("GetPortStatus: port[%d] %08x\n", wIndex + 1, tmp);
1066 break;
1067 case ClearPortFeature:
1068 DBG("ClearPortFeature: ");
1069 if (!wIndex || wIndex > ports)
1070 goto error;
1071 wIndex--;
1072
1073 switch (wValue) {
1074 case USB_PORT_FEAT_ENABLE:
1075 DBG("USB_PORT_FEAT_ENABLE\n");
1076 tmp = RH_PS_CCS;
1077 break;
1078 case USB_PORT_FEAT_C_ENABLE:
1079 DBG("USB_PORT_FEAT_C_ENABLE\n");
1080 tmp = RH_PS_PESC;
1081 break;
1082 case USB_PORT_FEAT_SUSPEND:
1083 DBG("USB_PORT_FEAT_SUSPEND\n");
1084 tmp = RH_PS_POCI;
1085 break;
1086 case USB_PORT_FEAT_C_SUSPEND:
1087 DBG("USB_PORT_FEAT_C_SUSPEND\n");
1088 tmp = RH_PS_PSSC;
1089 break;
1090 case USB_PORT_FEAT_POWER:
1091 DBG("USB_PORT_FEAT_POWER\n");
1092 tmp = RH_PS_LSDA;
1093 break;
1094 case USB_PORT_FEAT_C_CONNECTION:
1095 DBG("USB_PORT_FEAT_C_CONNECTION\n");
1096 tmp = RH_PS_CSC;
1097 break;
1098 case USB_PORT_FEAT_C_OVER_CURRENT:
1099 DBG("USB_PORT_FEAT_C_OVER_CURRENT\n");
1100 tmp = RH_PS_OCIC;
1101 break;
1102 case USB_PORT_FEAT_C_RESET:
1103 DBG("USB_PORT_FEAT_C_RESET\n");
1104 tmp = RH_PS_PRSC;
1105 break;
1106 default:
1107 goto error;
1108 }
1109 spin_lock_irqsave(&isp116x->lock, flags);
1110 isp116x_write_reg32(isp116x, wIndex
1111 ? HCRHPORT2 : HCRHPORT1, tmp);
1112 isp116x->rhport[wIndex] =
1113 isp116x_read_reg32(isp116x, wIndex ? HCRHPORT2 : HCRHPORT1);
1114 spin_unlock_irqrestore(&isp116x->lock, flags);
1115 break;
1116 case SetPortFeature:
1117 DBG("SetPortFeature: ");
1118 if (!wIndex || wIndex > ports)
1119 goto error;
1120 wIndex--;
1121 switch (wValue) {
1122 case USB_PORT_FEAT_SUSPEND:
1123 DBG("USB_PORT_FEAT_SUSPEND\n");
1124 spin_lock_irqsave(&isp116x->lock, flags);
1125 isp116x_write_reg32(isp116x, wIndex
1126 ? HCRHPORT2 : HCRHPORT1, RH_PS_PSS);
1127 break;
1128 case USB_PORT_FEAT_POWER:
1129 DBG("USB_PORT_FEAT_POWER\n");
1130 spin_lock_irqsave(&isp116x->lock, flags);
1131 isp116x_write_reg32(isp116x, wIndex
1132 ? HCRHPORT2 : HCRHPORT1, RH_PS_PPS);
1133 break;
1134 case USB_PORT_FEAT_RESET:
1135 DBG("USB_PORT_FEAT_RESET\n");
1136 root_port_reset(isp116x, wIndex);
1137 spin_lock_irqsave(&isp116x->lock, flags);
1138 break;
1139 default:
1140 goto error;
1141 }
1142 isp116x->rhport[wIndex] =
1143 isp116x_read_reg32(isp116x, wIndex ? HCRHPORT2 : HCRHPORT1);
1144 spin_unlock_irqrestore(&isp116x->lock, flags);
1145 break;
1146
1147 default:
1148 error:
1149 /* "protocol stall" on error */
1150 DBG("PROTOCOL STALL\n");
1151 ret = -EPIPE;
1152 }
1153 return ret;
1154}
1155
1156#ifdef CONFIG_PM
1157
1158static int isp116x_hub_suspend(struct usb_hcd *hcd)
1159{
1160 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1161 unsigned long flags;
1162 u32 val;
1163 int ret = 0;
1164
1165 spin_lock_irqsave(&isp116x->lock, flags);
1166
1167 val = isp116x_read_reg32(isp116x, HCCONTROL);
1168 switch (val & HCCONTROL_HCFS) {
1169 case HCCONTROL_USB_OPER:
1170 hcd->state = HC_STATE_QUIESCING;
1171 val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE);
1172 val |= HCCONTROL_USB_SUSPEND;
1173 if (hcd->remote_wakeup)
1174 val |= HCCONTROL_RWE;
1175 /* Wait for usb transfers to finish */
1176 mdelay(2);
1177 isp116x_write_reg32(isp116x, HCCONTROL, val);
1178 hcd->state = HC_STATE_SUSPENDED;
1179 /* Wait for devices to suspend */
1180 mdelay(5);
1181 case HCCONTROL_USB_SUSPEND:
1182 break;
1183 case HCCONTROL_USB_RESUME:
1184 isp116x_write_reg32(isp116x, HCCONTROL,
1185 (val & ~HCCONTROL_HCFS) |
1186 HCCONTROL_USB_RESET);
1187 case HCCONTROL_USB_RESET:
1188 ret = -EBUSY;
1189 break;
1190 default:
1191 ret = -EINVAL;
1192 }
1193
1194 spin_unlock_irqrestore(&isp116x->lock, flags);
1195 return ret;
1196}
1197
1198static int isp116x_hub_resume(struct usb_hcd *hcd)
1199{
1200 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1201 u32 val;
1202 int ret = -EINPROGRESS;
1203
1204 msleep(5);
1205 spin_lock_irq(&isp116x->lock);
1206
1207 val = isp116x_read_reg32(isp116x, HCCONTROL);
1208 switch (val & HCCONTROL_HCFS) {
1209 case HCCONTROL_USB_SUSPEND:
1210 val &= ~HCCONTROL_HCFS;
1211 val |= HCCONTROL_USB_RESUME;
1212 isp116x_write_reg32(isp116x, HCCONTROL, val);
1213 case HCCONTROL_USB_RESUME:
1214 break;
1215 case HCCONTROL_USB_OPER:
1216 /* Without setting power_state here the
1217 SUSPENDED state won't be removed from
1218 sysfs/usbN/power.state as a response to remote
1219 wakeup. Maybe in the future. */
1220 hcd->self.root_hub->dev.power.power_state = PMSG_ON;
1221 ret = 0;
1222 break;
1223 default:
1224 ret = -EBUSY;
1225 }
1226
1227 if (ret != -EINPROGRESS) {
1228 spin_unlock_irq(&isp116x->lock);
1229 return ret;
1230 }
1231
1232 val = isp116x->rhdesca & RH_A_NDP;
1233 while (val--) {
1234 u32 stat =
1235 isp116x_read_reg32(isp116x, val ? HCRHPORT2 : HCRHPORT1);
1236 /* force global, not selective, resume */
1237 if (!(stat & RH_PS_PSS))
1238 continue;
1239 DBG("%s: Resuming port %d\n", __func__, val);
1240 isp116x_write_reg32(isp116x, RH_PS_POCI, val
1241 ? HCRHPORT2 : HCRHPORT1);
1242 }
1243 spin_unlock_irq(&isp116x->lock);
1244
1245 hcd->state = HC_STATE_RESUMING;
1246 mdelay(20);
1247
1248 /* Go operational */
1249 spin_lock_irq(&isp116x->lock);
1250 val = isp116x_read_reg32(isp116x, HCCONTROL);
1251 isp116x_write_reg32(isp116x, HCCONTROL,
1252 (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER);
1253 spin_unlock_irq(&isp116x->lock);
1254 /* see analogous comment above */
1255 hcd->self.root_hub->dev.power.power_state = PMSG_ON;
1256 hcd->state = HC_STATE_RUNNING;
1257
1258 return 0;
1259}
1260
1261static void isp116x_rh_resume(void *_hcd)
1262{
1263 struct usb_hcd *hcd = _hcd;
1264
1265 usb_resume_device(hcd->self.root_hub);
1266}
1267
1268#else
1269
1270#define isp116x_hub_suspend NULL
1271#define isp116x_hub_resume NULL
1272
1273static void isp116x_rh_resume(void *_hcd)
1274{
1275}
1276
1277#endif
1278
1279/*-----------------------------------------------------------------*/
1280
1281#ifdef STUB_DEBUG_FILE
1282
1283static inline void create_debug_file(struct isp116x *isp116x)
1284{
1285}
1286
1287static inline void remove_debug_file(struct isp116x *isp116x)
1288{
1289}
1290
1291#else
1292
1293#include <linux/proc_fs.h>
1294#include <linux/seq_file.h>
1295
1296static void dump_irq(struct seq_file *s, char *label, u16 mask)
1297{
1298 seq_printf(s, "%s %04x%s%s%s%s%s%s\n", label, mask,
1299 mask & HCuPINT_CLKRDY ? " clkrdy" : "",
1300 mask & HCuPINT_SUSP ? " susp" : "",
1301 mask & HCuPINT_OPR ? " opr" : "",
1302 mask & HCuPINT_AIIEOT ? " eot" : "",
1303 mask & HCuPINT_ATL ? " atl" : "",
1304 mask & HCuPINT_SOF ? " sof" : "");
1305}
1306
1307static void dump_int(struct seq_file *s, char *label, u32 mask)
1308{
1309 seq_printf(s, "%s %08x%s%s%s%s%s%s%s\n", label, mask,
1310 mask & HCINT_MIE ? " MIE" : "",
1311 mask & HCINT_RHSC ? " rhsc" : "",
1312 mask & HCINT_FNO ? " fno" : "",
1313 mask & HCINT_UE ? " ue" : "",
1314 mask & HCINT_RD ? " rd" : "",
1315 mask & HCINT_SF ? " sof" : "", mask & HCINT_SO ? " so" : "");
1316}
1317
1318static int proc_isp116x_show(struct seq_file *s, void *unused)
1319{
1320 struct isp116x *isp116x = s->private;
1321 struct isp116x_ep *ep;
1322 struct urb *urb;
1323 unsigned i;
1324 char *str;
1325
1326 seq_printf(s, "%s\n%s version %s\n",
1327 isp116x_to_hcd(isp116x)->product_desc, hcd_name,
1328 DRIVER_VERSION);
1329
1330 if (HC_IS_SUSPENDED(isp116x_to_hcd(isp116x)->state)) {
1331 seq_printf(s, "HCD is suspended\n");
1332 return 0;
1333 }
1334 if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state)) {
1335 seq_printf(s, "HCD not running\n");
1336 return 0;
1337 }
1338
1339 spin_lock_irq(&isp116x->lock);
1340
1341 dump_irq(s, "hc_irq_enable", isp116x_read_reg16(isp116x, HCuPINTENB));
1342 dump_irq(s, "hc_irq_status", isp116x_read_reg16(isp116x, HCuPINT));
1343 dump_int(s, "hc_int_enable", isp116x_read_reg32(isp116x, HCINTENB));
1344 dump_int(s, "hc_int_status", isp116x_read_reg32(isp116x, HCINTSTAT));
1345
1346 list_for_each_entry(ep, &isp116x->async, schedule) {
1347
1348 switch (ep->nextpid) {
1349 case USB_PID_IN:
1350 str = "in";
1351 break;
1352 case USB_PID_OUT:
1353 str = "out";
1354 break;
1355 case USB_PID_SETUP:
1356 str = "setup";
1357 break;
1358 case USB_PID_ACK:
1359 str = "status";
1360 break;
1361 default:
1362 str = "?";
1363 break;
1364 };
1365 seq_printf(s, "%p, ep%d%s, maxpacket %d:\n", ep,
1366 ep->epnum, str, ep->maxpacket);
1367 list_for_each_entry(urb, &ep->hep->urb_list, urb_list) {
1368 seq_printf(s, " urb%p, %d/%d\n", urb,
1369 urb->actual_length,
1370 urb->transfer_buffer_length);
1371 }
1372 }
1373 if (!list_empty(&isp116x->async))
1374 seq_printf(s, "\n");
1375
1376 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1377
1378 for (i = 0; i < PERIODIC_SIZE; i++) {
1379 ep = isp116x->periodic[i];
1380 if (!ep)
1381 continue;
1382 seq_printf(s, "%2d [%3d]:\n", i, isp116x->load[i]);
1383
1384 /* DUMB: prints shared entries multiple times */
1385 do {
1386 seq_printf(s, " %d/%p (%sdev%d ep%d%s max %d)\n",
1387 ep->period, ep,
1388 (ep->udev->speed ==
1389 USB_SPEED_FULL) ? "" : "ls ",
1390 ep->udev->devnum, ep->epnum,
1391 (ep->epnum ==
1392 0) ? "" : ((ep->nextpid ==
1393 USB_PID_IN) ? "in" : "out"),
1394 ep->maxpacket);
1395 ep = ep->next;
1396 } while (ep);
1397 }
1398 spin_unlock_irq(&isp116x->lock);
1399 seq_printf(s, "\n");
1400
1401 return 0;
1402}
1403
1404static int proc_isp116x_open(struct inode *inode, struct file *file)
1405{
1406 return single_open(file, proc_isp116x_show, PDE(inode)->data);
1407}
1408
1409static struct file_operations proc_ops = {
1410 .open = proc_isp116x_open,
1411 .read = seq_read,
1412 .llseek = seq_lseek,
1413 .release = single_release,
1414};
1415
1416/* expect just one isp116x per system */
1417static const char proc_filename[] = "driver/isp116x";
1418
1419static void create_debug_file(struct isp116x *isp116x)
1420{
1421 struct proc_dir_entry *pde;
1422
1423 pde = create_proc_entry(proc_filename, 0, NULL);
1424 if (pde == NULL)
1425 return;
1426
1427 pde->proc_fops = &proc_ops;
1428 pde->data = isp116x;
1429 isp116x->pde = pde;
1430}
1431
1432static void remove_debug_file(struct isp116x *isp116x)
1433{
1434 if (isp116x->pde)
1435 remove_proc_entry(proc_filename, NULL);
1436}
1437
1438#endif
1439
1440/*-----------------------------------------------------------------*/
1441
1442/*
1443 Software reset - can be called from any contect.
1444*/
1445static int isp116x_sw_reset(struct isp116x *isp116x)
1446{
1447 int retries = 15;
1448 unsigned long flags;
1449 int ret = 0;
1450
1451 spin_lock_irqsave(&isp116x->lock, flags);
1452 isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
1453 isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
1454 while (--retries) {
1455 /* It usually resets within 1 ms */
1456 mdelay(1);
1457 if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
1458 break;
1459 }
1460 if (!retries) {
1461 ERR("Software reset timeout\n");
1462 ret = -ETIME;
1463 }
1464 spin_unlock_irqrestore(&isp116x->lock, flags);
1465 return ret;
1466}
1467
1468/*
1469 Reset. Tries to perform platform-specific hardware
1470 reset first; falls back to software reset.
1471*/
1472static int isp116x_reset(struct usb_hcd *hcd)
1473{
1474 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1475 unsigned long t;
1476 u16 clkrdy = 0;
1477 int ret = 0, timeout = 15 /* ms */ ;
1478
1479 if (isp116x->board && isp116x->board->reset) {
1480 /* Hardware reset */
1481 isp116x->board->reset(hcd->self.controller, 1);
1482 msleep(10);
1483 if (isp116x->board->clock)
1484 isp116x->board->clock(hcd->self.controller, 1);
1485 msleep(1);
1486 isp116x->board->reset(hcd->self.controller, 0);
1487 } else
1488 ret = isp116x_sw_reset(isp116x);
1489
1490 if (ret)
1491 return ret;
1492
1493 t = jiffies + msecs_to_jiffies(timeout);
1494 while (time_before_eq(jiffies, t)) {
1495 msleep(4);
1496 spin_lock_irq(&isp116x->lock);
1497 clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
1498 spin_unlock_irq(&isp116x->lock);
1499 if (clkrdy)
1500 break;
1501 }
1502 if (!clkrdy) {
1503 ERR("Clock not ready after 20ms\n");
1504 ret = -ENODEV;
1505 }
1506 return ret;
1507}
1508
1509static void isp116x_stop(struct usb_hcd *hcd)
1510{
1511 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1512 unsigned long flags;
1513 u32 val;
1514
1515 spin_lock_irqsave(&isp116x->lock, flags);
1516 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1517
1518 /* Switch off ports' power, some devices don't come up
1519 after next 'insmod' without this */
1520 val = isp116x_read_reg32(isp116x, HCRHDESCA);
1521 val &= ~(RH_A_NPS | RH_A_PSM);
1522 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1523 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
1524 spin_unlock_irqrestore(&isp116x->lock, flags);
1525
1526 /* Put the chip into reset state */
1527 if (isp116x->board && isp116x->board->reset)
1528 isp116x->board->reset(hcd->self.controller, 0);
1529 else
1530 isp116x_sw_reset(isp116x);
1531
1532 /* Stop the clock */
1533 if (isp116x->board && isp116x->board->clock)
1534 isp116x->board->clock(hcd->self.controller, 0);
1535}
1536
1537/*
1538 Configure the chip. The chip must be successfully reset by now.
1539*/
1540static int isp116x_start(struct usb_hcd *hcd)
1541{
1542 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1543 struct isp116x_platform_data *board = isp116x->board;
1544 struct usb_device *udev;
1545 u32 val;
1546 unsigned long flags;
1547
1548 spin_lock_irqsave(&isp116x->lock, flags);
1549
1550 /* clear interrupt status and disable all interrupt sources */
1551 isp116x_write_reg16(isp116x, HCuPINT, 0xff);
1552 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1553
1554 val = isp116x_read_reg16(isp116x, HCCHIPID);
1555 if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
1556 ERR("Invalid chip ID %04x\n", val);
1557 spin_unlock_irqrestore(&isp116x->lock, flags);
1558 return -ENODEV;
1559 }
1560
1561 isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
1562 isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
1563
1564 /* ----- HW conf */
1565 val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
1566 if (board->sel15Kres)
1567 val |= HCHWCFG_15KRSEL;
1568 /* Remote wakeup won't work without working clock */
1569 if (board->clknotstop || board->remote_wakeup_enable)
1570 val |= HCHWCFG_CLKNOTSTOP;
1571 if (board->oc_enable)
1572 val |= HCHWCFG_ANALOG_OC;
1573 if (board->int_act_high)
1574 val |= HCHWCFG_INT_POL;
1575 if (board->int_edge_triggered)
1576 val |= HCHWCFG_INT_TRIGGER;
1577 isp116x_write_reg16(isp116x, HCHWCFG, val);
1578
1579 /* ----- Root hub conf */
1580 val = 0;
1581 /* AN10003_1.pdf recommends NPS to be always 1 */
1582 if (board->no_power_switching)
1583 val |= RH_A_NPS;
1584 if (board->power_switching_mode)
1585 val |= RH_A_PSM;
1586 if (board->potpg)
1587 val |= (board->potpg << 24) & RH_A_POTPGT;
1588 else
1589 val |= (25 << 24) & RH_A_POTPGT;
1590 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1591 isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
1592
1593 val = RH_B_PPCM;
1594 isp116x_write_reg32(isp116x, HCRHDESCB, val);
1595 isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
1596
1597 val = 0;
1598 if (board->remote_wakeup_enable) {
1599 hcd->can_wakeup = 1;
1600 val |= RH_HS_DRWE;
1601 }
1602 isp116x_write_reg32(isp116x, HCRHSTATUS, val);
1603 isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
1604
1605 isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
1606 spin_unlock_irqrestore(&isp116x->lock, flags);
1607
1608 udev = usb_alloc_dev(NULL, &hcd->self, 0);
1609 if (!udev) {
1610 isp116x_stop(hcd);
1611 return -ENOMEM;
1612 }
1613
1614 udev->speed = USB_SPEED_FULL;
1615 hcd->state = HC_STATE_RUNNING;
1616
1617 if (usb_hcd_register_root_hub(udev, hcd) != 0) {
1618 isp116x_stop(hcd);
1619 usb_put_dev(udev);
1620 return -ENODEV;
1621 }
1622
1623 spin_lock_irqsave(&isp116x->lock, flags);
1624 /* Set up interrupts */
1625 isp116x->intenb = HCINT_MIE | HCINT_RHSC | HCINT_UE;
1626 if (board->remote_wakeup_enable)
1627 isp116x->intenb |= HCINT_RD;
1628 isp116x->irqenb = HCuPINT_ATL | HCuPINT_OPR; /* | HCuPINT_SUSP; */
1629 isp116x_write_reg32(isp116x, HCINTENB, isp116x->intenb);
1630 isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
1631
1632 /* Go operational */
1633 val = HCCONTROL_USB_OPER;
1634 /* Remote wakeup connected - NOT SUPPORTED */
1635 /* if (board->remote_wakeup_connected)
1636 val |= HCCONTROL_RWC; */
1637 if (board->remote_wakeup_enable)
1638 val |= HCCONTROL_RWE;
1639 isp116x_write_reg32(isp116x, HCCONTROL, val);
1640
1641 /* Disable ports to avoid race in device enumeration */
1642 isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
1643 isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
1644
1645 isp116x_show_regs(isp116x);
1646 spin_unlock_irqrestore(&isp116x->lock, flags);
1647 return 0;
1648}
1649
1650/*-----------------------------------------------------------------*/
1651
1652static struct hc_driver isp116x_hc_driver = {
1653 .description = hcd_name,
1654 .product_desc = "ISP116x Host Controller",
1655 .hcd_priv_size = sizeof(struct isp116x),
1656
1657 .irq = isp116x_irq,
1658 .flags = HCD_USB11,
1659
1660 .reset = isp116x_reset,
1661 .start = isp116x_start,
1662 .stop = isp116x_stop,
1663
1664 .urb_enqueue = isp116x_urb_enqueue,
1665 .urb_dequeue = isp116x_urb_dequeue,
1666 .endpoint_disable = isp116x_endpoint_disable,
1667
1668 .get_frame_number = isp116x_get_frame,
1669
1670 .hub_status_data = isp116x_hub_status_data,
1671 .hub_control = isp116x_hub_control,
1672 .hub_suspend = isp116x_hub_suspend,
1673 .hub_resume = isp116x_hub_resume,
1674};
1675
1676/*----------------------------------------------------------------*/
1677
1678static int __init_or_module isp116x_remove(struct device *dev)
1679{
1680 struct usb_hcd *hcd = dev_get_drvdata(dev);
1681 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1682 struct platform_device *pdev;
1683 struct resource *res;
1684
1685 pdev = container_of(dev, struct platform_device, dev);
1686 remove_debug_file(isp116x);
1687 usb_remove_hcd(hcd);
1688
1689 iounmap(isp116x->data_reg);
1690 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1691 release_mem_region(res->start, 2);
1692 iounmap(isp116x->addr_reg);
1693 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1694 release_mem_region(res->start, 2);
1695
1696 usb_put_hcd(hcd);
1697 return 0;
1698}
1699
1700#define resource_len(r) (((r)->end - (r)->start) + 1)
1701
1702static int __init isp116x_probe(struct device *dev)
1703{
1704 struct usb_hcd *hcd;
1705 struct isp116x *isp116x;
1706 struct platform_device *pdev;
1707 struct resource *addr, *data;
1708 void __iomem *addr_reg;
1709 void __iomem *data_reg;
1710 int irq;
1711 int ret = 0;
1712
1713 pdev = container_of(dev, struct platform_device, dev);
1714 if (pdev->num_resources < 3) {
1715 ret = -ENODEV;
1716 goto err1;
1717 }
1718
1719 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1720 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1721 irq = platform_get_irq(pdev, 0);
1722 if (!addr || !data || irq < 0) {
1723 ret = -ENODEV;
1724 goto err1;
1725 }
1726
1727 if (dev->dma_mask) {
1728 DBG("DMA not supported\n");
1729 ret = -EINVAL;
1730 goto err1;
1731 }
1732
1733 if (!request_mem_region(addr->start, 2, hcd_name)) {
1734 ret = -EBUSY;
1735 goto err1;
1736 }
1737 addr_reg = ioremap(addr->start, resource_len(addr));
1738 if (addr_reg == NULL) {
1739 ret = -ENOMEM;
1740 goto err2;
1741 }
1742 if (!request_mem_region(data->start, 2, hcd_name)) {
1743 ret = -EBUSY;
1744 goto err3;
1745 }
1746 data_reg = ioremap(data->start, resource_len(data));
1747 if (data_reg == NULL) {
1748 ret = -ENOMEM;
1749 goto err4;
1750 }
1751
1752 /* allocate and initialize hcd */
1753 hcd = usb_create_hcd(&isp116x_hc_driver, dev, dev->bus_id);
1754 if (!hcd) {
1755 ret = -ENOMEM;
1756 goto err5;
1757 }
1758 /* this rsrc_start is bogus */
1759 hcd->rsrc_start = addr->start;
1760 isp116x = hcd_to_isp116x(hcd);
1761 isp116x->data_reg = data_reg;
1762 isp116x->addr_reg = addr_reg;
1763 spin_lock_init(&isp116x->lock);
1764 INIT_LIST_HEAD(&isp116x->async);
1765 INIT_WORK(&isp116x->rh_resume, isp116x_rh_resume, hcd);
1766 isp116x->board = dev->platform_data;
1767
1768 if (!isp116x->board) {
1769 ERR("Platform data structure not initialized\n");
1770 ret = -ENODEV;
1771 goto err6;
1772 }
1773 if (isp116x_check_platform_delay(isp116x)) {
1774 ERR("USE_PLATFORM_DELAY defined, but delay function not "
1775 "implemented.\n");
1776 ERR("See comments in drivers/usb/host/isp116x-hcd.c\n");
1777 ret = -ENODEV;
1778 goto err6;
1779 }
1780
1781 ret = usb_add_hcd(hcd, irq, SA_INTERRUPT);
1782 if (ret != 0)
1783 goto err6;
1784
1785 create_debug_file(isp116x);
1786 return 0;
1787
1788 err6:
1789 usb_put_hcd(hcd);
1790 err5:
1791 iounmap(data_reg);
1792 err4:
1793 release_mem_region(data->start, 2);
1794 err3:
1795 iounmap(addr_reg);
1796 err2:
1797 release_mem_region(addr->start, 2);
1798 err1:
1799 ERR("init error, %d\n", ret);
1800 return ret;
1801}
1802
1803#ifdef CONFIG_PM
1804/*
1805 Suspend of platform device
1806*/
1807static int isp116x_suspend(struct device *dev, pm_message_t state, u32 phase)
1808{
1809 int ret = 0;
1810 struct usb_hcd *hcd = dev_get_drvdata(dev);
1811
1812 VDBG("%s: state %x, phase %x\n", __func__, state, phase);
1813
1814 if (phase != SUSPEND_DISABLE && phase != SUSPEND_POWER_DOWN)
1815 return 0;
1816
1817 ret = usb_suspend_device(hcd->self.root_hub, state);
1818 if (!ret) {
1819 dev->power.power_state = state;
1820 INFO("%s suspended\n", (char *)hcd_name);
1821 } else
1822 ERR("%s suspend failed\n", (char *)hcd_name);
1823
1824 return ret;
1825}
1826
1827/*
1828 Resume platform device
1829*/
1830static int isp116x_resume(struct device *dev, u32 phase)
1831{
1832 int ret = 0;
1833 struct usb_hcd *hcd = dev_get_drvdata(dev);
1834
1835 VDBG("%s: state %x, phase %x\n", __func__, dev->power.power_state,
1836 phase);
1837 if (phase != RESUME_POWER_ON)
1838 return 0;
1839
1840 ret = usb_resume_device(hcd->self.root_hub);
1841 if (!ret) {
1842 dev->power.power_state = PMSG_ON;
1843 VDBG("%s resumed\n", (char *)hcd_name);
1844 }
1845 return ret;
1846}
1847
1848#else
1849
1850#define isp116x_suspend NULL
1851#define isp116x_resume NULL
1852
1853#endif
1854
1855static struct device_driver isp116x_driver = {
1856 .name = (char *)hcd_name,
1857 .bus = &platform_bus_type,
1858 .probe = isp116x_probe,
1859 .remove = isp116x_remove,
1860 .suspend = isp116x_suspend,
1861 .resume = isp116x_resume,
1862};
1863
1864/*-----------------------------------------------------------------*/
1865
1866static int __init isp116x_init(void)
1867{
1868 if (usb_disabled())
1869 return -ENODEV;
1870
1871 INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
1872 return driver_register(&isp116x_driver);
1873}
1874
1875module_init(isp116x_init);
1876
1877static void __exit isp116x_cleanup(void)
1878{
1879 driver_unregister(&isp116x_driver);
1880}
1881
1882module_exit(isp116x_cleanup);
diff --git a/drivers/usb/host/isp116x.h b/drivers/usb/host/isp116x.h
new file mode 100644
index 000000000000..58873470dcf5
--- /dev/null
+++ b/drivers/usb/host/isp116x.h
@@ -0,0 +1,583 @@
1/*
2 * ISP116x register declarations and HCD data structures
3 *
4 * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
5 * Portions:
6 * Copyright (C) 2004 Lothar Wassmann
7 * Copyright (C) 2004 Psion Teklogix
8 * Copyright (C) 2004 David Brownell
9 */
10
11/* us of 1ms frame */
12#define MAX_LOAD_LIMIT 850
13
14/* Full speed: max # of bytes to transfer for a single urb
15 at a time must be < 1024 && must be multiple of 64.
16 832 allows transfering 4kiB within 5 frames. */
17#define MAX_TRANSFER_SIZE_FULLSPEED 832
18
19/* Low speed: there is no reason to schedule in very big
20 chunks; often the requested long transfers are for
21 string descriptors containing short strings. */
22#define MAX_TRANSFER_SIZE_LOWSPEED 64
23
24/* Bytetime (us), a rough indication of how much time it
25 would take to transfer a byte of useful data over USB */
26#define BYTE_TIME_FULLSPEED 1
27#define BYTE_TIME_LOWSPEED 20
28
29/* Buffer sizes */
30#define ISP116x_BUF_SIZE 4096
31#define ISP116x_ITL_BUFSIZE 0
32#define ISP116x_ATL_BUFSIZE ((ISP116x_BUF_SIZE) - 2*(ISP116x_ITL_BUFSIZE))
33
34#define ISP116x_WRITE_OFFSET 0x80
35
36/*------------ ISP116x registers/bits ------------*/
37#define HCREVISION 0x00
38#define HCCONTROL 0x01
39#define HCCONTROL_HCFS (3 << 6) /* host controller
40 functional state */
41#define HCCONTROL_USB_RESET (0 << 6)
42#define HCCONTROL_USB_RESUME (1 << 6)
43#define HCCONTROL_USB_OPER (2 << 6)
44#define HCCONTROL_USB_SUSPEND (3 << 6)
45#define HCCONTROL_RWC (1 << 9) /* remote wakeup connected */
46#define HCCONTROL_RWE (1 << 10) /* remote wakeup enable */
47#define HCCMDSTAT 0x02
48#define HCCMDSTAT_HCR (1 << 0) /* host controller reset */
49#define HCCMDSTAT_SOC (3 << 16) /* scheduling overrun count */
50#define HCINTSTAT 0x03
51#define HCINT_SO (1 << 0) /* scheduling overrun */
52#define HCINT_WDH (1 << 1) /* writeback of done_head */
53#define HCINT_SF (1 << 2) /* start frame */
54#define HCINT_RD (1 << 3) /* resume detect */
55#define HCINT_UE (1 << 4) /* unrecoverable error */
56#define HCINT_FNO (1 << 5) /* frame number overflow */
57#define HCINT_RHSC (1 << 6) /* root hub status change */
58#define HCINT_OC (1 << 30) /* ownership change */
59#define HCINT_MIE (1 << 31) /* master interrupt enable */
60#define HCINTENB 0x04
61#define HCINTDIS 0x05
62#define HCFMINTVL 0x0d
63#define HCFMREM 0x0e
64#define HCFMNUM 0x0f
65#define HCLSTHRESH 0x11
66#define HCRHDESCA 0x12
67#define RH_A_NDP (0x3 << 0) /* # downstream ports */
68#define RH_A_PSM (1 << 8) /* power switching mode */
69#define RH_A_NPS (1 << 9) /* no power switching */
70#define RH_A_DT (1 << 10) /* device type (mbz) */
71#define RH_A_OCPM (1 << 11) /* overcurrent protection
72 mode */
73#define RH_A_NOCP (1 << 12) /* no overcurrent protection */
74#define RH_A_POTPGT (0xff << 24) /* power on -> power good
75 time */
76#define HCRHDESCB 0x13
77#define RH_B_DR (0xffff << 0) /* device removable flags */
78#define RH_B_PPCM (0xffff << 16) /* port power control mask */
79#define HCRHSTATUS 0x14
80#define RH_HS_LPS (1 << 0) /* local power status */
81#define RH_HS_OCI (1 << 1) /* over current indicator */
82#define RH_HS_DRWE (1 << 15) /* device remote wakeup
83 enable */
84#define RH_HS_LPSC (1 << 16) /* local power status change */
85#define RH_HS_OCIC (1 << 17) /* over current indicator
86 change */
87#define RH_HS_CRWE (1 << 31) /* clear remote wakeup
88 enable */
89#define HCRHPORT1 0x15
90#define RH_PS_CCS (1 << 0) /* current connect status */
91#define RH_PS_PES (1 << 1) /* port enable status */
92#define RH_PS_PSS (1 << 2) /* port suspend status */
93#define RH_PS_POCI (1 << 3) /* port over current
94 indicator */
95#define RH_PS_PRS (1 << 4) /* port reset status */
96#define RH_PS_PPS (1 << 8) /* port power status */
97#define RH_PS_LSDA (1 << 9) /* low speed device attached */
98#define RH_PS_CSC (1 << 16) /* connect status change */
99#define RH_PS_PESC (1 << 17) /* port enable status change */
100#define RH_PS_PSSC (1 << 18) /* port suspend status
101 change */
102#define RH_PS_OCIC (1 << 19) /* over current indicator
103 change */
104#define RH_PS_PRSC (1 << 20) /* port reset status change */
105#define HCRHPORT_CLRMASK (0x1f << 16)
106#define HCRHPORT2 0x16
107#define HCHWCFG 0x20
108#define HCHWCFG_15KRSEL (1 << 12)
109#define HCHWCFG_CLKNOTSTOP (1 << 11)
110#define HCHWCFG_ANALOG_OC (1 << 10)
111#define HCHWCFG_DACK_MODE (1 << 8)
112#define HCHWCFG_EOT_POL (1 << 7)
113#define HCHWCFG_DACK_POL (1 << 6)
114#define HCHWCFG_DREQ_POL (1 << 5)
115#define HCHWCFG_DBWIDTH_MASK (0x03 << 3)
116#define HCHWCFG_DBWIDTH(n) (((n) << 3) & HCHWCFG_DBWIDTH_MASK)
117#define HCHWCFG_INT_POL (1 << 2)
118#define HCHWCFG_INT_TRIGGER (1 << 1)
119#define HCHWCFG_INT_ENABLE (1 << 0)
120#define HCDMACFG 0x21
121#define HCDMACFG_BURST_LEN_MASK (0x03 << 5)
122#define HCDMACFG_BURST_LEN(n) (((n) << 5) & HCDMACFG_BURST_LEN_MASK)
123#define HCDMACFG_BURST_LEN_1 HCDMACFG_BURST_LEN(0)
124#define HCDMACFG_BURST_LEN_4 HCDMACFG_BURST_LEN(1)
125#define HCDMACFG_BURST_LEN_8 HCDMACFG_BURST_LEN(2)
126#define HCDMACFG_DMA_ENABLE (1 << 4)
127#define HCDMACFG_BUF_TYPE_MASK (0x07 << 1)
128#define HCDMACFG_CTR_SEL (1 << 2)
129#define HCDMACFG_ITLATL_SEL (1 << 1)
130#define HCDMACFG_DMA_RW_SELECT (1 << 0)
131#define HCXFERCTR 0x22
132#define HCuPINT 0x24
133#define HCuPINT_SOF (1 << 0)
134#define HCuPINT_ATL (1 << 1)
135#define HCuPINT_AIIEOT (1 << 2)
136#define HCuPINT_OPR (1 << 4)
137#define HCuPINT_SUSP (1 << 5)
138#define HCuPINT_CLKRDY (1 << 6)
139#define HCuPINTENB 0x25
140#define HCCHIPID 0x27
141#define HCCHIPID_MASK 0xff00
142#define HCCHIPID_MAGIC 0x6100
143#define HCSCRATCH 0x28
144#define HCSWRES 0x29
145#define HCSWRES_MAGIC 0x00f6
146#define HCITLBUFLEN 0x2a
147#define HCATLBUFLEN 0x2b
148#define HCBUFSTAT 0x2c
149#define HCBUFSTAT_ITL0_FULL (1 << 0)
150#define HCBUFSTAT_ITL1_FULL (1 << 1)
151#define HCBUFSTAT_ATL_FULL (1 << 2)
152#define HCBUFSTAT_ITL0_DONE (1 << 3)
153#define HCBUFSTAT_ITL1_DONE (1 << 4)
154#define HCBUFSTAT_ATL_DONE (1 << 5)
155#define HCRDITL0LEN 0x2d
156#define HCRDITL1LEN 0x2e
157#define HCITLPORT 0x40
158#define HCATLPORT 0x41
159
160/* Philips transfer descriptor */
161struct ptd {
162 u16 count;
163#define PTD_COUNT_MSK (0x3ff << 0)
164#define PTD_TOGGLE_MSK (1 << 10)
165#define PTD_ACTIVE_MSK (1 << 11)
166#define PTD_CC_MSK (0xf << 12)
167 u16 mps;
168#define PTD_MPS_MSK (0x3ff << 0)
169#define PTD_SPD_MSK (1 << 10)
170#define PTD_LAST_MSK (1 << 11)
171#define PTD_EP_MSK (0xf << 12)
172 u16 len;
173#define PTD_LEN_MSK (0x3ff << 0)
174#define PTD_DIR_MSK (3 << 10)
175#define PTD_DIR_SETUP (0)
176#define PTD_DIR_OUT (1)
177#define PTD_DIR_IN (2)
178#define PTD_B5_5_MSK (1 << 13)
179 u16 faddr;
180#define PTD_FA_MSK (0x7f << 0)
181#define PTD_FMT_MSK (1 << 7)
182} __attribute__ ((packed, aligned(2)));
183
184/* PTD accessor macros. */
185#define PTD_GET_COUNT(p) (((p)->count & PTD_COUNT_MSK) >> 0)
186#define PTD_COUNT(v) (((v) << 0) & PTD_COUNT_MSK)
187#define PTD_GET_TOGGLE(p) (((p)->count & PTD_TOGGLE_MSK) >> 10)
188#define PTD_TOGGLE(v) (((v) << 10) & PTD_TOGGLE_MSK)
189#define PTD_GET_ACTIVE(p) (((p)->count & PTD_ACTIVE_MSK) >> 11)
190#define PTD_ACTIVE(v) (((v) << 11) & PTD_ACTIVE_MSK)
191#define PTD_GET_CC(p) (((p)->count & PTD_CC_MSK) >> 12)
192#define PTD_CC(v) (((v) << 12) & PTD_CC_MSK)
193#define PTD_GET_MPS(p) (((p)->mps & PTD_MPS_MSK) >> 0)
194#define PTD_MPS(v) (((v) << 0) & PTD_MPS_MSK)
195#define PTD_GET_SPD(p) (((p)->mps & PTD_SPD_MSK) >> 10)
196#define PTD_SPD(v) (((v) << 10) & PTD_SPD_MSK)
197#define PTD_GET_LAST(p) (((p)->mps & PTD_LAST_MSK) >> 11)
198#define PTD_LAST(v) (((v) << 11) & PTD_LAST_MSK)
199#define PTD_GET_EP(p) (((p)->mps & PTD_EP_MSK) >> 12)
200#define PTD_EP(v) (((v) << 12) & PTD_EP_MSK)
201#define PTD_GET_LEN(p) (((p)->len & PTD_LEN_MSK) >> 0)
202#define PTD_LEN(v) (((v) << 0) & PTD_LEN_MSK)
203#define PTD_GET_DIR(p) (((p)->len & PTD_DIR_MSK) >> 10)
204#define PTD_DIR(v) (((v) << 10) & PTD_DIR_MSK)
205#define PTD_GET_B5_5(p) (((p)->len & PTD_B5_5_MSK) >> 13)
206#define PTD_B5_5(v) (((v) << 13) & PTD_B5_5_MSK)
207#define PTD_GET_FA(p) (((p)->faddr & PTD_FA_MSK) >> 0)
208#define PTD_FA(v) (((v) << 0) & PTD_FA_MSK)
209#define PTD_GET_FMT(p) (((p)->faddr & PTD_FMT_MSK) >> 7)
210#define PTD_FMT(v) (((v) << 7) & PTD_FMT_MSK)
211
212/* Hardware transfer status codes -- CC from ptd->count */
213#define TD_CC_NOERROR 0x00
214#define TD_CC_CRC 0x01
215#define TD_CC_BITSTUFFING 0x02
216#define TD_CC_DATATOGGLEM 0x03
217#define TD_CC_STALL 0x04
218#define TD_DEVNOTRESP 0x05
219#define TD_PIDCHECKFAIL 0x06
220#define TD_UNEXPECTEDPID 0x07
221#define TD_DATAOVERRUN 0x08
222#define TD_DATAUNDERRUN 0x09
223 /* 0x0A, 0x0B reserved for hardware */
224#define TD_BUFFEROVERRUN 0x0C
225#define TD_BUFFERUNDERRUN 0x0D
226 /* 0x0E, 0x0F reserved for HCD */
227#define TD_NOTACCESSED 0x0F
228
229/* map PTD status codes (CC) to errno values */
230static const int cc_to_error[16] = {
231 /* No Error */ 0,
232 /* CRC Error */ -EILSEQ,
233 /* Bit Stuff */ -EPROTO,
234 /* Data Togg */ -EILSEQ,
235 /* Stall */ -EPIPE,
236 /* DevNotResp */ -ETIMEDOUT,
237 /* PIDCheck */ -EPROTO,
238 /* UnExpPID */ -EPROTO,
239 /* DataOver */ -EOVERFLOW,
240 /* DataUnder */ -EREMOTEIO,
241 /* (for hw) */ -EIO,
242 /* (for hw) */ -EIO,
243 /* BufferOver */ -ECOMM,
244 /* BuffUnder */ -ENOSR,
245 /* (for HCD) */ -EALREADY,
246 /* (for HCD) */ -EALREADY
247};
248
249/*--------------------------------------------------------------*/
250
251#define LOG2_PERIODIC_SIZE 5 /* arbitrary; this matches OHCI */
252#define PERIODIC_SIZE (1 << LOG2_PERIODIC_SIZE)
253
254struct isp116x {
255 spinlock_t lock;
256 struct work_struct rh_resume;
257
258 void __iomem *addr_reg;
259 void __iomem *data_reg;
260
261 struct isp116x_platform_data *board;
262
263 struct proc_dir_entry *pde;
264 unsigned long stat1, stat2, stat4, stat8, stat16;
265
266 /* HC registers */
267 u32 intenb; /* "OHCI" interrupts */
268 u16 irqenb; /* uP interrupts */
269
270 /* Root hub registers */
271 u32 rhdesca;
272 u32 rhdescb;
273 u32 rhstatus;
274 u32 rhport[2];
275
276 /* async schedule: control, bulk */
277 struct list_head async;
278
279 /* periodic schedule: int */
280 u16 load[PERIODIC_SIZE];
281 struct isp116x_ep *periodic[PERIODIC_SIZE];
282 unsigned periodic_count;
283 u16 fmindex;
284
285 /* Schedule for the current frame */
286 struct isp116x_ep *atl_active;
287 int atl_buflen;
288 int atl_bufshrt;
289 int atl_last_dir;
290 atomic_t atl_finishing;
291};
292
293static inline struct isp116x *hcd_to_isp116x(struct usb_hcd *hcd)
294{
295 return (struct isp116x *)(hcd->hcd_priv);
296}
297
298static inline struct usb_hcd *isp116x_to_hcd(struct isp116x *isp116x)
299{
300 return container_of((void *)isp116x, struct usb_hcd, hcd_priv);
301}
302
303struct isp116x_ep {
304 struct usb_host_endpoint *hep;
305 struct usb_device *udev;
306 struct ptd ptd;
307
308 u8 maxpacket;
309 u8 epnum;
310 u8 nextpid;
311 u16 error_count;
312 u16 length; /* of current packet */
313 unsigned char *data; /* to databuf */
314 /* queue of active EP's (the ones scheduled for the
315 current frame) */
316 struct isp116x_ep *active;
317
318 /* periodic schedule */
319 u16 period;
320 u16 branch;
321 u16 load;
322 struct isp116x_ep *next;
323
324 /* async schedule */
325 struct list_head schedule;
326};
327
328/*-------------------------------------------------------------------------*/
329
330#ifdef DEBUG
331#define DBG(stuff...) printk(KERN_DEBUG "116x: " stuff)
332#else
333#define DBG(stuff...) do{}while(0)
334#endif
335
336#ifdef VERBOSE
337# define VDBG DBG
338#else
339# define VDBG(stuff...) do{}while(0)
340#endif
341
342#define ERR(stuff...) printk(KERN_ERR "116x: " stuff)
343#define WARN(stuff...) printk(KERN_WARNING "116x: " stuff)
344#define INFO(stuff...) printk(KERN_INFO "116x: " stuff)
345
346/* ------------------------------------------------- */
347
348#if defined(USE_PLATFORM_DELAY)
349#if defined(USE_NDELAY)
350#error USE_PLATFORM_DELAY and USE_NDELAY simultaneously defined.
351#endif
352#define isp116x_delay(h,d) (h)->board->delay( \
353 isp116x_to_hcd(h)->self.controller,d)
354#define isp116x_check_platform_delay(h) ((h)->board->delay == NULL)
355#elif defined(USE_NDELAY)
356#define isp116x_delay(h,d) ndelay(d)
357#define isp116x_check_platform_delay(h) 0
358#else
359#define isp116x_delay(h,d) do{}while(0)
360#define isp116x_check_platform_delay(h) 0
361#endif
362
363#if defined(DEBUG)
364#define IRQ_TEST() BUG_ON(!irqs_disabled())
365#else
366#define IRQ_TEST() do{}while(0)
367#endif
368
369static inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg)
370{
371 IRQ_TEST();
372 writew(reg & 0xff, isp116x->addr_reg);
373 isp116x_delay(isp116x, 300);
374}
375
376static inline void isp116x_write_data16(struct isp116x *isp116x, u16 val)
377{
378 writew(val, isp116x->data_reg);
379 isp116x_delay(isp116x, 150);
380}
381
382static inline void isp116x_raw_write_data16(struct isp116x *isp116x, u16 val)
383{
384 __raw_writew(val, isp116x->data_reg);
385 isp116x_delay(isp116x, 150);
386}
387
388static inline u16 isp116x_read_data16(struct isp116x *isp116x)
389{
390 u16 val;
391
392 val = readw(isp116x->data_reg);
393 isp116x_delay(isp116x, 150);
394 return val;
395}
396
397static inline u16 isp116x_raw_read_data16(struct isp116x *isp116x)
398{
399 u16 val;
400
401 val = __raw_readw(isp116x->data_reg);
402 isp116x_delay(isp116x, 150);
403 return val;
404}
405
406static inline void isp116x_write_data32(struct isp116x *isp116x, u32 val)
407{
408 writew(val & 0xffff, isp116x->data_reg);
409 isp116x_delay(isp116x, 150);
410 writew(val >> 16, isp116x->data_reg);
411 isp116x_delay(isp116x, 150);
412}
413
414static inline u32 isp116x_read_data32(struct isp116x *isp116x)
415{
416 u32 val;
417
418 val = (u32) readw(isp116x->data_reg);
419 isp116x_delay(isp116x, 150);
420 val |= ((u32) readw(isp116x->data_reg)) << 16;
421 isp116x_delay(isp116x, 150);
422 return val;
423}
424
425/* Let's keep register access functions out of line. Hint:
426 we wait at least 150 ns at every access.
427*/
428static u16 isp116x_read_reg16(struct isp116x *isp116x, unsigned reg)
429{
430 isp116x_write_addr(isp116x, reg);
431 return isp116x_read_data16(isp116x);
432}
433
434static u32 isp116x_read_reg32(struct isp116x *isp116x, unsigned reg)
435{
436 isp116x_write_addr(isp116x, reg);
437 return isp116x_read_data32(isp116x);
438}
439
440static void isp116x_write_reg16(struct isp116x *isp116x, unsigned reg,
441 unsigned val)
442{
443 isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET);
444 isp116x_write_data16(isp116x, (u16) (val & 0xffff));
445}
446
447static void isp116x_write_reg32(struct isp116x *isp116x, unsigned reg,
448 unsigned val)
449{
450 isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET);
451 isp116x_write_data32(isp116x, (u32) val);
452}
453
454#define isp116x_show_reg(d,r) { \
455 if ((r) < 0x20) { \
456 DBG("%-12s[%02x]: %08x\n", #r, \
457 r, isp116x_read_reg32(d, r)); \
458 } else { \
459 DBG("%-12s[%02x]: %04x\n", #r, \
460 r, isp116x_read_reg16(d, r)); \
461 } \
462}
463
464static inline void isp116x_show_regs(struct isp116x *isp116x)
465{
466 isp116x_show_reg(isp116x, HCREVISION);
467 isp116x_show_reg(isp116x, HCCONTROL);
468 isp116x_show_reg(isp116x, HCCMDSTAT);
469 isp116x_show_reg(isp116x, HCINTSTAT);
470 isp116x_show_reg(isp116x, HCINTENB);
471 isp116x_show_reg(isp116x, HCFMINTVL);
472 isp116x_show_reg(isp116x, HCFMREM);
473 isp116x_show_reg(isp116x, HCFMNUM);
474 isp116x_show_reg(isp116x, HCLSTHRESH);
475 isp116x_show_reg(isp116x, HCRHDESCA);
476 isp116x_show_reg(isp116x, HCRHDESCB);
477 isp116x_show_reg(isp116x, HCRHSTATUS);
478 isp116x_show_reg(isp116x, HCRHPORT1);
479 isp116x_show_reg(isp116x, HCRHPORT2);
480 isp116x_show_reg(isp116x, HCHWCFG);
481 isp116x_show_reg(isp116x, HCDMACFG);
482 isp116x_show_reg(isp116x, HCXFERCTR);
483 isp116x_show_reg(isp116x, HCuPINT);
484 isp116x_show_reg(isp116x, HCuPINTENB);
485 isp116x_show_reg(isp116x, HCCHIPID);
486 isp116x_show_reg(isp116x, HCSCRATCH);
487 isp116x_show_reg(isp116x, HCITLBUFLEN);
488 isp116x_show_reg(isp116x, HCATLBUFLEN);
489 isp116x_show_reg(isp116x, HCBUFSTAT);
490 isp116x_show_reg(isp116x, HCRDITL0LEN);
491 isp116x_show_reg(isp116x, HCRDITL1LEN);
492}
493
494#if defined(URB_TRACE)
495
496#define PIPETYPE(pipe) ({ char *__s; \
497 if (usb_pipecontrol(pipe)) __s = "ctrl"; \
498 else if (usb_pipeint(pipe)) __s = "int"; \
499 else if (usb_pipebulk(pipe)) __s = "bulk"; \
500 else __s = "iso"; \
501 __s;})
502#define PIPEDIR(pipe) ({ usb_pipein(pipe) ? "in" : "out"; })
503#define URB_NOTSHORT(urb) ({ (urb)->transfer_flags & URB_SHORT_NOT_OK ? \
504 "short_not_ok" : ""; })
505
506/* print debug info about the URB */
507static void urb_dbg(struct urb *urb, char *msg)
508{
509 unsigned int pipe;
510
511 if (!urb) {
512 DBG("%s: zero urb\n", msg);
513 return;
514 }
515 pipe = urb->pipe;
516 DBG("%s: FA %d ep%d%s %s: len %d/%d %s\n", msg,
517 usb_pipedevice(pipe), usb_pipeendpoint(pipe),
518 PIPEDIR(pipe), PIPETYPE(pipe),
519 urb->transfer_buffer_length, urb->actual_length, URB_NOTSHORT(urb));
520}
521
522#else
523
524#define urb_dbg(urb,msg) do{}while(0)
525
526#endif /* ! defined(URB_TRACE) */
527
528#if defined(PTD_TRACE)
529
530#define PTD_DIR_STR(ptd) ({char __c; \
531 switch(PTD_GET_DIR(ptd)){ \
532 case 0: __c = 's'; break; \
533 case 1: __c = 'o'; break; \
534 default: __c = 'i'; break; \
535 }; __c;})
536
537/*
538 Dump PTD info. The code documents the format
539 perfectly, right :)
540*/
541static inline void dump_ptd(struct ptd *ptd)
542{
543 printk("td: %x %d%c%d %d,%d,%d %x %x%x%x\n",
544 PTD_GET_CC(ptd), PTD_GET_FA(ptd),
545 PTD_DIR_STR(ptd), PTD_GET_EP(ptd),
546 PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
547 PTD_GET_TOGGLE(ptd), PTD_GET_ACTIVE(ptd),
548 PTD_GET_SPD(ptd), PTD_GET_LAST(ptd));
549}
550
551static inline void dump_ptd_out_data(struct ptd *ptd, u8 * buf)
552{
553 int k;
554
555 if (PTD_GET_DIR(ptd) != PTD_DIR_IN && PTD_GET_LEN(ptd)) {
556 printk("-> ");
557 for (k = 0; k < PTD_GET_LEN(ptd); ++k)
558 printk("%02x ", ((u8 *) buf)[k]);
559 printk("\n");
560 }
561}
562
563static inline void dump_ptd_in_data(struct ptd *ptd, u8 * buf)
564{
565 int k;
566
567 if (PTD_GET_DIR(ptd) == PTD_DIR_IN && PTD_GET_COUNT(ptd)) {
568 printk("<- ");
569 for (k = 0; k < PTD_GET_COUNT(ptd); ++k)
570 printk("%02x ", ((u8 *) buf)[k]);
571 printk("\n");
572 }
573 if (PTD_GET_LAST(ptd))
574 printk("-\n");
575}
576
577#else
578
579#define dump_ptd(ptd) do{}while(0)
580#define dump_ptd_in_data(ptd,buf) do{}while(0)
581#define dump_ptd_out_data(ptd,buf) do{}while(0)
582
583#endif /* ! defined(PTD_TRACE) */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 23:25:14 -0500