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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-27 18:13:26 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-27 18:13:26 -0400
commitd3b8a1a8496c83bc4a3cc76505c29255af15572c (patch)
treeb56eb3ef27117bad5c516d6b647bdcd465d7659a /drivers/usb/host
parent60564a313a5738960064d6c555ec066d9332f278 (diff)
parent0ed0c0c48c508578c30aa58f755ca0d692636906 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/usb-2.6
Diffstat (limited to 'drivers/usb/host')
-rw-r--r--drivers/usb/host/Kconfig13
-rw-r--r--drivers/usb/host/Makefile1
-rw-r--r--drivers/usb/host/ehci-dbg.c59
-rw-r--r--drivers/usb/host/ehci-hcd.c58
-rw-r--r--drivers/usb/host/ehci-hub.c2
-rw-r--r--drivers/usb/host/ehci-q.c2
-rw-r--r--drivers/usb/host/ehci-sched.c17
-rw-r--r--drivers/usb/host/isp116x-hcd.c1875
-rw-r--r--drivers/usb/host/isp116x.h583
-rw-r--r--drivers/usb/host/ohci-hcd.c58
-rw-r--r--drivers/usb/host/ohci-mem.c1
-rw-r--r--drivers/usb/host/ohci-omap.c4
-rw-r--r--drivers/usb/host/ohci.h2
-rw-r--r--drivers/usb/host/sl811-hcd.c18
-rw-r--r--drivers/usb/host/uhci-debug.c32
-rw-r--r--drivers/usb/host/uhci-hcd.c773
-rw-r--r--drivers/usb/host/uhci-hcd.h59
-rw-r--r--drivers/usb/host/uhci-hub.c83
-rw-r--r--drivers/usb/host/uhci-q.c58
19 files changed, 3193 insertions, 505 deletions
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 19e598c9641f..ed1899d307db 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -49,6 +49,19 @@ config USB_EHCI_ROOT_HUB_TT
49 49
50 This supports the EHCI implementation from TransDimension Inc. 50 This supports the EHCI implementation from TransDimension Inc.
51 51
52config USB_ISP116X_HCD
53 tristate "ISP116X HCD support"
54 depends on USB
55 default N
56 ---help---
57 The ISP1160 and ISP1161 chips are USB host controllers. Enable this
58 option if your board has this chip. If unsure, say N.
59
60 This driver does not support isochronous transfers.
61
62 To compile this driver as a module, choose M here: the
63 module will be called isp116x-hcd.
64
52config USB_OHCI_HCD 65config USB_OHCI_HCD
53 tristate "OHCI HCD support" 66 tristate "OHCI HCD support"
54 depends on USB && USB_ARCH_HAS_OHCI 67 depends on USB && USB_ARCH_HAS_OHCI
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 5dbd3e7a27c7..350d14fc1cc9 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -4,6 +4,7 @@
4# 4#
5 5
6obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o 6obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
7obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
7obj-$(CONFIG_USB_OHCI_HCD) += ohci-hcd.o 8obj-$(CONFIG_USB_OHCI_HCD) += ohci-hcd.o
8obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o 9obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o
9obj-$(CONFIG_USB_SL811_HCD) += sl811-hcd.o 10obj-$(CONFIG_USB_SL811_HCD) += sl811-hcd.o
diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c
index 2ff11d53567b..50cb01831075 100644
--- a/drivers/usb/host/ehci-dbg.c
+++ b/drivers/usb/host/ehci-dbg.c
@@ -254,7 +254,7 @@ dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
254 } 254 }
255 255
256 return scnprintf (buf, len, 256 return scnprintf (buf, len,
257 "%s%sport %d status %06x%s%s sig=%s %s%s%s%s%s%s%s%s%s", 257 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
258 label, label [0] ? " " : "", port, status, 258 label, label [0] ? " " : "", port, status,
259 (status & PORT_POWER) ? " POWER" : "", 259 (status & PORT_POWER) ? " POWER" : "",
260 (status & PORT_OWNER) ? " OWNER" : "", 260 (status & PORT_OWNER) ? " OWNER" : "",
@@ -644,9 +644,11 @@ show_registers (struct class_device *class_dev, char *buf)
644 if (bus->controller->power.power_state) { 644 if (bus->controller->power.power_state) {
645 size = scnprintf (next, size, 645 size = scnprintf (next, size,
646 "bus %s, device %s (driver " DRIVER_VERSION ")\n" 646 "bus %s, device %s (driver " DRIVER_VERSION ")\n"
647 "%s\n"
647 "SUSPENDED (no register access)\n", 648 "SUSPENDED (no register access)\n",
648 hcd->self.controller->bus->name, 649 hcd->self.controller->bus->name,
649 hcd->self.controller->bus_id); 650 hcd->self.controller->bus_id,
651 hcd->product_desc);
650 goto done; 652 goto done;
651 } 653 }
652 654
@@ -654,13 +656,53 @@ show_registers (struct class_device *class_dev, char *buf)
654 i = HC_VERSION(readl (&ehci->caps->hc_capbase)); 656 i = HC_VERSION(readl (&ehci->caps->hc_capbase));
655 temp = scnprintf (next, size, 657 temp = scnprintf (next, size,
656 "bus %s, device %s (driver " DRIVER_VERSION ")\n" 658 "bus %s, device %s (driver " DRIVER_VERSION ")\n"
659 "%s\n"
657 "EHCI %x.%02x, hcd state %d\n", 660 "EHCI %x.%02x, hcd state %d\n",
658 hcd->self.controller->bus->name, 661 hcd->self.controller->bus->name,
659 hcd->self.controller->bus_id, 662 hcd->self.controller->bus_id,
663 hcd->product_desc,
660 i >> 8, i & 0x0ff, hcd->state); 664 i >> 8, i & 0x0ff, hcd->state);
661 size -= temp; 665 size -= temp;
662 next += temp; 666 next += temp;
663 667
668#ifdef CONFIG_PCI
669 /* EHCI 0.96 and later may have "extended capabilities" */
670 if (hcd->self.controller->bus == &pci_bus_type) {
671 struct pci_dev *pdev;
672 u32 offset, cap, cap2;
673 unsigned count = 256/4;
674
675 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
676 offset = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
677 while (offset && count--) {
678 pci_read_config_dword (pdev, offset, &cap);
679 switch (cap & 0xff) {
680 case 1:
681 temp = scnprintf (next, size,
682 "ownership %08x%s%s\n", cap,
683 (cap & (1 << 24)) ? " linux" : "",
684 (cap & (1 << 16)) ? " firmware" : "");
685 size -= temp;
686 next += temp;
687
688 offset += 4;
689 pci_read_config_dword (pdev, offset, &cap2);
690 temp = scnprintf (next, size,
691 "SMI sts/enable 0x%08x\n", cap2);
692 size -= temp;
693 next += temp;
694 break;
695 case 0: /* illegal reserved capability */
696 cap = 0;
697 /* FALLTHROUGH */
698 default: /* unknown */
699 break;
700 }
701 temp = (cap >> 8) & 0xff;
702 }
703 }
704#endif
705
664 // FIXME interpret both types of params 706 // FIXME interpret both types of params
665 i = readl (&ehci->caps->hcs_params); 707 i = readl (&ehci->caps->hcs_params);
666 temp = scnprintf (next, size, "structural params 0x%08x\n", i); 708 temp = scnprintf (next, size, "structural params 0x%08x\n", i);
@@ -696,12 +738,19 @@ show_registers (struct class_device *class_dev, char *buf)
696 size -= temp; 738 size -= temp;
697 next += temp; 739 next += temp;
698 740
699 for (i = 0; i < HCS_N_PORTS (ehci->hcs_params); i++) { 741 for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
700 temp = dbg_port_buf (scratch, sizeof scratch, label, i + 1, 742 temp = dbg_port_buf (scratch, sizeof scratch, label, i,
701 readl (&ehci->regs->port_status [i])); 743 readl (&ehci->regs->port_status [i - 1]));
702 temp = scnprintf (next, size, fmt, temp, scratch); 744 temp = scnprintf (next, size, fmt, temp, scratch);
703 size -= temp; 745 size -= temp;
704 next += temp; 746 next += temp;
747 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
748 temp = scnprintf (next, size,
749 " debug control %08x\n",
750 readl (&ehci->debug->control));
751 size -= temp;
752 next += temp;
753 }
705 } 754 }
706 755
707 if (ehci->reclaim) { 756 if (ehci->reclaim) {
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index bc69bd7acebe..35248a37b717 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -304,30 +304,31 @@ static void ehci_watchdog (unsigned long param)
304 */ 304 */
305static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) 305static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
306{ 306{
307 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
308
309 /* always say Linux will own the hardware */
310 pci_write_config_byte(pdev, where + 3, 1);
311
312 /* maybe wait a while for BIOS to respond */
307 if (cap & (1 << 16)) { 313 if (cap & (1 << 16)) {
308 int msec = 5000; 314 int msec = 5000;
309 struct pci_dev *pdev =
310 to_pci_dev(ehci_to_hcd(ehci)->self.controller);
311 315
312 /* request handoff to OS */
313 cap |= 1 << 24;
314 pci_write_config_dword(pdev, where, cap);
315
316 /* and wait a while for it to happen */
317 do { 316 do {
318 msleep(10); 317 msleep(10);
319 msec -= 10; 318 msec -= 10;
320 pci_read_config_dword(pdev, where, &cap); 319 pci_read_config_dword(pdev, where, &cap);
321 } while ((cap & (1 << 16)) && msec); 320 } while ((cap & (1 << 16)) && msec);
322 if (cap & (1 << 16)) { 321 if (cap & (1 << 16)) {
323 ehci_err (ehci, "BIOS handoff failed (%d, %04x)\n", 322 ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n",
324 where, cap); 323 where, cap);
325 // some BIOS versions seem buggy... 324 // some BIOS versions seem buggy...
326 // return 1; 325 // return 1;
327 ehci_warn (ehci, "continuing after BIOS bug...\n"); 326 ehci_warn (ehci, "continuing after BIOS bug...\n");
328 return 0; 327 /* disable all SMIs, and clear "BIOS owns" flag */
329 } 328 pci_write_config_dword(pdev, where + 4, 0);
330 ehci_dbg (ehci, "BIOS handoff succeeded\n"); 329 pci_write_config_byte(pdev, where + 2, 0);
330 } else
331 ehci_dbg(ehci, "BIOS handoff succeeded\n");
331 } 332 }
332 return 0; 333 return 0;
333} 334}
@@ -492,8 +493,6 @@ static int ehci_start (struct usb_hcd *hcd)
492{ 493{
493 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 494 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
494 u32 temp; 495 u32 temp;
495 struct usb_device *udev;
496 struct usb_bus *bus;
497 int retval; 496 int retval;
498 u32 hcc_params; 497 u32 hcc_params;
499 u8 sbrn = 0; 498 u8 sbrn = 0;
@@ -588,8 +587,8 @@ static int ehci_start (struct usb_hcd *hcd)
588 writel (0, &ehci->regs->segment); 587 writel (0, &ehci->regs->segment);
589#if 0 588#if 0
590// this is deeply broken on almost all architectures 589// this is deeply broken on almost all architectures
591 if (!pci_set_dma_mask (to_pci_dev(hcd->self.controller), 0xffffffffffffffffULL)) 590 if (!dma_set_mask (hcd->self.controller, DMA_64BIT_MASK))
592 ehci_info (ehci, "enabled 64bit PCI DMA\n"); 591 ehci_info (ehci, "enabled 64bit DMA\n");
593#endif 592#endif
594 } 593 }
595 594
@@ -631,17 +630,6 @@ static int ehci_start (struct usb_hcd *hcd)
631 630
632 /* set async sleep time = 10 us ... ? */ 631 /* set async sleep time = 10 us ... ? */
633 632
634 /* wire up the root hub */
635 bus = hcd_to_bus (hcd);
636 udev = first ? usb_alloc_dev (NULL, bus, 0) : bus->root_hub;
637 if (!udev) {
638done2:
639 ehci_mem_cleanup (ehci);
640 return -ENOMEM;
641 }
642 udev->speed = USB_SPEED_HIGH;
643 udev->state = first ? USB_STATE_ATTACHED : USB_STATE_CONFIGURED;
644
645 /* 633 /*
646 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices 634 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
647 * are explicitly handed to companion controller(s), so no TT is 635 * are explicitly handed to companion controller(s), so no TT is
@@ -664,24 +652,6 @@ done2:
664 first ? "initialized" : "restarted", 652 first ? "initialized" : "restarted",
665 temp >> 8, temp & 0xff, DRIVER_VERSION); 653 temp >> 8, temp & 0xff, DRIVER_VERSION);
666 654
667 /*
668 * From here on, khubd concurrently accesses the root
669 * hub; drivers will be talking to enumerated devices.
670 * (On restart paths, khubd already knows about the root
671 * hub and could find work as soon as we wrote FLAG_CF.)
672 *
673 * Before this point the HC was idle/ready. After, khubd
674 * and device drivers may start it running.
675 */
676 if (first && usb_hcd_register_root_hub (udev, hcd) != 0) {
677 if (hcd->state == HC_STATE_RUNNING)
678 ehci_quiesce (ehci);
679 ehci_reset (ehci);
680 usb_put_dev (udev);
681 retval = -ENODEV;
682 goto done2;
683 }
684
685 writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */ 655 writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */
686 656
687 if (first) 657 if (first)
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index d7b4f7939ded..36cc1f2218d5 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2001-2002 by David Brownell 2 * Copyright (C) 2001-2004 by David Brownell
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the 5 * under the terms of the GNU General Public License as published by the
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index 7df9b9af54f6..45d89a7083b1 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2001-2002 by David Brownell 2 * Copyright (C) 2001-2004 by David Brownell
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the 5 * under the terms of the GNU General Public License as published by the
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
index 2fa1ffee5ff3..c2104cad4033 100644
--- a/drivers/usb/host/ehci-sched.c
+++ b/drivers/usb/host/ehci-sched.c
@@ -637,9 +637,8 @@ iso_stream_alloc (int mem_flags)
637{ 637{
638 struct ehci_iso_stream *stream; 638 struct ehci_iso_stream *stream;
639 639
640 stream = kmalloc(sizeof *stream, mem_flags); 640 stream = kcalloc(1, sizeof *stream, mem_flags);
641 if (likely (stream != NULL)) { 641 if (likely (stream != NULL)) {
642 memset (stream, 0, sizeof(*stream));
643 INIT_LIST_HEAD(&stream->td_list); 642 INIT_LIST_HEAD(&stream->td_list);
644 INIT_LIST_HEAD(&stream->free_list); 643 INIT_LIST_HEAD(&stream->free_list);
645 stream->next_uframe = -1; 644 stream->next_uframe = -1;
@@ -894,7 +893,7 @@ itd_sched_init (
894 trans |= length << 16; 893 trans |= length << 16;
895 uframe->transaction = cpu_to_le32 (trans); 894 uframe->transaction = cpu_to_le32 (trans);
896 895
897 /* might need to cross a buffer page within a td */ 896 /* might need to cross a buffer page within a uframe */
898 uframe->bufp = (buf & ~(u64)0x0fff); 897 uframe->bufp = (buf & ~(u64)0x0fff);
899 buf += length; 898 buf += length;
900 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff)))) 899 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
@@ -1194,6 +1193,7 @@ itd_init (struct ehci_iso_stream *stream, struct ehci_itd *itd)
1194{ 1193{
1195 int i; 1194 int i;
1196 1195
1196 /* it's been recently zeroed */
1197 itd->hw_next = EHCI_LIST_END; 1197 itd->hw_next = EHCI_LIST_END;
1198 itd->hw_bufp [0] = stream->buf0; 1198 itd->hw_bufp [0] = stream->buf0;
1199 itd->hw_bufp [1] = stream->buf1; 1199 itd->hw_bufp [1] = stream->buf1;
@@ -1210,8 +1210,7 @@ itd_patch (
1210 struct ehci_itd *itd, 1210 struct ehci_itd *itd,
1211 struct ehci_iso_sched *iso_sched, 1211 struct ehci_iso_sched *iso_sched,
1212 unsigned index, 1212 unsigned index,
1213 u16 uframe, 1213 u16 uframe
1214 int first
1215) 1214)
1216{ 1215{
1217 struct ehci_iso_packet *uf = &iso_sched->packet [index]; 1216 struct ehci_iso_packet *uf = &iso_sched->packet [index];
@@ -1228,7 +1227,7 @@ itd_patch (
1228 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(uf->bufp >> 32)); 1227 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(uf->bufp >> 32));
1229 1228
1230 /* iso_frame_desc[].offset must be strictly increasing */ 1229 /* iso_frame_desc[].offset must be strictly increasing */
1231 if (unlikely (!first && uf->cross)) { 1230 if (unlikely (uf->cross)) {
1232 u64 bufp = uf->bufp + 4096; 1231 u64 bufp = uf->bufp + 4096;
1233 itd->pg = ++pg; 1232 itd->pg = ++pg;
1234 itd->hw_bufp [pg] |= cpu_to_le32 (bufp & ~(u32)0); 1233 itd->hw_bufp [pg] |= cpu_to_le32 (bufp & ~(u32)0);
@@ -1257,7 +1256,7 @@ itd_link_urb (
1257 struct ehci_iso_stream *stream 1256 struct ehci_iso_stream *stream
1258) 1257)
1259{ 1258{
1260 int packet, first = 1; 1259 int packet;
1261 unsigned next_uframe, uframe, frame; 1260 unsigned next_uframe, uframe, frame;
1262 struct ehci_iso_sched *iso_sched = urb->hcpriv; 1261 struct ehci_iso_sched *iso_sched = urb->hcpriv;
1263 struct ehci_itd *itd; 1262 struct ehci_itd *itd;
@@ -1290,7 +1289,6 @@ itd_link_urb (
1290 list_move_tail (&itd->itd_list, &stream->td_list); 1289 list_move_tail (&itd->itd_list, &stream->td_list);
1291 itd->stream = iso_stream_get (stream); 1290 itd->stream = iso_stream_get (stream);
1292 itd->urb = usb_get_urb (urb); 1291 itd->urb = usb_get_urb (urb);
1293 first = 1;
1294 itd_init (stream, itd); 1292 itd_init (stream, itd);
1295 } 1293 }
1296 1294
@@ -1298,8 +1296,7 @@ itd_link_urb (
1298 frame = next_uframe >> 3; 1296 frame = next_uframe >> 3;
1299 1297
1300 itd->usecs [uframe] = stream->usecs; 1298 itd->usecs [uframe] = stream->usecs;
1301 itd_patch (itd, iso_sched, packet, uframe, first); 1299 itd_patch (itd, iso_sched, packet, uframe);
1302 first = 0;
1303 1300
1304 next_uframe += stream->interval; 1301 next_uframe += stream->interval;
1305 stream->depth += stream->interval; 1302 stream->depth += stream->interval;
diff --git a/drivers/usb/host/isp116x-hcd.c b/drivers/usb/host/isp116x-hcd.c
new file mode 100644
index 000000000000..ff0a168e8eed
--- /dev/null
+++ b/drivers/usb/host/isp116x-hcd.c
@@ -0,0 +1,1875 @@
1/*
2 * ISP116x HCD (Host Controller Driver) for USB.
3 *
4 * Derived from the SL811 HCD, rewritten for ISP116x.
5 * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
6 *
7 * Portions:
8 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
9 * Copyright (C) 2004 David Brownell
10 *
11 * Periodic scheduling is based on Roman's OHCI code
12 * Copyright (C) 1999 Roman Weissgaerber
13 *
14 */
15
16/*
17 * The driver basically works. A number of people have used it with a range
18 * of devices.
19 *
20 *The driver passes all usbtests 1-14.
21 *
22 * Suspending/resuming of root hub via sysfs works. Remote wakeup works too.
23 * And suspending/resuming of platform device works too. Suspend/resume
24 * via HCD operations vector is not implemented.
25 *
26 * Iso transfer support is not implemented. Adding this would include
27 * implementing recovery from the failure to service the processed ITL
28 * fifo ram in time, which will involve chip reset.
29 *
30 * TODO:
31 + More testing of suspend/resume.
32*/
33
34/*
35 ISP116x chips require certain delays between accesses to its
36 registers. The following timing options exist.
37
38 1. Configure your memory controller (the best)
39 2. Implement platform-specific delay function possibly
40 combined with configuring the memory controller; see
41 include/linux/usb-isp116x.h for more info. Some broken
42 memory controllers line LH7A400 SMC need this. Also,
43 uncomment for that to work the following
44 USE_PLATFORM_DELAY macro.
45 3. Use ndelay (easiest, poorest). For that, uncomment
46 the following USE_NDELAY macro.
47*/
48#define USE_PLATFORM_DELAY
49//#define USE_NDELAY
50
51//#define DEBUG
52//#define VERBOSE
53/* Transfer descriptors. See dump_ptd() for printout format */
54//#define PTD_TRACE
55/* enqueuing/finishing log of urbs */
56//#define URB_TRACE
57
58#include <linux/config.h>
59#include <linux/module.h>
60#include <linux/moduleparam.h>
61#include <linux/kernel.h>
62#include <linux/delay.h>
63#include <linux/ioport.h>
64#include <linux/sched.h>
65#include <linux/slab.h>
66#include <linux/smp_lock.h>
67#include <linux/errno.h>
68#include <linux/init.h>
69#include <linux/list.h>
70#include <linux/interrupt.h>
71#include <linux/usb.h>
72#include <linux/usb_isp116x.h>
73
74#include <asm/io.h>
75#include <asm/irq.h>
76#include <asm/system.h>
77#include <asm/byteorder.h>
78
79#ifndef DEBUG
80# define STUB_DEBUG_FILE
81#endif
82
83#include "../core/hcd.h"
84#include "isp116x.h"
85
86#define DRIVER_VERSION "08 Apr 2005"
87#define DRIVER_DESC "ISP116x USB Host Controller Driver"
88
89MODULE_DESCRIPTION(DRIVER_DESC);
90MODULE_LICENSE("GPL");
91
92static const char hcd_name[] = "isp116x-hcd";
93
94/*-----------------------------------------------------------------*/
95
96/*
97 Write len bytes to fifo, pad till 32-bit boundary
98 */
99static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
100{
101 u8 *dp = (u8 *) buf;
102 u16 *dp2 = (u16 *) buf;
103 u16 w;
104 int quot = len % 4;
105
106 if ((unsigned long)dp2 & 1) {
107 /* not aligned */
108 for (; len > 1; len -= 2) {
109 w = *dp++;
110 w |= *dp++ << 8;
111 isp116x_raw_write_data16(isp116x, w);
112 }
113 if (len)
114 isp116x_write_data16(isp116x, (u16) * dp);
115 } else {
116 /* aligned */
117 for (; len > 1; len -= 2)
118 isp116x_raw_write_data16(isp116x, *dp2++);
119 if (len)
120 isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
121 }
122 if (quot == 1 || quot == 2)
123 isp116x_raw_write_data16(isp116x, 0);
124}
125
126/*
127 Read len bytes from fifo and then read till 32-bit boundary.
128 */
129static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
130{
131 u8 *dp = (u8 *) buf;
132 u16 *dp2 = (u16 *) buf;
133 u16 w;
134 int quot = len % 4;
135
136 if ((unsigned long)dp2 & 1) {
137 /* not aligned */
138 for (; len > 1; len -= 2) {
139 w = isp116x_raw_read_data16(isp116x);
140 *dp++ = w & 0xff;
141 *dp++ = (w >> 8) & 0xff;
142 }
143 if (len)
144 *dp = 0xff & isp116x_read_data16(isp116x);
145 } else {
146 /* aligned */
147 for (; len > 1; len -= 2)
148 *dp2++ = isp116x_raw_read_data16(isp116x);
149 if (len)
150 *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
151 }
152 if (quot == 1 || quot == 2)
153 isp116x_raw_read_data16(isp116x);
154}
155
156/*
157 Write ptd's and data for scheduled transfers into
158 the fifo ram. Fifo must be empty and ready.
159*/
160static void pack_fifo(struct isp116x *isp116x)
161{
162 struct isp116x_ep *ep;
163 struct ptd *ptd;
164 int buflen = isp116x->atl_last_dir == PTD_DIR_IN
165 ? isp116x->atl_bufshrt : isp116x->atl_buflen;
166 int ptd_count = 0;
167
168 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
169 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
170 isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
171 for (ep = isp116x->atl_active; ep; ep = ep->active) {
172 ++ptd_count;
173 ptd = &ep->ptd;
174 dump_ptd(ptd);
175 dump_ptd_out_data(ptd, ep->data);
176 isp116x_write_data16(isp116x, ptd->count);
177 isp116x_write_data16(isp116x, ptd->mps);
178 isp116x_write_data16(isp116x, ptd->len);
179 isp116x_write_data16(isp116x, ptd->faddr);
180 buflen -= sizeof(struct ptd);
181 /* Skip writing data for last IN PTD */
182 if (ep->active || (isp116x->atl_last_dir != PTD_DIR_IN)) {
183 write_ptddata_to_fifo(isp116x, ep->data, ep->length);
184 buflen -= ALIGN(ep->length, 4);
185 }
186 }
187 BUG_ON(buflen);
188}
189
190/*
191 Read the processed ptd's and data from fifo ram back to
192 URBs' buffers. Fifo must be full and done
193*/
194static void unpack_fifo(struct isp116x *isp116x)
195{
196 struct isp116x_ep *ep;
197 struct ptd *ptd;
198 int buflen = isp116x->atl_last_dir == PTD_DIR_IN
199 ? isp116x->atl_buflen : isp116x->atl_bufshrt;
200
201 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
202 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
203 isp116x_write_addr(isp116x, HCATLPORT);
204 for (ep = isp116x->atl_active; ep; ep = ep->active) {
205 ptd = &ep->ptd;
206 ptd->count = isp116x_read_data16(isp116x);
207 ptd->mps = isp116x_read_data16(isp116x);
208 ptd->len = isp116x_read_data16(isp116x);
209 ptd->faddr = isp116x_read_data16(isp116x);
210 buflen -= sizeof(struct ptd);
211 /* Skip reading data for last Setup or Out PTD */
212 if (ep->active || (isp116x->atl_last_dir == PTD_DIR_IN)) {
213 read_ptddata_from_fifo(isp116x, ep->data, ep->length);
214 buflen -= ALIGN(ep->length, 4);
215 }
216 dump_ptd(ptd);
217 dump_ptd_in_data(ptd, ep->data);
218 }
219 BUG_ON(buflen);
220}
221
222/*---------------------------------------------------------------*/
223
224/*
225 Set up PTD's.
226*/
227static void preproc_atl_queue(struct isp116x *isp116x)
228{
229 struct isp116x_ep *ep;
230 struct urb *urb;
231 struct ptd *ptd;
232 u16 toggle, dir, len;
233
234 for (ep = isp116x->atl_active; ep; ep = ep->active) {
235 BUG_ON(list_empty(&ep->hep->urb_list));
236 urb = container_of(ep->hep->urb_list.next,
237 struct urb, urb_list);
238 ptd = &ep->ptd;
239 len = ep->length;
240 spin_lock(&urb->lock);
241 ep->data = (unsigned char *)urb->transfer_buffer
242 + urb->actual_length;
243
244 switch (ep->nextpid) {
245 case USB_PID_IN:
246 toggle = usb_gettoggle(urb->dev, ep->epnum, 0);
247 dir = PTD_DIR_IN;
248 break;
249 case USB_PID_OUT:
250 toggle = usb_gettoggle(urb->dev, ep->epnum, 1);
251 dir = PTD_DIR_OUT;
252 break;
253 case USB_PID_SETUP:
254 toggle = 0;
255 dir = PTD_DIR_SETUP;
256 len = sizeof(struct usb_ctrlrequest);
257 ep->data = urb->setup_packet;
258 break;
259 case USB_PID_ACK:
260 toggle = 1;
261 len = 0;
262 dir = (urb->transfer_buffer_length
263 && usb_pipein(urb->pipe))
264 ? PTD_DIR_OUT : PTD_DIR_IN;
265 break;
266 default:
267 /* To please gcc */
268 toggle = dir = 0;
269 ERR("%s %d: ep->nextpid %d\n", __func__, __LINE__,
270 ep->nextpid);
271 BUG_ON(1);
272 }
273
274 ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle);
275 ptd->mps = PTD_MPS(ep->maxpacket)
276 | PTD_SPD(urb->dev->speed == USB_SPEED_LOW)
277 | PTD_EP(ep->epnum);
278 ptd->len = PTD_LEN(len) | PTD_DIR(dir);
279 ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));
280 spin_unlock(&urb->lock);
281 if (!ep->active) {
282 ptd->mps |= PTD_LAST_MSK;
283 isp116x->atl_last_dir = dir;
284 }
285 isp116x->atl_bufshrt = sizeof(struct ptd) + isp116x->atl_buflen;
286 isp116x->atl_buflen = isp116x->atl_bufshrt + ALIGN(len, 4);
287 }
288}
289
290/*
291 Analyze transfer results, handle partial transfers and errors
292*/
293static void postproc_atl_queue(struct isp116x *isp116x)
294{
295 struct isp116x_ep *ep;
296 struct urb *urb;
297 struct usb_device *udev;
298 struct ptd *ptd;
299 int short_not_ok;
300 u8 cc;
301
302 for (ep = isp116x->atl_active; ep; ep = ep->active) {
303 BUG_ON(list_empty(&ep->hep->urb_list));
304 urb =
305 container_of(ep->hep->urb_list.next, struct urb, urb_list);
306 udev = urb->dev;
307 ptd = &ep->ptd;
308 cc = PTD_GET_CC(ptd);
309
310 spin_lock(&urb->lock);
311 short_not_ok = 1;
312
313 /* Data underrun is special. For allowed underrun
314 we clear the error and continue as normal. For
315 forbidden underrun we finish the DATA stage
316 immediately while for control transfer,
317 we do a STATUS stage. */
318 if (cc == TD_DATAUNDERRUN) {
319 if (!(urb->transfer_flags & URB_SHORT_NOT_OK)) {
320 DBG("Allowed data underrun\n");
321 cc = TD_CC_NOERROR;
322 short_not_ok = 0;
323 } else {
324 ep->error_count = 1;
325 if (usb_pipecontrol(urb->pipe))
326 ep->nextpid = USB_PID_ACK;
327 else
328 usb_settoggle(udev, ep->epnum,
329 ep->nextpid ==
330 USB_PID_OUT,
331 PTD_GET_TOGGLE(ptd) ^ 1);
332 urb->status = cc_to_error[TD_DATAUNDERRUN];
333 spin_unlock(&urb->lock);
334 continue;
335 }
336 }
337 /* Keep underrun error through the STATUS stage */
338 if (urb->status == cc_to_error[TD_DATAUNDERRUN])
339 cc = TD_DATAUNDERRUN;
340
341 if (cc != TD_CC_NOERROR && cc != TD_NOTACCESSED
342 && (++ep->error_count >= 3 || cc == TD_CC_STALL
343 || cc == TD_DATAOVERRUN)) {
344 if (urb->status == -EINPROGRESS)
345 urb->status = cc_to_error[cc];
346 if (ep->nextpid == USB_PID_ACK)
347 ep->nextpid = 0;
348 spin_unlock(&urb->lock);
349 continue;
350 }
351 /* According to usb spec, zero-length Int transfer signals
352 finishing of the urb. Hey, does this apply only
353 for IN endpoints? */
354 if (usb_pipeint(urb->pipe) && !PTD_GET_LEN(ptd)) {
355 if (urb->status == -EINPROGRESS)
356 urb->status = 0;
357 spin_unlock(&urb->lock);
358 continue;
359 }
360
361 /* Relax after previously failed, but later succeeded
362 or correctly NAK'ed retransmission attempt */
363 if (ep->error_count
364 && (cc == TD_CC_NOERROR || cc == TD_NOTACCESSED))
365 ep->error_count = 0;
366
367 /* Take into account idiosyncracies of the isp116x chip
368 regarding toggle bit for failed transfers */
369 if (ep->nextpid == USB_PID_OUT)
370 usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd)
371 ^ (ep->error_count > 0));
372 else if (ep->nextpid == USB_PID_IN)
373 usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd)
374 ^ (ep->error_count > 0));
375
376 switch (ep->nextpid) {
377 case USB_PID_IN:
378 case USB_PID_OUT:
379 urb->actual_length += PTD_GET_COUNT(ptd);
380 if (PTD_GET_ACTIVE(ptd)
381 || (cc != TD_CC_NOERROR && cc < 0x0E))
382 break;
383 if (urb->transfer_buffer_length != urb->actual_length) {
384 if (short_not_ok)
385 break;
386 } else {
387 if (urb->transfer_flags & URB_ZERO_PACKET
388 && ep->nextpid == USB_PID_OUT
389 && !(PTD_GET_COUNT(ptd) % ep->maxpacket)) {
390 DBG("Zero packet requested\n");
391 break;
392 }
393 }
394 /* All data for this URB is transferred, let's finish */
395 if (usb_pipecontrol(urb->pipe))
396 ep->nextpid = USB_PID_ACK;
397 else if (urb->status == -EINPROGRESS)
398 urb->status = 0;
399 break;
400 case USB_PID_SETUP:
401 if (PTD_GET_ACTIVE(ptd)
402 || (cc != TD_CC_NOERROR && cc < 0x0E))
403 break;
404 if (urb->transfer_buffer_length == urb->actual_length)
405 ep->nextpid = USB_PID_ACK;
406 else if (usb_pipeout(urb->pipe)) {
407 usb_settoggle(udev, 0, 1, 1);
408 ep->nextpid = USB_PID_OUT;
409 } else {
410 usb_settoggle(udev, 0, 0, 1);
411 ep->nextpid = USB_PID_IN;
412 }
413 break;
414 case USB_PID_ACK:
415 if (PTD_GET_ACTIVE(ptd)
416 || (cc != TD_CC_NOERROR && cc < 0x0E))
417 break;
418 if (urb->status == -EINPROGRESS)
419 urb->status = 0;
420 ep->nextpid = 0;
421 break;
422 default:
423 BUG_ON(1);
424 }
425 spin_unlock(&urb->lock);
426 }
427}
428
429/*
430 Take done or failed requests out of schedule. Give back
431 processed urbs.
432*/
433static void finish_request(struct isp116x *isp116x, struct isp116x_ep *ep,
434 struct urb *urb, struct pt_regs *regs)
435__releases(isp116x->lock) __acquires(isp116x->lock)
436{
437 unsigned i;
438
439 urb->hcpriv = NULL;
440 ep->error_count = 0;
441
442 if (usb_pipecontrol(urb->pipe))
443 ep->nextpid = USB_PID_SETUP;
444
445 urb_dbg(urb, "Finish");
446
447 spin_unlock(&isp116x->lock);
448 usb_hcd_giveback_urb(isp116x_to_hcd(isp116x), urb, regs);
449 spin_lock(&isp116x->lock);
450
451 /* take idle endpoints out of the schedule */
452 if (!list_empty(&ep->hep->urb_list))
453 return;
454
455 /* async deschedule */
456 if (!list_empty(&ep->schedule)) {
457 list_del_init(&ep->schedule);
458 return;
459 }
460
461 /* periodic deschedule */
462 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
463 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
464 struct isp116x_ep *temp;
465 struct isp116x_ep **prev = &isp116x->periodic[i];
466
467 while (*prev && ((temp = *prev) != ep))
468 prev = &temp->next;
469 if (*prev)
470 *prev = ep->next;
471 isp116x->load[i] -= ep->load;
472 }
473 ep->branch = PERIODIC_SIZE;
474 isp116x_to_hcd(isp116x)->self.bandwidth_allocated -=
475 ep->load / ep->period;
476
477 /* switch irq type? */
478 if (!--isp116x->periodic_count) {
479 isp116x->irqenb &= ~HCuPINT_SOF;
480 isp116x->irqenb |= HCuPINT_ATL;
481 }
482}
483
484/*
485 Scan transfer lists, schedule transfers, send data off
486 to chip.
487 */
488static void start_atl_transfers(struct isp116x *isp116x)
489{
490 struct isp116x_ep *last_ep = NULL, *ep;
491 struct urb *urb;
492 u16 load = 0;
493 int len, index, speed, byte_time;
494
495 if (atomic_read(&isp116x->atl_finishing))
496 return;
497
498 if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state))
499 return;
500
501 /* FIFO not empty? */
502 if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL)
503 return;
504
505 isp116x->atl_active = NULL;
506 isp116x->atl_buflen = isp116x->atl_bufshrt = 0;
507
508 /* Schedule int transfers */
509 if (isp116x->periodic_count) {
510 isp116x->fmindex = index =
511 (isp116x->fmindex + 1) & (PERIODIC_SIZE - 1);
512 if ((load = isp116x->load[index])) {
513 /* Bring all int transfers for this frame
514 into the active queue */
515 isp116x->atl_active = last_ep =
516 isp116x->periodic[index];
517 while (last_ep->next)
518 last_ep = (last_ep->active = last_ep->next);
519 last_ep->active = NULL;
520 }
521 }
522
523 /* Schedule control/bulk transfers */
524 list_for_each_entry(ep, &isp116x->async, schedule) {
525 urb = container_of(ep->hep->urb_list.next,
526 struct urb, urb_list);
527 speed = urb->dev->speed;
528 byte_time = speed == USB_SPEED_LOW
529 ? BYTE_TIME_LOWSPEED : BYTE_TIME_FULLSPEED;
530
531 if (ep->nextpid == USB_PID_SETUP) {
532 len = sizeof(struct usb_ctrlrequest);
533 } else if (ep->nextpid == USB_PID_ACK) {
534 len = 0;
535 } else {
536 /* Find current free length ... */
537 len = (MAX_LOAD_LIMIT - load) / byte_time;
538
539 /* ... then limit it to configured max size ... */
540 len = min(len, speed == USB_SPEED_LOW ?
541 MAX_TRANSFER_SIZE_LOWSPEED :
542 MAX_TRANSFER_SIZE_FULLSPEED);
543
544 /* ... and finally cut to the multiple of MaxPacketSize,
545 or to the real length if there's enough room. */
546 if (len <
547 (urb->transfer_buffer_length -
548 urb->actual_length)) {
549 len -= len % ep->maxpacket;
550 if (!len)
551 continue;
552 } else
553 len = urb->transfer_buffer_length -
554 urb->actual_length;
555 BUG_ON(len < 0);
556 }
557
558 load += len * byte_time;
559 if (load > MAX_LOAD_LIMIT)
560 break;
561
562 ep->active = NULL;
563 ep->length = len;
564 if (last_ep)
565 last_ep->active = ep;
566 else
567 isp116x->atl_active = ep;
568 last_ep = ep;
569 }
570
571 /* Avoid starving of endpoints */
572 if ((&isp116x->async)->next != (&isp116x->async)->prev)
573 list_move(&isp116x->async, (&isp116x->async)->next);
574
575 if (isp116x->atl_active) {
576 preproc_atl_queue(isp116x);
577 pack_fifo(isp116x);
578 }
579}
580
581/*
582 Finish the processed transfers
583*/
584static void finish_atl_transfers(struct isp116x *isp116x, struct pt_regs *regs)
585{
586 struct isp116x_ep *ep;
587 struct urb *urb;
588
589 if (!isp116x->atl_active)
590 return;
591 /* Fifo not ready? */
592 if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE))
593 return;
594
595 atomic_inc(&isp116x->atl_finishing);
596 unpack_fifo(isp116x);
597 postproc_atl_queue(isp116x);
598 for (ep = isp116x->atl_active; ep; ep = ep->active) {
599 urb =
600 container_of(ep->hep->urb_list.next, struct urb, urb_list);
601 /* USB_PID_ACK check here avoids finishing of
602 control transfers, for which TD_DATAUNDERRUN
603 occured, while URB_SHORT_NOT_OK was set */
604 if (urb && urb->status != -EINPROGRESS
605 && ep->nextpid != USB_PID_ACK)
606 finish_request(isp116x, ep, urb, regs);
607 }
608 atomic_dec(&isp116x->atl_finishing);
609}
610
611static irqreturn_t isp116x_irq(struct usb_hcd *hcd, struct pt_regs *regs)
612{
613 struct isp116x *isp116x = hcd_to_isp116x(hcd);
614 u16 irqstat;
615 irqreturn_t ret = IRQ_NONE;
616
617 spin_lock(&isp116x->lock);
618 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
619 irqstat = isp116x_read_reg16(isp116x, HCuPINT);
620 isp116x_write_reg16(isp116x, HCuPINT, irqstat);
621
622 if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
623 ret = IRQ_HANDLED;
624 finish_atl_transfers(isp116x, regs);
625 }
626
627 if (irqstat & HCuPINT_OPR) {
628 u32 intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
629 isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
630 if (intstat & HCINT_UE) {
631 ERR("Unrecoverable error\n");
632 /* What should we do here? Reset? */
633 }
634 if (intstat & HCINT_RHSC) {
635 isp116x->rhstatus =
636 isp116x_read_reg32(isp116x, HCRHSTATUS);
637 isp116x->rhport[0] =
638 isp116x_read_reg32(isp116x, HCRHPORT1);
639 isp116x->rhport[1] =
640 isp116x_read_reg32(isp116x, HCRHPORT2);
641 }
642 if (intstat & HCINT_RD) {
643 DBG("---- remote wakeup\n");
644 schedule_work(&isp116x->rh_resume);
645 ret = IRQ_HANDLED;
646 }
647 irqstat &= ~HCuPINT_OPR;
648 ret = IRQ_HANDLED;
649 }
650
651 if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
652 start_atl_transfers(isp116x);
653 }
654
655 isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
656 spin_unlock(&isp116x->lock);
657 return ret;
658}
659
660/*-----------------------------------------------------------------*/
661
662/* usb 1.1 says max 90% of a frame is available for periodic transfers.
663 * this driver doesn't promise that much since it's got to handle an
664 * IRQ per packet; irq handling latencies also use up that time.
665 */
666
667/* out of 1000 us */
668#define MAX_PERIODIC_LOAD 600
669static int balance(struct isp116x *isp116x, u16 period, u16 load)
670{
671 int i, branch = -ENOSPC;
672
673 /* search for the least loaded schedule branch of that period
674 which has enough bandwidth left unreserved. */
675 for (i = 0; i < period; i++) {
676 if (branch < 0 || isp116x->load[branch] > isp116x->load[i]) {
677 int j;
678
679 for (j = i; j < PERIODIC_SIZE; j += period) {
680 if ((isp116x->load[j] + load)
681 > MAX_PERIODIC_LOAD)
682 break;
683 }
684 if (j < PERIODIC_SIZE)
685 continue;
686 branch = i;
687 }
688 }
689 return branch;
690}
691
692/* NB! ALL the code above this point runs with isp116x->lock
693 held, irqs off
694*/
695
696/*-----------------------------------------------------------------*/
697
698static int isp116x_urb_enqueue(struct usb_hcd *hcd,
699 struct usb_host_endpoint *hep, struct urb *urb,
700 int mem_flags)
701{
702 struct isp116x *isp116x = hcd_to_isp116x(hcd);
703 struct usb_device *udev = urb->dev;
704 unsigned int pipe = urb->pipe;
705 int is_out = !usb_pipein(pipe);
706 int type = usb_pipetype(pipe);
707 int epnum = usb_pipeendpoint(pipe);
708 struct isp116x_ep *ep = NULL;
709 unsigned long flags;
710 int i;
711 int ret = 0;
712
713 urb_dbg(urb, "Enqueue");
714
715 if (type == PIPE_ISOCHRONOUS) {
716 ERR("Isochronous transfers not supported\n");
717 urb_dbg(urb, "Refused to enqueue");
718 return -ENXIO;
719 }
720 /* avoid all allocations within spinlocks: request or endpoint */
721 if (!hep->hcpriv) {
722 ep = kcalloc(1, sizeof *ep, (__force unsigned)mem_flags);
723 if (!ep)
724 return -ENOMEM;
725 }
726
727 spin_lock_irqsave(&isp116x->lock, flags);
728 if (!HC_IS_RUNNING(hcd->state)) {
729 ret = -ENODEV;
730 goto fail;
731 }
732
733 if (hep->hcpriv)
734 ep = hep->hcpriv;
735 else {
736 INIT_LIST_HEAD(&ep->schedule);
737 ep->udev = usb_get_dev(udev);
738 ep->epnum = epnum;
739 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
740 usb_settoggle(udev, epnum, is_out, 0);
741
742 if (type == PIPE_CONTROL) {
743 ep->nextpid = USB_PID_SETUP;
744 } else if (is_out) {
745 ep->nextpid = USB_PID_OUT;
746 } else {
747 ep->nextpid = USB_PID_IN;
748 }
749
750 if (urb->interval) {
751 /*
752 With INT URBs submitted, the driver works with SOF
753 interrupt enabled and ATL interrupt disabled. After
754 the PTDs are written to fifo ram, the chip starts
755 fifo processing and usb transfers after the next
756 SOF and continues until the transfers are finished
757 (succeeded or failed) or the frame ends. Therefore,
758 the transfers occur only in every second frame,
759 while fifo reading/writing and data processing
760 occur in every other second frame. */
761 if (urb->interval < 2)
762 urb->interval = 2;
763 if (urb->interval > 2 * PERIODIC_SIZE)
764 urb->interval = 2 * PERIODIC_SIZE;
765 ep->period = urb->interval >> 1;
766 ep->branch = PERIODIC_SIZE;
767 ep->load = usb_calc_bus_time(udev->speed,
768 !is_out,
769 (type == PIPE_ISOCHRONOUS),
770 usb_maxpacket(udev, pipe,
771 is_out)) /
772 1000;
773 }
774 hep->hcpriv = ep;
775 ep->hep = hep;
776 }
777
778 /* maybe put endpoint into schedule */
779 switch (type) {
780 case PIPE_CONTROL:
781 case PIPE_BULK:
782 if (list_empty(&ep->schedule))
783 list_add_tail(&ep->schedule, &isp116x->async);
784 break;
785 case PIPE_INTERRUPT:
786 urb->interval = ep->period;
787 ep->length = min((int)ep->maxpacket,
788 urb->transfer_buffer_length);
789
790 /* urb submitted for already existing endpoint */
791 if (ep->branch < PERIODIC_SIZE)
792 break;
793
794 ret = ep->branch = balance(isp116x, ep->period, ep->load);
795 if (ret < 0)
796 goto fail;
797 ret = 0;
798
799 urb->start_frame = (isp116x->fmindex & (PERIODIC_SIZE - 1))
800 + ep->branch;
801
802 /* sort each schedule branch by period (slow before fast)
803 to share the faster parts of the tree without needing
804 dummy/placeholder nodes */
805 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
806 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
807 struct isp116x_ep **prev = &isp116x->periodic[i];
808 struct isp116x_ep *here = *prev;
809
810 while (here && ep != here) {
811 if (ep->period > here->period)
812 break;
813 prev = &here->next;
814 here = *prev;
815 }
816 if (ep != here) {
817 ep->next = here;
818 *prev = ep;
819 }
820 isp116x->load[i] += ep->load;
821 }
822 hcd->self.bandwidth_allocated += ep->load / ep->period;
823
824 /* switch over to SOFint */
825 if (!isp116x->periodic_count++) {
826 isp116x->irqenb &= ~HCuPINT_ATL;
827 isp116x->irqenb |= HCuPINT_SOF;
828 isp116x_write_reg16(isp116x, HCuPINTENB,
829 isp116x->irqenb);
830 }
831 }
832
833 /* in case of unlink-during-submit */
834 spin_lock(&urb->lock);
835 if (urb->status != -EINPROGRESS) {
836 spin_unlock(&urb->lock);
837 finish_request(isp116x, ep, urb, NULL);
838 ret = 0;
839 goto fail;
840 }
841 urb->hcpriv = hep;
842 spin_unlock(&urb->lock);
843 start_atl_transfers(isp116x);
844
845 fail:
846 spin_unlock_irqrestore(&isp116x->lock, flags);
847 return ret;
848}
849
850/*
851 Dequeue URBs.
852*/
853static int isp116x_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
854{
855 struct isp116x *isp116x = hcd_to_isp116x(hcd);
856 struct usb_host_endpoint *hep;
857 struct isp116x_ep *ep, *ep_act;
858 unsigned long flags;
859
860 spin_lock_irqsave(&isp116x->lock, flags);
861 hep = urb->hcpriv;
862 /* URB already unlinked (or never linked)? */
863 if (!hep) {
864 spin_unlock_irqrestore(&isp116x->lock, flags);
865 return 0;
866 }
867 ep = hep->hcpriv;
868 WARN_ON(hep != ep->hep);
869
870 /* In front of queue? */
871 if (ep->hep->urb_list.next == &urb->urb_list)
872 /* active? */
873 for (ep_act = isp116x->atl_active; ep_act;
874 ep_act = ep_act->active)
875 if (ep_act == ep) {
876 VDBG("dequeue, urb %p active; wait for irq\n",
877 urb);
878 urb = NULL;
879 break;
880 }
881
882 if (urb)
883 finish_request(isp116x, ep, urb, NULL);
884
885 spin_unlock_irqrestore(&isp116x->lock, flags);
886 return 0;
887}
888
889static void isp116x_endpoint_disable(struct usb_hcd *hcd,
890 struct usb_host_endpoint *hep)
891{
892 int i;
893 struct isp116x_ep *ep = hep->hcpriv;;
894
895 if (!ep)
896 return;
897
898 /* assume we'd just wait for the irq */
899 for (i = 0; i < 100 && !list_empty(&hep->urb_list); i++)
900 msleep(3);
901 if (!list_empty(&hep->urb_list))
902 WARN("ep %p not empty?\n", ep);
903
904 usb_put_dev(ep->udev);
905 kfree(ep);
906 hep->hcpriv = NULL;
907}
908
909static int isp116x_get_frame(struct usb_hcd *hcd)
910{
911 struct isp116x *isp116x = hcd_to_isp116x(hcd);
912 u32 fmnum;
913 unsigned long flags;
914
915 spin_lock_irqsave(&isp116x->lock, flags);
916 fmnum = isp116x_read_reg32(isp116x, HCFMNUM);
917 spin_unlock_irqrestore(&isp116x->lock, flags);
918 return (int)fmnum;
919}
920
921/*----------------------------------------------------------------*/
922
923/*
924 Adapted from ohci-hub.c. Currently we don't support autosuspend.
925*/
926static int isp116x_hub_status_data(struct usb_hcd *hcd, char *buf)
927{
928 struct isp116x *isp116x = hcd_to_isp116x(hcd);
929 int ports, i, changed = 0;
930
931 if (!HC_IS_RUNNING(hcd->state))
932 return -ESHUTDOWN;
933
934 ports = isp116x->rhdesca & RH_A_NDP;
935
936 /* init status */
937 if (isp116x->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
938 buf[0] = changed = 1;
939 else
940 buf[0] = 0;
941
942 for (i = 0; i < ports; i++) {
943 u32 status = isp116x->rhport[i];
944
945 if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC
946 | RH_PS_OCIC | RH_PS_PRSC)) {
947 changed = 1;
948 buf[0] |= 1 << (i + 1);
949 continue;
950 }
951 }
952 return changed;
953}
954
955static void isp116x_hub_descriptor(struct isp116x *isp116x,
956 struct usb_hub_descriptor *desc)
957{
958 u32 reg = isp116x->rhdesca;
959
960 desc->bDescriptorType = 0x29;
961 desc->bDescLength = 9;
962 desc->bHubContrCurrent = 0;
963 desc->bNbrPorts = (u8) (reg & 0x3);
964 /* Power switching, device type, overcurrent. */
965 desc->wHubCharacteristics =
966 (__force __u16) cpu_to_le16((u16) ((reg >> 8) & 0x1f));
967 desc->bPwrOn2PwrGood = (u8) ((reg >> 24) & 0xff);
968 /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */
969 desc->bitmap[0] = desc->bNbrPorts == 1 ? 1 << 1 : 3 << 1;
970 desc->bitmap[1] = ~0;
971}
972
973/* Perform reset of a given port.
974 It would be great to just start the reset and let the
975 USB core to clear the reset in due time. However,
976 root hub ports should be reset for at least 50 ms, while
977 our chip stays in reset for about 10 ms. I.e., we must
978 repeatedly reset it ourself here.
979*/
980static inline void root_port_reset(struct isp116x *isp116x, unsigned port)
981{
982 u32 tmp;
983 unsigned long flags, t;
984
985 /* Root hub reset should be 50 ms, but some devices
986 want it even longer. */
987 t = jiffies + msecs_to_jiffies(100);
988
989 while (time_before(jiffies, t)) {
990 spin_lock_irqsave(&isp116x->lock, flags);
991 /* spin until any current reset finishes */
992 for (;;) {
993 tmp = isp116x_read_reg32(isp116x, port ?
994 HCRHPORT2 : HCRHPORT1);
995 if (!(tmp & RH_PS_PRS))
996 break;
997 udelay(500);
998 }
999 /* Don't reset a disconnected port */
1000 if (!(tmp & RH_PS_CCS)) {
1001 spin_unlock_irqrestore(&isp116x->lock, flags);
1002 break;
1003 }
1004 /* Reset lasts 10ms (claims datasheet) */
1005 isp116x_write_reg32(isp116x, port ? HCRHPORT2 :
1006 HCRHPORT1, (RH_PS_PRS));
1007 spin_unlock_irqrestore(&isp116x->lock, flags);
1008 msleep(10);
1009 }
1010}
1011
1012/* Adapted from ohci-hub.c */
1013static int isp116x_hub_control(struct usb_hcd *hcd,
1014 u16 typeReq,
1015 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1016{
1017 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1018 int ret = 0;
1019 unsigned long flags;
1020 int ports = isp116x->rhdesca & RH_A_NDP;
1021 u32 tmp = 0;
1022
1023 switch (typeReq) {
1024 case ClearHubFeature:
1025 DBG("ClearHubFeature: ");
1026 switch (wValue) {
1027 case C_HUB_OVER_CURRENT:
1028 DBG("C_HUB_OVER_CURRENT\n");
1029 spin_lock_irqsave(&isp116x->lock, flags);
1030 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
1031 spin_unlock_irqrestore(&isp116x->lock, flags);
1032 case C_HUB_LOCAL_POWER:
1033 DBG("C_HUB_LOCAL_POWER\n");
1034 break;
1035 default:
1036 goto error;
1037 }
1038 break;
1039 case SetHubFeature:
1040 DBG("SetHubFeature: ");
1041 switch (wValue) {
1042 case C_HUB_OVER_CURRENT:
1043 case C_HUB_LOCAL_POWER:
1044 DBG("C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n");
1045 break;
1046 default:
1047 goto error;
1048 }
1049 break;
1050 case GetHubDescriptor:
1051 DBG("GetHubDescriptor\n");
1052 isp116x_hub_descriptor(isp116x,
1053 (struct usb_hub_descriptor *)buf);
1054 break;
1055 case GetHubStatus:
1056 DBG("GetHubStatus\n");
1057 *(__le32 *) buf = cpu_to_le32(0);
1058 break;
1059 case GetPortStatus:
1060 DBG("GetPortStatus\n");
1061 if (!wIndex || wIndex > ports)
1062 goto error;
1063 tmp = isp116x->rhport[--wIndex];
1064 *(__le32 *) buf = cpu_to_le32(tmp);
1065 DBG("GetPortStatus: port[%d] %08x\n", wIndex + 1, tmp);
1066 break;
1067 case ClearPortFeature:
1068 DBG("ClearPortFeature: ");
1069 if (!wIndex || wIndex > ports)
1070 goto error;
1071 wIndex--;
1072
1073 switch (wValue) {
1074 case USB_PORT_FEAT_ENABLE:
1075 DBG("USB_PORT_FEAT_ENABLE\n");
1076 tmp = RH_PS_CCS;
1077 break;
1078 case USB_PORT_FEAT_C_ENABLE:
1079 DBG("USB_PORT_FEAT_C_ENABLE\n");
1080 tmp = RH_PS_PESC;
1081 break;
1082 case USB_PORT_FEAT_SUSPEND:
1083 DBG("USB_PORT_FEAT_SUSPEND\n");
1084 tmp = RH_PS_POCI;
1085 break;
1086 case USB_PORT_FEAT_C_SUSPEND:
1087 DBG("USB_PORT_FEAT_C_SUSPEND\n");
1088 tmp = RH_PS_PSSC;
1089 break;
1090 case USB_PORT_FEAT_POWER:
1091 DBG("USB_PORT_FEAT_POWER\n");
1092 tmp = RH_PS_LSDA;
1093 break;
1094 case USB_PORT_FEAT_C_CONNECTION:
1095 DBG("USB_PORT_FEAT_C_CONNECTION\n");
1096 tmp = RH_PS_CSC;
1097 break;
1098 case USB_PORT_FEAT_C_OVER_CURRENT:
1099 DBG("USB_PORT_FEAT_C_OVER_CURRENT\n");
1100 tmp = RH_PS_OCIC;
1101 break;
1102 case USB_PORT_FEAT_C_RESET:
1103 DBG("USB_PORT_FEAT_C_RESET\n");
1104 tmp = RH_PS_PRSC;
1105 break;
1106 default:
1107 goto error;
1108 }
1109 spin_lock_irqsave(&isp116x->lock, flags);
1110 isp116x_write_reg32(isp116x, wIndex
1111 ? HCRHPORT2 : HCRHPORT1, tmp);
1112 isp116x->rhport[wIndex] =
1113 isp116x_read_reg32(isp116x, wIndex ? HCRHPORT2 : HCRHPORT1);
1114 spin_unlock_irqrestore(&isp116x->lock, flags);
1115 break;
1116 case SetPortFeature:
1117 DBG("SetPortFeature: ");
1118 if (!wIndex || wIndex > ports)
1119 goto error;
1120 wIndex--;
1121 switch (wValue) {
1122 case USB_PORT_FEAT_SUSPEND:
1123 DBG("USB_PORT_FEAT_SUSPEND\n");
1124 spin_lock_irqsave(&isp116x->lock, flags);
1125 isp116x_write_reg32(isp116x, wIndex
1126 ? HCRHPORT2 : HCRHPORT1, RH_PS_PSS);
1127 break;
1128 case USB_PORT_FEAT_POWER:
1129 DBG("USB_PORT_FEAT_POWER\n");
1130 spin_lock_irqsave(&isp116x->lock, flags);
1131 isp116x_write_reg32(isp116x, wIndex
1132 ? HCRHPORT2 : HCRHPORT1, RH_PS_PPS);
1133 break;
1134 case USB_PORT_FEAT_RESET:
1135 DBG("USB_PORT_FEAT_RESET\n");
1136 root_port_reset(isp116x, wIndex);
1137 spin_lock_irqsave(&isp116x->lock, flags);
1138 break;
1139 default:
1140 goto error;
1141 }
1142 isp116x->rhport[wIndex] =
1143 isp116x_read_reg32(isp116x, wIndex ? HCRHPORT2 : HCRHPORT1);
1144 spin_unlock_irqrestore(&isp116x->lock, flags);
1145 break;
1146
1147 default:
1148 error:
1149 /* "protocol stall" on error */
1150 DBG("PROTOCOL STALL\n");
1151 ret = -EPIPE;
1152 }
1153 return ret;
1154}
1155
1156#ifdef CONFIG_PM
1157
1158static int isp116x_hub_suspend(struct usb_hcd *hcd)
1159{
1160 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1161 unsigned long flags;
1162 u32 val;
1163 int ret = 0;
1164
1165 spin_lock_irqsave(&isp116x->lock, flags);
1166
1167 val = isp116x_read_reg32(isp116x, HCCONTROL);
1168 switch (val & HCCONTROL_HCFS) {
1169 case HCCONTROL_USB_OPER:
1170 hcd->state = HC_STATE_QUIESCING;
1171 val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE);
1172 val |= HCCONTROL_USB_SUSPEND;
1173 if (hcd->remote_wakeup)
1174 val |= HCCONTROL_RWE;
1175 /* Wait for usb transfers to finish */
1176 mdelay(2);
1177 isp116x_write_reg32(isp116x, HCCONTROL, val);
1178 hcd->state = HC_STATE_SUSPENDED;
1179 /* Wait for devices to suspend */
1180 mdelay(5);
1181 case HCCONTROL_USB_SUSPEND:
1182 break;
1183 case HCCONTROL_USB_RESUME:
1184 isp116x_write_reg32(isp116x, HCCONTROL,
1185 (val & ~HCCONTROL_HCFS) |
1186 HCCONTROL_USB_RESET);
1187 case HCCONTROL_USB_RESET:
1188 ret = -EBUSY;
1189 break;
1190 default:
1191 ret = -EINVAL;
1192 }
1193
1194 spin_unlock_irqrestore(&isp116x->lock, flags);
1195 return ret;
1196}
1197
1198static int isp116x_hub_resume(struct usb_hcd *hcd)
1199{
1200 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1201 u32 val;
1202 int ret = -EINPROGRESS;
1203
1204 msleep(5);
1205 spin_lock_irq(&isp116x->lock);
1206
1207 val = isp116x_read_reg32(isp116x, HCCONTROL);
1208 switch (val & HCCONTROL_HCFS) {
1209 case HCCONTROL_USB_SUSPEND:
1210 val &= ~HCCONTROL_HCFS;
1211 val |= HCCONTROL_USB_RESUME;
1212 isp116x_write_reg32(isp116x, HCCONTROL, val);
1213 case HCCONTROL_USB_RESUME:
1214 break;
1215 case HCCONTROL_USB_OPER:
1216 /* Without setting power_state here the
1217 SUSPENDED state won't be removed from
1218 sysfs/usbN/power.state as a response to remote
1219 wakeup. Maybe in the future. */
1220 hcd->self.root_hub->dev.power.power_state = PMSG_ON;
1221 ret = 0;
1222 break;
1223 default:
1224 ret = -EBUSY;
1225 }
1226
1227 if (ret != -EINPROGRESS) {
1228 spin_unlock_irq(&isp116x->lock);
1229 return ret;
1230 }
1231
1232 val = isp116x->rhdesca & RH_A_NDP;
1233 while (val--) {
1234 u32 stat =
1235 isp116x_read_reg32(isp116x, val ? HCRHPORT2 : HCRHPORT1);
1236 /* force global, not selective, resume */
1237 if (!(stat & RH_PS_PSS))
1238 continue;
1239 DBG("%s: Resuming port %d\n", __func__, val);
1240 isp116x_write_reg32(isp116x, RH_PS_POCI, val
1241 ? HCRHPORT2 : HCRHPORT1);
1242 }
1243 spin_unlock_irq(&isp116x->lock);
1244
1245 hcd->state = HC_STATE_RESUMING;
1246 mdelay(20);
1247
1248 /* Go operational */
1249 spin_lock_irq(&isp116x->lock);
1250 val = isp116x_read_reg32(isp116x, HCCONTROL);
1251 isp116x_write_reg32(isp116x, HCCONTROL,
1252 (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER);
1253 spin_unlock_irq(&isp116x->lock);
1254 /* see analogous comment above */
1255 hcd->self.root_hub->dev.power.power_state = PMSG_ON;
1256 hcd->state = HC_STATE_RUNNING;
1257
1258 return 0;
1259}
1260
1261static void isp116x_rh_resume(void *_hcd)
1262{
1263 struct usb_hcd *hcd = _hcd;
1264
1265 usb_resume_device(hcd->self.root_hub);
1266}
1267
1268#else
1269
1270#define isp116x_hub_suspend NULL
1271#define isp116x_hub_resume NULL
1272
1273static void isp116x_rh_resume(void *_hcd)
1274{
1275}
1276
1277#endif
1278
1279/*-----------------------------------------------------------------*/
1280
1281#ifdef STUB_DEBUG_FILE
1282
1283static inline void create_debug_file(struct isp116x *isp116x)
1284{
1285}
1286
1287static inline void remove_debug_file(struct isp116x *isp116x)
1288{
1289}
1290
1291#else
1292
1293#include <linux/proc_fs.h>
1294#include <linux/seq_file.h>
1295
1296static void dump_irq(struct seq_file *s, char *label, u16 mask)
1297{
1298 seq_printf(s, "%s %04x%s%s%s%s%s%s\n", label, mask,
1299 mask & HCuPINT_CLKRDY ? " clkrdy" : "",
1300 mask & HCuPINT_SUSP ? " susp" : "",
1301 mask & HCuPINT_OPR ? " opr" : "",
1302 mask & HCuPINT_AIIEOT ? " eot" : "",
1303 mask & HCuPINT_ATL ? " atl" : "",
1304 mask & HCuPINT_SOF ? " sof" : "");
1305}
1306
1307static void dump_int(struct seq_file *s, char *label, u32 mask)
1308{
1309 seq_printf(s, "%s %08x%s%s%s%s%s%s%s\n", label, mask,
1310 mask & HCINT_MIE ? " MIE" : "",
1311 mask & HCINT_RHSC ? " rhsc" : "",
1312 mask & HCINT_FNO ? " fno" : "",
1313 mask & HCINT_UE ? " ue" : "",
1314 mask & HCINT_RD ? " rd" : "",
1315 mask & HCINT_SF ? " sof" : "", mask & HCINT_SO ? " so" : "");
1316}
1317
1318static int proc_isp116x_show(struct seq_file *s, void *unused)
1319{
1320 struct isp116x *isp116x = s->private;
1321 struct isp116x_ep *ep;
1322 struct urb *urb;
1323 unsigned i;
1324 char *str;
1325
1326 seq_printf(s, "%s\n%s version %s\n",
1327 isp116x_to_hcd(isp116x)->product_desc, hcd_name,
1328 DRIVER_VERSION);
1329
1330 if (HC_IS_SUSPENDED(isp116x_to_hcd(isp116x)->state)) {
1331 seq_printf(s, "HCD is suspended\n");
1332 return 0;
1333 }
1334 if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state)) {
1335 seq_printf(s, "HCD not running\n");
1336 return 0;
1337 }
1338
1339 spin_lock_irq(&isp116x->lock);
1340
1341 dump_irq(s, "hc_irq_enable", isp116x_read_reg16(isp116x, HCuPINTENB));
1342 dump_irq(s, "hc_irq_status", isp116x_read_reg16(isp116x, HCuPINT));
1343 dump_int(s, "hc_int_enable", isp116x_read_reg32(isp116x, HCINTENB));
1344 dump_int(s, "hc_int_status", isp116x_read_reg32(isp116x, HCINTSTAT));
1345
1346 list_for_each_entry(ep, &isp116x->async, schedule) {
1347
1348 switch (ep->nextpid) {
1349 case USB_PID_IN:
1350 str = "in";
1351 break;
1352 case USB_PID_OUT:
1353 str = "out";
1354 break;
1355 case USB_PID_SETUP:
1356 str = "setup";
1357 break;
1358 case USB_PID_ACK:
1359 str = "status";
1360 break;
1361 default:
1362 str = "?";
1363 break;
1364 };
1365 seq_printf(s, "%p, ep%d%s, maxpacket %d:\n", ep,
1366 ep->epnum, str, ep->maxpacket);
1367 list_for_each_entry(urb, &ep->hep->urb_list, urb_list) {
1368 seq_printf(s, " urb%p, %d/%d\n", urb,
1369 urb->actual_length,
1370 urb->transfer_buffer_length);
1371 }
1372 }
1373 if (!list_empty(&isp116x->async))
1374 seq_printf(s, "\n");
1375
1376 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1377
1378 for (i = 0; i < PERIODIC_SIZE; i++) {
1379 ep = isp116x->periodic[i];
1380 if (!ep)
1381 continue;
1382 seq_printf(s, "%2d [%3d]:\n", i, isp116x->load[i]);
1383
1384 /* DUMB: prints shared entries multiple times */
1385 do {
1386 seq_printf(s, " %d/%p (%sdev%d ep%d%s max %d)\n",
1387 ep->period, ep,
1388 (ep->udev->speed ==
1389 USB_SPEED_FULL) ? "" : "ls ",
1390 ep->udev->devnum, ep->epnum,
1391 (ep->epnum ==
1392 0) ? "" : ((ep->nextpid ==
1393 USB_PID_IN) ? "in" : "out"),
1394 ep->maxpacket);
1395 ep = ep->next;
1396 } while (ep);
1397 }
1398 spin_unlock_irq(&isp116x->lock);
1399 seq_printf(s, "\n");
1400
1401 return 0;
1402}
1403
1404static int proc_isp116x_open(struct inode *inode, struct file *file)
1405{
1406 return single_open(file, proc_isp116x_show, PDE(inode)->data);
1407}
1408
1409static struct file_operations proc_ops = {
1410 .open = proc_isp116x_open,
1411 .read = seq_read,
1412 .llseek = seq_lseek,
1413 .release = single_release,
1414};
1415
1416/* expect just one isp116x per system */
1417static const char proc_filename[] = "driver/isp116x";
1418
1419static void create_debug_file(struct isp116x *isp116x)
1420{
1421 struct proc_dir_entry *pde;
1422
1423 pde = create_proc_entry(proc_filename, 0, NULL);
1424 if (pde == NULL)
1425 return;
1426
1427 pde->proc_fops = &proc_ops;
1428 pde->data = isp116x;
1429 isp116x->pde = pde;
1430}
1431
1432static void remove_debug_file(struct isp116x *isp116x)
1433{
1434 if (isp116x->pde)
1435 remove_proc_entry(proc_filename, NULL);
1436}
1437
1438#endif
1439
1440/*-----------------------------------------------------------------*/
1441
1442/*
1443 Software reset - can be called from any contect.
1444*/
1445static int isp116x_sw_reset(struct isp116x *isp116x)
1446{
1447 int retries = 15;
1448 unsigned long flags;
1449 int ret = 0;
1450
1451 spin_lock_irqsave(&isp116x->lock, flags);
1452 isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
1453 isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
1454 while (--retries) {
1455 /* It usually resets within 1 ms */
1456 mdelay(1);
1457 if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
1458 break;
1459 }
1460 if (!retries) {
1461 ERR("Software reset timeout\n");
1462 ret = -ETIME;
1463 }
1464 spin_unlock_irqrestore(&isp116x->lock, flags);
1465 return ret;
1466}
1467
1468/*
1469 Reset. Tries to perform platform-specific hardware
1470 reset first; falls back to software reset.
1471*/
1472static int isp116x_reset(struct usb_hcd *hcd)
1473{
1474 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1475 unsigned long t;
1476 u16 clkrdy = 0;
1477 int ret = 0, timeout = 15 /* ms */ ;
1478
1479 if (isp116x->board && isp116x->board->reset) {
1480 /* Hardware reset */
1481 isp116x->board->reset(hcd->self.controller, 1);
1482 msleep(10);
1483 if (isp116x->board->clock)
1484 isp116x->board->clock(hcd->self.controller, 1);
1485 msleep(1);
1486 isp116x->board->reset(hcd->self.controller, 0);
1487 } else
1488 ret = isp116x_sw_reset(isp116x);
1489
1490 if (ret)
1491 return ret;
1492
1493 t = jiffies + msecs_to_jiffies(timeout);
1494 while (time_before_eq(jiffies, t)) {
1495 msleep(4);
1496 spin_lock_irq(&isp116x->lock);
1497 clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
1498 spin_unlock_irq(&isp116x->lock);
1499 if (clkrdy)
1500 break;
1501 }
1502 if (!clkrdy) {
1503 ERR("Clock not ready after 20ms\n");
1504 /* After sw_reset the clock won't report to be ready, if
1505 H_WAKEUP pin is high. */
1506 if (!isp116x->board || !isp116x->board->reset)
1507 ERR("The driver does not support hardware wakeup.\n");
1508 ERR("Please make sure that the H_WAKEUP pin "
1509 "is pulled low!\n");
1510 ret = -ENODEV;
1511 }
1512 return ret;
1513}
1514
1515static void isp116x_stop(struct usb_hcd *hcd)
1516{
1517 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1518 unsigned long flags;
1519 u32 val;
1520
1521 spin_lock_irqsave(&isp116x->lock, flags);
1522 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1523
1524 /* Switch off ports' power, some devices don't come up
1525 after next 'insmod' without this */
1526 val = isp116x_read_reg32(isp116x, HCRHDESCA);
1527 val &= ~(RH_A_NPS | RH_A_PSM);
1528 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1529 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
1530 spin_unlock_irqrestore(&isp116x->lock, flags);
1531
1532 /* Put the chip into reset state */
1533 if (isp116x->board && isp116x->board->reset)
1534 isp116x->board->reset(hcd->self.controller, 0);
1535 else
1536 isp116x_sw_reset(isp116x);
1537
1538 /* Stop the clock */
1539 if (isp116x->board && isp116x->board->clock)
1540 isp116x->board->clock(hcd->self.controller, 0);
1541}
1542
1543/*
1544 Configure the chip. The chip must be successfully reset by now.
1545*/
1546static int isp116x_start(struct usb_hcd *hcd)
1547{
1548 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1549 struct isp116x_platform_data *board = isp116x->board;
1550 u32 val;
1551 unsigned long flags;
1552
1553 spin_lock_irqsave(&isp116x->lock, flags);
1554
1555 /* clear interrupt status and disable all interrupt sources */
1556 isp116x_write_reg16(isp116x, HCuPINT, 0xff);
1557 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1558
1559 val = isp116x_read_reg16(isp116x, HCCHIPID);
1560 if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
1561 ERR("Invalid chip ID %04x\n", val);
1562 spin_unlock_irqrestore(&isp116x->lock, flags);
1563 return -ENODEV;
1564 }
1565
1566 isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
1567 isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
1568
1569 /* ----- HW conf */
1570 val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
1571 if (board->sel15Kres)
1572 val |= HCHWCFG_15KRSEL;
1573 /* Remote wakeup won't work without working clock */
1574 if (board->clknotstop || board->remote_wakeup_enable)
1575 val |= HCHWCFG_CLKNOTSTOP;
1576 if (board->oc_enable)
1577 val |= HCHWCFG_ANALOG_OC;
1578 if (board->int_act_high)
1579 val |= HCHWCFG_INT_POL;
1580 if (board->int_edge_triggered)
1581 val |= HCHWCFG_INT_TRIGGER;
1582 isp116x_write_reg16(isp116x, HCHWCFG, val);
1583
1584 /* ----- Root hub conf */
1585 val = 0;
1586 /* AN10003_1.pdf recommends NPS to be always 1 */
1587 if (board->no_power_switching)
1588 val |= RH_A_NPS;
1589 if (board->power_switching_mode)
1590 val |= RH_A_PSM;
1591 if (board->potpg)
1592 val |= (board->potpg << 24) & RH_A_POTPGT;
1593 else
1594 val |= (25 << 24) & RH_A_POTPGT;
1595 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1596 isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
1597
1598 val = RH_B_PPCM;
1599 isp116x_write_reg32(isp116x, HCRHDESCB, val);
1600 isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
1601
1602 val = 0;
1603 if (board->remote_wakeup_enable) {
1604 hcd->can_wakeup = 1;
1605 val |= RH_HS_DRWE;
1606 }
1607 isp116x_write_reg32(isp116x, HCRHSTATUS, val);
1608 isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
1609
1610 isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
1611
1612 hcd->state = HC_STATE_RUNNING;
1613
1614 /* Set up interrupts */
1615 isp116x->intenb = HCINT_MIE | HCINT_RHSC | HCINT_UE;
1616 if (board->remote_wakeup_enable)
1617 isp116x->intenb |= HCINT_RD;
1618 isp116x->irqenb = HCuPINT_ATL | HCuPINT_OPR; /* | HCuPINT_SUSP; */
1619 isp116x_write_reg32(isp116x, HCINTENB, isp116x->intenb);
1620 isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
1621
1622 /* Go operational */
1623 val = HCCONTROL_USB_OPER;
1624 /* Remote wakeup connected - NOT SUPPORTED */
1625 /* if (board->remote_wakeup_connected)
1626 val |= HCCONTROL_RWC; */
1627 if (board->remote_wakeup_enable)
1628 val |= HCCONTROL_RWE;
1629 isp116x_write_reg32(isp116x, HCCONTROL, val);
1630
1631 /* Disable ports to avoid race in device enumeration */
1632 isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
1633 isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
1634
1635 isp116x_show_regs(isp116x);
1636 spin_unlock_irqrestore(&isp116x->lock, flags);
1637 return 0;
1638}
1639
1640/*-----------------------------------------------------------------*/
1641
1642static struct hc_driver isp116x_hc_driver = {
1643 .description = hcd_name,
1644 .product_desc = "ISP116x Host Controller",
1645 .hcd_priv_size = sizeof(struct isp116x),
1646
1647 .irq = isp116x_irq,
1648 .flags = HCD_USB11,
1649
1650 .reset = isp116x_reset,
1651 .start = isp116x_start,
1652 .stop = isp116x_stop,
1653
1654 .urb_enqueue = isp116x_urb_enqueue,
1655 .urb_dequeue = isp116x_urb_dequeue,
1656 .endpoint_disable = isp116x_endpoint_disable,
1657
1658 .get_frame_number = isp116x_get_frame,
1659
1660 .hub_status_data = isp116x_hub_status_data,
1661 .hub_control = isp116x_hub_control,
1662 .hub_suspend = isp116x_hub_suspend,
1663 .hub_resume = isp116x_hub_resume,
1664};
1665
1666/*----------------------------------------------------------------*/
1667
1668static int __init_or_module isp116x_remove(struct device *dev)
1669{
1670 struct usb_hcd *hcd = dev_get_drvdata(dev);
1671 struct isp116x *isp116x;
1672 struct platform_device *pdev;
1673 struct resource *res;
1674
1675 if(!hcd)
1676 return 0;
1677 isp116x = hcd_to_isp116x(hcd);
1678 pdev = container_of(dev, struct platform_device, dev);
1679 remove_debug_file(isp116x);
1680 usb_remove_hcd(hcd);
1681
1682 iounmap(isp116x->data_reg);
1683 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1684 release_mem_region(res->start, 2);
1685 iounmap(isp116x->addr_reg);
1686 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1687 release_mem_region(res->start, 2);
1688
1689 usb_put_hcd(hcd);
1690 return 0;
1691}
1692
1693#define resource_len(r) (((r)->end - (r)->start) + 1)
1694
1695static int __init isp116x_probe(struct device *dev)
1696{
1697 struct usb_hcd *hcd;
1698 struct isp116x *isp116x;
1699 struct platform_device *pdev;
1700 struct resource *addr, *data;
1701 void __iomem *addr_reg;
1702 void __iomem *data_reg;
1703 int irq;
1704 int ret = 0;
1705
1706 pdev = container_of(dev, struct platform_device, dev);
1707 if (pdev->num_resources < 3) {
1708 ret = -ENODEV;
1709 goto err1;
1710 }
1711
1712 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1713 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1714 irq = platform_get_irq(pdev, 0);
1715 if (!addr || !data || irq < 0) {
1716 ret = -ENODEV;
1717 goto err1;
1718 }
1719
1720 if (dev->dma_mask) {
1721 DBG("DMA not supported\n");
1722 ret = -EINVAL;
1723 goto err1;
1724 }
1725
1726 if (!request_mem_region(addr->start, 2, hcd_name)) {
1727 ret = -EBUSY;
1728 goto err1;
1729 }
1730 addr_reg = ioremap(addr->start, resource_len(addr));
1731 if (addr_reg == NULL) {
1732 ret = -ENOMEM;
1733 goto err2;
1734 }
1735 if (!request_mem_region(data->start, 2, hcd_name)) {
1736 ret = -EBUSY;
1737 goto err3;
1738 }
1739 data_reg = ioremap(data->start, resource_len(data));
1740 if (data_reg == NULL) {
1741 ret = -ENOMEM;
1742 goto err4;
1743 }
1744
1745 /* allocate and initialize hcd */
1746 hcd = usb_create_hcd(&isp116x_hc_driver, dev, dev->bus_id);
1747 if (!hcd) {
1748 ret = -ENOMEM;
1749 goto err5;
1750 }
1751 /* this rsrc_start is bogus */
1752 hcd->rsrc_start = addr->start;
1753 isp116x = hcd_to_isp116x(hcd);
1754 isp116x->data_reg = data_reg;
1755 isp116x->addr_reg = addr_reg;
1756 spin_lock_init(&isp116x->lock);
1757 INIT_LIST_HEAD(&isp116x->async);
1758 INIT_WORK(&isp116x->rh_resume, isp116x_rh_resume, hcd);
1759 isp116x->board = dev->platform_data;
1760
1761 if (!isp116x->board) {
1762 ERR("Platform data structure not initialized\n");
1763 ret = -ENODEV;
1764 goto err6;
1765 }
1766 if (isp116x_check_platform_delay(isp116x)) {
1767 ERR("USE_PLATFORM_DELAY defined, but delay function not "
1768 "implemented.\n");
1769 ERR("See comments in drivers/usb/host/isp116x-hcd.c\n");
1770 ret = -ENODEV;
1771 goto err6;
1772 }
1773
1774 ret = usb_add_hcd(hcd, irq, SA_INTERRUPT);
1775 if (ret != 0)
1776 goto err6;
1777
1778 create_debug_file(isp116x);
1779 return 0;
1780
1781 err6:
1782 usb_put_hcd(hcd);
1783 err5:
1784 iounmap(data_reg);
1785 err4:
1786 release_mem_region(data->start, 2);
1787 err3:
1788 iounmap(addr_reg);
1789 err2:
1790 release_mem_region(addr->start, 2);
1791 err1:
1792 ERR("init error, %d\n", ret);
1793 return ret;
1794}
1795
1796#ifdef CONFIG_PM
1797/*
1798 Suspend of platform device
1799*/
1800static int isp116x_suspend(struct device *dev, pm_message_t state, u32 phase)
1801{
1802 int ret = 0;
1803 struct usb_hcd *hcd = dev_get_drvdata(dev);
1804
1805 VDBG("%s: state %x, phase %x\n", __func__, state, phase);
1806
1807 if (phase != SUSPEND_DISABLE && phase != SUSPEND_POWER_DOWN)
1808 return 0;
1809
1810 ret = usb_suspend_device(hcd->self.root_hub, state);
1811 if (!ret) {
1812 dev->power.power_state = state;
1813 INFO("%s suspended\n", (char *)hcd_name);
1814 } else
1815 ERR("%s suspend failed\n", (char *)hcd_name);
1816
1817 return ret;
1818}
1819
1820/*
1821 Resume platform device
1822*/
1823static int isp116x_resume(struct device *dev, u32 phase)
1824{
1825 int ret = 0;
1826 struct usb_hcd *hcd = dev_get_drvdata(dev);
1827
1828 VDBG("%s: state %x, phase %x\n", __func__, dev->power.power_state,
1829 phase);
1830 if (phase != RESUME_POWER_ON)
1831 return 0;
1832
1833 ret = usb_resume_device(hcd->self.root_hub);
1834 if (!ret) {
1835 dev->power.power_state = PMSG_ON;
1836 VDBG("%s resumed\n", (char *)hcd_name);
1837 }
1838 return ret;
1839}
1840
1841#else
1842
1843#define isp116x_suspend NULL
1844#define isp116x_resume NULL
1845
1846#endif
1847
1848static struct device_driver isp116x_driver = {
1849 .name = (char *)hcd_name,
1850 .bus = &platform_bus_type,
1851 .probe = isp116x_probe,
1852 .remove = isp116x_remove,
1853 .suspend = isp116x_suspend,
1854 .resume = isp116x_resume,
1855};
1856
1857/*-----------------------------------------------------------------*/
1858
1859static int __init isp116x_init(void)
1860{
1861 if (usb_disabled())
1862 return -ENODEV;
1863
1864 INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
1865 return driver_register(&isp116x_driver);
1866}
1867
1868module_init(isp116x_init);
1869
1870static void __exit isp116x_cleanup(void)
1871{
1872 driver_unregister(&isp116x_driver);
1873}
1874
1875module_exit(isp116x_cleanup);
diff --git a/drivers/usb/host/isp116x.h b/drivers/usb/host/isp116x.h
new file mode 100644
index 000000000000..58873470dcf5
--- /dev/null
+++ b/drivers/usb/host/isp116x.h
@@ -0,0 +1,583 @@
1/*
2 * ISP116x register declarations and HCD data structures
3 *
4 * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
5 * Portions:
6 * Copyright (C) 2004 Lothar Wassmann
7 * Copyright (C) 2004 Psion Teklogix
8 * Copyright (C) 2004 David Brownell
9 */
10
11/* us of 1ms frame */
12#define MAX_LOAD_LIMIT 850
13
14/* Full speed: max # of bytes to transfer for a single urb
15 at a time must be < 1024 && must be multiple of 64.
16 832 allows transfering 4kiB within 5 frames. */
17#define MAX_TRANSFER_SIZE_FULLSPEED 832
18
19/* Low speed: there is no reason to schedule in very big
20 chunks; often the requested long transfers are for
21 string descriptors containing short strings. */
22#define MAX_TRANSFER_SIZE_LOWSPEED 64
23
24/* Bytetime (us), a rough indication of how much time it
25 would take to transfer a byte of useful data over USB */
26#define BYTE_TIME_FULLSPEED 1
27#define BYTE_TIME_LOWSPEED 20
28
29/* Buffer sizes */
30#define ISP116x_BUF_SIZE 4096
31#define ISP116x_ITL_BUFSIZE 0
32#define ISP116x_ATL_BUFSIZE ((ISP116x_BUF_SIZE) - 2*(ISP116x_ITL_BUFSIZE))
33
34#define ISP116x_WRITE_OFFSET 0x80
35
36/*------------ ISP116x registers/bits ------------*/
37#define HCREVISION 0x00
38#define HCCONTROL 0x01
39#define HCCONTROL_HCFS (3 << 6) /* host controller
40 functional state */
41#define HCCONTROL_USB_RESET (0 << 6)
42#define HCCONTROL_USB_RESUME (1 << 6)
43#define HCCONTROL_USB_OPER (2 << 6)
44#define HCCONTROL_USB_SUSPEND (3 << 6)
45#define HCCONTROL_RWC (1 << 9) /* remote wakeup connected */
46#define HCCONTROL_RWE (1 << 10) /* remote wakeup enable */
47#define HCCMDSTAT 0x02
48#define HCCMDSTAT_HCR (1 << 0) /* host controller reset */
49#define HCCMDSTAT_SOC (3 << 16) /* scheduling overrun count */
50#define HCINTSTAT 0x03
51#define HCINT_SO (1 << 0) /* scheduling overrun */
52#define HCINT_WDH (1 << 1) /* writeback of done_head */
53#define HCINT_SF (1 << 2) /* start frame */
54#define HCINT_RD (1 << 3) /* resume detect */
55#define HCINT_UE (1 << 4) /* unrecoverable error */
56#define HCINT_FNO (1 << 5) /* frame number overflow */
57#define HCINT_RHSC (1 << 6) /* root hub status change */
58#define HCINT_OC (1 << 30) /* ownership change */
59#define HCINT_MIE (1 << 31) /* master interrupt enable */
60#define HCINTENB 0x04
61#define HCINTDIS 0x05
62#define HCFMINTVL 0x0d
63#define HCFMREM 0x0e
64#define HCFMNUM 0x0f
65#define HCLSTHRESH 0x11
66#define HCRHDESCA 0x12
67#define RH_A_NDP (0x3 << 0) /* # downstream ports */
68#define RH_A_PSM (1 << 8) /* power switching mode */
69#define RH_A_NPS (1 << 9) /* no power switching */
70#define RH_A_DT (1 << 10) /* device type (mbz) */
71#define RH_A_OCPM (1 << 11) /* overcurrent protection
72 mode */
73#define RH_A_NOCP (1 << 12) /* no overcurrent protection */
74#define RH_A_POTPGT (0xff << 24) /* power on -> power good
75 time */
76#define HCRHDESCB 0x13
77#define RH_B_DR (0xffff << 0) /* device removable flags */
78#define RH_B_PPCM (0xffff << 16) /* port power control mask */
79#define HCRHSTATUS 0x14
80#define RH_HS_LPS (1 << 0) /* local power status */
81#define RH_HS_OCI (1 << 1) /* over current indicator */
82#define RH_HS_DRWE (1 << 15) /* device remote wakeup
83 enable */
84#define RH_HS_LPSC (1 << 16) /* local power status change */
85#define RH_HS_OCIC (1 << 17) /* over current indicator
86 change */
87#define RH_HS_CRWE (1 << 31) /* clear remote wakeup
88 enable */
89#define HCRHPORT1 0x15
90#define RH_PS_CCS (1 << 0) /* current connect status */
91#define RH_PS_PES (1 << 1) /* port enable status */
92#define RH_PS_PSS (1 << 2) /* port suspend status */
93#define RH_PS_POCI (1 << 3) /* port over current
94 indicator */
95#define RH_PS_PRS (1 << 4) /* port reset status */
96#define RH_PS_PPS (1 << 8) /* port power status */
97#define RH_PS_LSDA (1 << 9) /* low speed device attached */
98#define RH_PS_CSC (1 << 16) /* connect status change */
99#define RH_PS_PESC (1 << 17) /* port enable status change */
100#define RH_PS_PSSC (1 << 18) /* port suspend status
101 change */
102#define RH_PS_OCIC (1 << 19) /* over current indicator
103 change */
104#define RH_PS_PRSC (1 << 20) /* port reset status change */
105#define HCRHPORT_CLRMASK (0x1f << 16)
106#define HCRHPORT2 0x16
107#define HCHWCFG 0x20
108#define HCHWCFG_15KRSEL (1 << 12)
109#define HCHWCFG_CLKNOTSTOP (1 << 11)
110#define HCHWCFG_ANALOG_OC (1 << 10)
111#define HCHWCFG_DACK_MODE (1 << 8)
112#define HCHWCFG_EOT_POL (1 << 7)
113#define HCHWCFG_DACK_POL (1 << 6)
114#define HCHWCFG_DREQ_POL (1 << 5)
115#define HCHWCFG_DBWIDTH_MASK (0x03 << 3)
116#define HCHWCFG_DBWIDTH(n) (((n) << 3) & HCHWCFG_DBWIDTH_MASK)
117#define HCHWCFG_INT_POL (1 << 2)
118#define HCHWCFG_INT_TRIGGER (1 << 1)
119#define HCHWCFG_INT_ENABLE (1 << 0)
120#define HCDMACFG 0x21
121#define HCDMACFG_BURST_LEN_MASK (0x03 << 5)
122#define HCDMACFG_BURST_LEN(n) (((n) << 5) & HCDMACFG_BURST_LEN_MASK)
123#define HCDMACFG_BURST_LEN_1 HCDMACFG_BURST_LEN(0)
124#define HCDMACFG_BURST_LEN_4 HCDMACFG_BURST_LEN(1)
125#define HCDMACFG_BURST_LEN_8 HCDMACFG_BURST_LEN(2)
126#define HCDMACFG_DMA_ENABLE (1 << 4)
127#define HCDMACFG_BUF_TYPE_MASK (0x07 << 1)
128#define HCDMACFG_CTR_SEL (1 << 2)
129#define HCDMACFG_ITLATL_SEL (1 << 1)
130#define HCDMACFG_DMA_RW_SELECT (1 << 0)
131#define HCXFERCTR 0x22
132#define HCuPINT 0x24
133#define HCuPINT_SOF (1 << 0)
134#define HCuPINT_ATL (1 << 1)
135#define HCuPINT_AIIEOT (1 << 2)
136#define HCuPINT_OPR (1 << 4)
137#define HCuPINT_SUSP (1 << 5)
138#define HCuPINT_CLKRDY (1 << 6)
139#define HCuPINTENB 0x25
140#define HCCHIPID 0x27
141#define HCCHIPID_MASK 0xff00
142#define HCCHIPID_MAGIC 0x6100
143#define HCSCRATCH 0x28
144#define HCSWRES 0x29
145#define HCSWRES_MAGIC 0x00f6
146#define HCITLBUFLEN 0x2a
147#define HCATLBUFLEN 0x2b
148#define HCBUFSTAT 0x2c
149#define HCBUFSTAT_ITL0_FULL (1 << 0)
150#define HCBUFSTAT_ITL1_FULL (1 << 1)
151#define HCBUFSTAT_ATL_FULL (1 << 2)
152#define HCBUFSTAT_ITL0_DONE (1 << 3)
153#define HCBUFSTAT_ITL1_DONE (1 << 4)
154#define HCBUFSTAT_ATL_DONE (1 << 5)
155#define HCRDITL0LEN 0x2d
156#define HCRDITL1LEN 0x2e
157#define HCITLPORT 0x40
158#define HCATLPORT 0x41
159
160/* Philips transfer descriptor */
161struct ptd {
162 u16 count;
163#define PTD_COUNT_MSK (0x3ff << 0)
164#define PTD_TOGGLE_MSK (1 << 10)
165#define PTD_ACTIVE_MSK (1 << 11)
166#define PTD_CC_MSK (0xf << 12)
167 u16 mps;
168#define PTD_MPS_MSK (0x3ff << 0)
169#define PTD_SPD_MSK (1 << 10)
170#define PTD_LAST_MSK (1 << 11)
171#define PTD_EP_MSK (0xf << 12)
172 u16 len;
173#define PTD_LEN_MSK (0x3ff << 0)
174#define PTD_DIR_MSK (3 << 10)
175#define PTD_DIR_SETUP (0)
176#define PTD_DIR_OUT (1)
177#define PTD_DIR_IN (2)
178#define PTD_B5_5_MSK (1 << 13)
179 u16 faddr;
180#define PTD_FA_MSK (0x7f << 0)
181#define PTD_FMT_MSK (1 << 7)
182} __attribute__ ((packed, aligned(2)));
183
184/* PTD accessor macros. */
185#define PTD_GET_COUNT(p) (((p)->count & PTD_COUNT_MSK) >> 0)
186#define PTD_COUNT(v) (((v) << 0) & PTD_COUNT_MSK)
187#define PTD_GET_TOGGLE(p) (((p)->count & PTD_TOGGLE_MSK) >> 10)
188#define PTD_TOGGLE(v) (((v) << 10) & PTD_TOGGLE_MSK)
189#define PTD_GET_ACTIVE(p) (((p)->count & PTD_ACTIVE_MSK) >> 11)
190#define PTD_ACTIVE(v) (((v) << 11) & PTD_ACTIVE_MSK)
191#define PTD_GET_CC(p) (((p)->count & PTD_CC_MSK) >> 12)
192#define PTD_CC(v) (((v) << 12) & PTD_CC_MSK)
193#define PTD_GET_MPS(p) (((p)->mps & PTD_MPS_MSK) >> 0)
194#define PTD_MPS(v) (((v) << 0) & PTD_MPS_MSK)
195#define PTD_GET_SPD(p) (((p)->mps & PTD_SPD_MSK) >> 10)
196#define PTD_SPD(v) (((v) << 10) & PTD_SPD_MSK)
197#define PTD_GET_LAST(p) (((p)->mps & PTD_LAST_MSK) >> 11)
198#define PTD_LAST(v) (((v) << 11) & PTD_LAST_MSK)
199#define PTD_GET_EP(p) (((p)->mps & PTD_EP_MSK) >> 12)
200#define PTD_EP(v) (((v) << 12) & PTD_EP_MSK)
201#define PTD_GET_LEN(p) (((p)->len & PTD_LEN_MSK) >> 0)
202#define PTD_LEN(v) (((v) << 0) & PTD_LEN_MSK)
203#define PTD_GET_DIR(p) (((p)->len & PTD_DIR_MSK) >> 10)
204#define PTD_DIR(v) (((v) << 10) & PTD_DIR_MSK)
205#define PTD_GET_B5_5(p) (((p)->len & PTD_B5_5_MSK) >> 13)
206#define PTD_B5_5(v) (((v) << 13) & PTD_B5_5_MSK)
207#define PTD_GET_FA(p) (((p)->faddr & PTD_FA_MSK) >> 0)
208#define PTD_FA(v) (((v) << 0) & PTD_FA_MSK)
209#define PTD_GET_FMT(p) (((p)->faddr & PTD_FMT_MSK) >> 7)
210#define PTD_FMT(v) (((v) << 7) & PTD_FMT_MSK)
211
212/* Hardware transfer status codes -- CC from ptd->count */
213#define TD_CC_NOERROR 0x00
214#define TD_CC_CRC 0x01
215#define TD_CC_BITSTUFFING 0x02
216#define TD_CC_DATATOGGLEM 0x03
217#define TD_CC_STALL 0x04
218#define TD_DEVNOTRESP 0x05
219#define TD_PIDCHECKFAIL 0x06
220#define TD_UNEXPECTEDPID 0x07
221#define TD_DATAOVERRUN 0x08
222#define TD_DATAUNDERRUN 0x09
223 /* 0x0A, 0x0B reserved for hardware */
224#define TD_BUFFEROVERRUN 0x0C
225#define TD_BUFFERUNDERRUN 0x0D
226 /* 0x0E, 0x0F reserved for HCD */
227#define TD_NOTACCESSED 0x0F
228
229/* map PTD status codes (CC) to errno values */
230static const int cc_to_error[16] = {
231 /* No Error */ 0,
232 /* CRC Error */ -EILSEQ,
233 /* Bit Stuff */ -EPROTO,
234 /* Data Togg */ -EILSEQ,
235 /* Stall */ -EPIPE,
236 /* DevNotResp */ -ETIMEDOUT,
237 /* PIDCheck */ -EPROTO,
238 /* UnExpPID */ -EPROTO,
239 /* DataOver */ -EOVERFLOW,
240 /* DataUnder */ -EREMOTEIO,
241 /* (for hw) */ -EIO,
242 /* (for hw) */ -EIO,
243 /* BufferOver */ -ECOMM,
244 /* BuffUnder */ -ENOSR,
245 /* (for HCD) */ -EALREADY,
246 /* (for HCD) */ -EALREADY
247};
248
249/*--------------------------------------------------------------*/
250
251#define LOG2_PERIODIC_SIZE 5 /* arbitrary; this matches OHCI */
252#define PERIODIC_SIZE (1 << LOG2_PERIODIC_SIZE)
253
254struct isp116x {
255 spinlock_t lock;
256 struct work_struct rh_resume;
257
258 void __iomem *addr_reg;
259 void __iomem *data_reg;
260
261 struct isp116x_platform_data *board;
262
263 struct proc_dir_entry *pde;
264 unsigned long stat1, stat2, stat4, stat8, stat16;
265
266 /* HC registers */
267 u32 intenb; /* "OHCI" interrupts */
268 u16 irqenb; /* uP interrupts */
269
270 /* Root hub registers */
271 u32 rhdesca;
272 u32 rhdescb;
273 u32 rhstatus;
274 u32 rhport[2];
275
276 /* async schedule: control, bulk */
277 struct list_head async;
278
279 /* periodic schedule: int */
280 u16 load[PERIODIC_SIZE];
281 struct isp116x_ep *periodic[PERIODIC_SIZE];
282 unsigned periodic_count;
283 u16 fmindex;
284
285 /* Schedule for the current frame */
286 struct isp116x_ep *atl_active;
287 int atl_buflen;
288 int atl_bufshrt;
289 int atl_last_dir;
290 atomic_t atl_finishing;
291};
292
293static inline struct isp116x *hcd_to_isp116x(struct usb_hcd *hcd)
294{
295 return (struct isp116x *)(hcd->hcd_priv);
296}
297
298static inline struct usb_hcd *isp116x_to_hcd(struct isp116x *isp116x)
299{
300 return container_of((void *)isp116x, struct usb_hcd, hcd_priv);
301}
302
303struct isp116x_ep {
304 struct usb_host_endpoint *hep;
305 struct usb_device *udev;
306 struct ptd ptd;
307
308 u8 maxpacket;
309 u8 epnum;
310 u8 nextpid;
311 u16 error_count;
312 u16 length; /* of current packet */
313 unsigned char *data; /* to databuf */
314 /* queue of active EP's (the ones scheduled for the
315 current frame) */
316 struct isp116x_ep *active;
317
318 /* periodic schedule */
319 u16 period;
320 u16 branch;
321 u16 load;
322 struct isp116x_ep *next;
323
324 /* async schedule */
325 struct list_head schedule;
326};
327
328/*-------------------------------------------------------------------------*/
329
330#ifdef DEBUG
331#define DBG(stuff...) printk(KERN_DEBUG "116x: " stuff)
332#else
333#define DBG(stuff...) do{}while(0)
334#endif
335
336#ifdef VERBOSE
337# define VDBG DBG
338#else
339# define VDBG(stuff...) do{}while(0)
340#endif
341
342#define ERR(stuff...) printk(KERN_ERR "116x: " stuff)
343#define WARN(stuff...) printk(KERN_WARNING "116x: " stuff)
344#define INFO(stuff...) printk(KERN_INFO "116x: " stuff)
345
346/* ------------------------------------------------- */
347
348#if defined(USE_PLATFORM_DELAY)
349#if defined(USE_NDELAY)
350#error USE_PLATFORM_DELAY and USE_NDELAY simultaneously defined.
351#endif
352#define isp116x_delay(h,d) (h)->board->delay( \
353 isp116x_to_hcd(h)->self.controller,d)
354#define isp116x_check_platform_delay(h) ((h)->board->delay == NULL)
355#elif defined(USE_NDELAY)
356#define isp116x_delay(h,d) ndelay(d)
357#define isp116x_check_platform_delay(h) 0
358#else
359#define isp116x_delay(h,d) do{}while(0)
360#define isp116x_check_platform_delay(h) 0
361#endif
362
363#if defined(DEBUG)
364#define IRQ_TEST() BUG_ON(!irqs_disabled())
365#else
366#define IRQ_TEST() do{}while(0)
367#endif
368
369static inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg)
370{
371 IRQ_TEST();
372 writew(reg & 0xff, isp116x->addr_reg);
373 isp116x_delay(isp116x, 300);
374}
375
376static inline void isp116x_write_data16(struct isp116x *isp116x, u16 val)
377{
378 writew(val, isp116x->data_reg);
379 isp116x_delay(isp116x, 150);
380}
381
382static inline void isp116x_raw_write_data16(struct isp116x *isp116x, u16 val)
383{
384 __raw_writew(val, isp116x->data_reg);
385 isp116x_delay(isp116x, 150);
386}
387
388static inline u16 isp116x_read_data16(struct isp116x *isp116x)
389{
390 u16 val;
391
392 val = readw(isp116x->data_reg);
393 isp116x_delay(isp116x, 150);
394 return val;
395}
396
397static inline u16 isp116x_raw_read_data16(struct isp116x *isp116x)
398{
399 u16 val;
400
401 val = __raw_readw(isp116x->data_reg);
402 isp116x_delay(isp116x, 150);
403 return val;
404}
405
406static inline void isp116x_write_data32(struct isp116x *isp116x, u32 val)
407{
408 writew(val & 0xffff, isp116x->data_reg);
409 isp116x_delay(isp116x, 150);
410 writew(val >> 16, isp116x->data_reg);
411 isp116x_delay(isp116x, 150);
412}
413
414static inline u32 isp116x_read_data32(struct isp116x *isp116x)
415{
416 u32 val;
417
418 val = (u32) readw(isp116x->data_reg);
419 isp116x_delay(isp116x, 150);
420 val |= ((u32) readw(isp116x->data_reg)) << 16;
421 isp116x_delay(isp116x, 150);
422 return val;
423}
424
425/* Let's keep register access functions out of line. Hint:
426 we wait at least 150 ns at every access.
427*/
428static u16 isp116x_read_reg16(struct isp116x *isp116x, unsigned reg)
429{
430 isp116x_write_addr(isp116x, reg);
431 return isp116x_read_data16(isp116x);
432}
433
434static u32 isp116x_read_reg32(struct isp116x *isp116x, unsigned reg)
435{
436 isp116x_write_addr(isp116x, reg);
437 return isp116x_read_data32(isp116x);
438}
439
440static void isp116x_write_reg16(struct isp116x *isp116x, unsigned reg,
441 unsigned val)
442{
443 isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET);
444 isp116x_write_data16(isp116x, (u16) (val & 0xffff));
445}
446
447static void isp116x_write_reg32(struct isp116x *isp116x, unsigned reg,
448 unsigned val)
449{
450 isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET);
451 isp116x_write_data32(isp116x, (u32) val);
452}
453
454#define isp116x_show_reg(d,r) { \
455 if ((r) < 0x20) { \
456 DBG("%-12s[%02x]: %08x\n", #r, \
457 r, isp116x_read_reg32(d, r)); \
458 } else { \
459 DBG("%-12s[%02x]: %04x\n", #r, \
460 r, isp116x_read_reg16(d, r)); \
461 } \
462}
463
464static inline void isp116x_show_regs(struct isp116x *isp116x)
465{
466 isp116x_show_reg(isp116x, HCREVISION);
467 isp116x_show_reg(isp116x, HCCONTROL);
468 isp116x_show_reg(isp116x, HCCMDSTAT);
469 isp116x_show_reg(isp116x, HCINTSTAT);
470 isp116x_show_reg(isp116x, HCINTENB);
471 isp116x_show_reg(isp116x, HCFMINTVL);
472 isp116x_show_reg(isp116x, HCFMREM);
473 isp116x_show_reg(isp116x, HCFMNUM);
474 isp116x_show_reg(isp116x, HCLSTHRESH);
475 isp116x_show_reg(isp116x, HCRHDESCA);
476 isp116x_show_reg(isp116x, HCRHDESCB);
477 isp116x_show_reg(isp116x, HCRHSTATUS);
478 isp116x_show_reg(isp116x, HCRHPORT1);
479 isp116x_show_reg(isp116x, HCRHPORT2);
480 isp116x_show_reg(isp116x, HCHWCFG);
481 isp116x_show_reg(isp116x, HCDMACFG);
482 isp116x_show_reg(isp116x, HCXFERCTR);
483 isp116x_show_reg(isp116x, HCuPINT);
484 isp116x_show_reg(isp116x, HCuPINTENB);
485 isp116x_show_reg(isp116x, HCCHIPID);
486 isp116x_show_reg(isp116x, HCSCRATCH);
487 isp116x_show_reg(isp116x, HCITLBUFLEN);
488 isp116x_show_reg(isp116x, HCATLBUFLEN);
489 isp116x_show_reg(isp116x, HCBUFSTAT);
490 isp116x_show_reg(isp116x, HCRDITL0LEN);
491 isp116x_show_reg(isp116x, HCRDITL1LEN);
492}
493
494#if defined(URB_TRACE)
495
496#define PIPETYPE(pipe) ({ char *__s; \
497 if (usb_pipecontrol(pipe)) __s = "ctrl"; \
498 else if (usb_pipeint(pipe)) __s = "int"; \
499 else if (usb_pipebulk(pipe)) __s = "bulk"; \
500 else __s = "iso"; \
501 __s;})
502#define PIPEDIR(pipe) ({ usb_pipein(pipe) ? "in" : "out"; })
503#define URB_NOTSHORT(urb) ({ (urb)->transfer_flags & URB_SHORT_NOT_OK ? \
504 "short_not_ok" : ""; })
505
506/* print debug info about the URB */
507static void urb_dbg(struct urb *urb, char *msg)
508{
509 unsigned int pipe;
510
511 if (!urb) {
512 DBG("%s: zero urb\n", msg);
513 return;
514 }
515 pipe = urb->pipe;
516 DBG("%s: FA %d ep%d%s %s: len %d/%d %s\n", msg,
517 usb_pipedevice(pipe), usb_pipeendpoint(pipe),
518 PIPEDIR(pipe), PIPETYPE(pipe),
519 urb->transfer_buffer_length, urb->actual_length, URB_NOTSHORT(urb));
520}
521
522#else
523
524#define urb_dbg(urb,msg) do{}while(0)
525
526#endif /* ! defined(URB_TRACE) */
527
528#if defined(PTD_TRACE)
529
530#define PTD_DIR_STR(ptd) ({char __c; \
531 switch(PTD_GET_DIR(ptd)){ \
532 case 0: __c = 's'; break; \
533 case 1: __c = 'o'; break; \
534 default: __c = 'i'; break; \
535 }; __c;})
536
537/*
538 Dump PTD info. The code documents the format
539 perfectly, right :)
540*/
541static inline void dump_ptd(struct ptd *ptd)
542{
543 printk("td: %x %d%c%d %d,%d,%d %x %x%x%x\n",
544 PTD_GET_CC(ptd), PTD_GET_FA(ptd),
545 PTD_DIR_STR(ptd), PTD_GET_EP(ptd),
546 PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
547 PTD_GET_TOGGLE(ptd), PTD_GET_ACTIVE(ptd),
548 PTD_GET_SPD(ptd), PTD_GET_LAST(ptd));
549}
550
551static inline void dump_ptd_out_data(struct ptd *ptd, u8 * buf)
552{
553 int k;
554
555 if (PTD_GET_DIR(ptd) != PTD_DIR_IN && PTD_GET_LEN(ptd)) {
556 printk("-> ");
557 for (k = 0; k < PTD_GET_LEN(ptd); ++k)
558 printk("%02x ", ((u8 *) buf)[k]);
559 printk("\n");
560 }
561}
562
563static inline void dump_ptd_in_data(struct ptd *ptd, u8 * buf)
564{
565 int k;
566
567 if (PTD_GET_DIR(ptd) == PTD_DIR_IN && PTD_GET_COUNT(ptd)) {
568 printk("<- ");
569 for (k = 0; k < PTD_GET_COUNT(ptd); ++k)
570 printk("%02x ", ((u8 *) buf)[k]);
571 printk("\n");
572 }
573 if (PTD_GET_LAST(ptd))
574 printk("-\n");
575}
576
577#else
578
579#define dump_ptd(ptd) do{}while(0)
580#define dump_ptd_in_data(ptd,buf) do{}while(0)
581#define dump_ptd_out_data(ptd,buf) do{}while(0)
582
583#endif /* ! defined(PTD_TRACE) */
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 1e27f10c1592..13cd2177b557 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -95,12 +95,11 @@
95#include <linux/init.h> 95#include <linux/init.h>
96#include <linux/timer.h> 96#include <linux/timer.h>
97#include <linux/list.h> 97#include <linux/list.h>
98#include <linux/interrupt.h> /* for in_interrupt () */
99#include <linux/usb.h> 98#include <linux/usb.h>
100#include <linux/usb_otg.h> 99#include <linux/usb_otg.h>
101#include "../core/hcd.h"
102#include <linux/dma-mapping.h> 100#include <linux/dma-mapping.h>
103#include <linux/dmapool.h> /* needed by ohci-mem.c when no PCI */ 101#include <linux/dmapool.h>
102#include <linux/reboot.h>
104 103
105#include <asm/io.h> 104#include <asm/io.h>
106#include <asm/irq.h> 105#include <asm/irq.h>
@@ -108,8 +107,9 @@
108#include <asm/unaligned.h> 107#include <asm/unaligned.h>
109#include <asm/byteorder.h> 108#include <asm/byteorder.h>
110 109
110#include "../core/hcd.h"
111 111
112#define DRIVER_VERSION "2004 Nov 08" 112#define DRIVER_VERSION "2005 April 22"
113#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell" 113#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
114#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver" 114#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
115 115
@@ -141,6 +141,7 @@ static const char hcd_name [] = "ohci_hcd";
141static void ohci_dump (struct ohci_hcd *ohci, int verbose); 141static void ohci_dump (struct ohci_hcd *ohci, int verbose);
142static int ohci_init (struct ohci_hcd *ohci); 142static int ohci_init (struct ohci_hcd *ohci);
143static void ohci_stop (struct usb_hcd *hcd); 143static void ohci_stop (struct usb_hcd *hcd);
144static int ohci_reboot (struct notifier_block *, unsigned long , void *);
144 145
145#include "ohci-hub.c" 146#include "ohci-hub.c"
146#include "ohci-dbg.c" 147#include "ohci-dbg.c"
@@ -420,6 +421,23 @@ static void ohci_usb_reset (struct ohci_hcd *ohci)
420 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 421 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
421} 422}
422 423
424/* reboot notifier forcibly disables IRQs and DMA, helping kexec and
425 * other cases where the next software may expect clean state from the
426 * "firmware". this is bus-neutral, unlike shutdown() methods.
427 */
428static int
429ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
430{
431 struct ohci_hcd *ohci;
432
433 ohci = container_of (block, struct ohci_hcd, reboot_notifier);
434 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
435 ohci_usb_reset (ohci);
436 /* flush the writes */
437 (void) ohci_readl (ohci, &ohci->regs->control);
438 return 0;
439}
440
423/*-------------------------------------------------------------------------* 441/*-------------------------------------------------------------------------*
424 * HC functions 442 * HC functions
425 *-------------------------------------------------------------------------*/ 443 *-------------------------------------------------------------------------*/
@@ -487,13 +505,10 @@ static int ohci_init (struct ohci_hcd *ohci)
487/* Start an OHCI controller, set the BUS operational 505/* Start an OHCI controller, set the BUS operational
488 * resets USB and controller 506 * resets USB and controller
489 * enable interrupts 507 * enable interrupts
490 * connect the virtual root hub
491 */ 508 */
492static int ohci_run (struct ohci_hcd *ohci) 509static int ohci_run (struct ohci_hcd *ohci)
493{ 510{
494 u32 mask, temp; 511 u32 mask, temp;
495 struct usb_device *udev;
496 struct usb_bus *bus;
497 int first = ohci->fminterval == 0; 512 int first = ohci->fminterval == 0;
498 513
499 disable (ohci); 514 disable (ohci);
@@ -654,37 +669,13 @@ retry:
654 669
655 // POTPGT delay is bits 24-31, in 2 ms units. 670 // POTPGT delay is bits 24-31, in 2 ms units.
656 mdelay ((temp >> 23) & 0x1fe); 671 mdelay ((temp >> 23) & 0x1fe);
657 bus = &ohci_to_hcd(ohci)->self;
658 ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; 672 ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
659 673
660 ohci_dump (ohci, 1); 674 ohci_dump (ohci, 1);
661 675
662 udev = bus->root_hub; 676 if (ohci_to_hcd(ohci)->self.root_hub == NULL)
663 if (udev) { 677 create_debug_files (ohci);
664 return 0;
665 }
666
667 /* connect the virtual root hub */
668 udev = usb_alloc_dev (NULL, bus, 0);
669 if (!udev) {
670 disable (ohci);
671 ohci->hc_control &= ~OHCI_CTRL_HCFS;
672 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
673 return -ENOMEM;
674 }
675
676 udev->speed = USB_SPEED_FULL;
677 if (usb_hcd_register_root_hub (udev, ohci_to_hcd(ohci)) != 0) {
678 usb_put_dev (udev);
679 disable (ohci);
680 ohci->hc_control &= ~OHCI_CTRL_HCFS;
681 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
682 return -ENODEV;
683 }
684 if (ohci->power_budget)
685 hub_set_power_budget(udev, ohci->power_budget);
686 678
687 create_debug_files (ohci);
688 return 0; 679 return 0;
689} 680}
690 681
@@ -781,6 +772,7 @@ static void ohci_stop (struct usb_hcd *hcd)
781 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); 772 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
782 773
783 remove_debug_files (ohci); 774 remove_debug_files (ohci);
775 unregister_reboot_notifier (&ohci->reboot_notifier);
784 ohci_mem_cleanup (ohci); 776 ohci_mem_cleanup (ohci);
785 if (ohci->hcca) { 777 if (ohci->hcca) {
786 dma_free_coherent (hcd->self.controller, 778 dma_free_coherent (hcd->self.controller,
diff --git a/drivers/usb/host/ohci-mem.c b/drivers/usb/host/ohci-mem.c
index e55682b4919d..23735a36af00 100644
--- a/drivers/usb/host/ohci-mem.c
+++ b/drivers/usb/host/ohci-mem.c
@@ -29,6 +29,7 @@ static void ohci_hcd_init (struct ohci_hcd *ohci)
29 spin_lock_init (&ohci->lock); 29 spin_lock_init (&ohci->lock);
30 INIT_LIST_HEAD (&ohci->pending); 30 INIT_LIST_HEAD (&ohci->pending);
31 INIT_WORK (&ohci->rh_resume, ohci_rh_resume, ohci_to_hcd(ohci)); 31 INIT_WORK (&ohci->rh_resume, ohci_rh_resume, ohci_to_hcd(ohci));
32 ohci->reboot_notifier.notifier_call = ohci_reboot;
32} 33}
33 34
34/*-------------------------------------------------------------------------*/ 35/*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 8aab5907afe9..b62d69937694 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -181,7 +181,7 @@ static int omap_start_hc(struct ohci_hcd *ohci, struct platform_device *pdev)
181 if (config->otg) { 181 if (config->otg) {
182 ohci_to_hcd(ohci)->self.otg_port = config->otg; 182 ohci_to_hcd(ohci)->self.otg_port = config->otg;
183 /* default/minimum OTG power budget: 8 mA */ 183 /* default/minimum OTG power budget: 8 mA */
184 ohci->power_budget = 8; 184 ohci_to_hcd(ohci)->power_budget = 8;
185 } 185 }
186 186
187 /* boards can use OTG transceivers in non-OTG modes */ 187 /* boards can use OTG transceivers in non-OTG modes */
@@ -230,7 +230,7 @@ static int omap_start_hc(struct ohci_hcd *ohci, struct platform_device *pdev)
230 230
231 /* TPS2045 switch for internal transceiver (port 1) */ 231 /* TPS2045 switch for internal transceiver (port 1) */
232 if (machine_is_omap_osk()) { 232 if (machine_is_omap_osk()) {
233 ohci->power_budget = 250; 233 ohci_to_hcd(ohci)->power_budget = 250;
234 234
235 rh &= ~RH_A_NOCP; 235 rh &= ~RH_A_NOCP;
236 236
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 22e1ac138ac0..71cdd2262860 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -371,7 +371,6 @@ struct ohci_hcd {
371 * other external transceivers should be software-transparent 371 * other external transceivers should be software-transparent
372 */ 372 */
373 struct otg_transceiver *transceiver; 373 struct otg_transceiver *transceiver;
374 unsigned power_budget;
375 374
376 /* 375 /*
377 * memory management for queue data structures 376 * memory management for queue data structures
@@ -390,6 +389,7 @@ struct ohci_hcd {
390 u32 fminterval; /* saved register */ 389 u32 fminterval; /* saved register */
391 390
392 struct work_struct rh_resume; 391 struct work_struct rh_resume;
392 struct notifier_block reboot_notifier;
393 393
394 unsigned long flags; /* for HC bugs */ 394 unsigned long flags; /* for HC bugs */
395#define OHCI_QUIRK_AMD756 0x01 /* erratum #4 */ 395#define OHCI_QUIRK_AMD756 0x01 /* erratum #4 */
diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c
index 99d43f758ad0..6c3f910bc307 100644
--- a/drivers/usb/host/sl811-hcd.c
+++ b/drivers/usb/host/sl811-hcd.c
@@ -1563,29 +1563,15 @@ static int
1563sl811h_start(struct usb_hcd *hcd) 1563sl811h_start(struct usb_hcd *hcd)
1564{ 1564{
1565 struct sl811 *sl811 = hcd_to_sl811(hcd); 1565 struct sl811 *sl811 = hcd_to_sl811(hcd);
1566 struct usb_device *udev;
1567 1566
1568 /* chip has been reset, VBUS power is off */ 1567 /* chip has been reset, VBUS power is off */
1569
1570 udev = usb_alloc_dev(NULL, &hcd->self, 0);
1571 if (!udev)
1572 return -ENOMEM;
1573
1574 udev->speed = USB_SPEED_FULL;
1575 hcd->state = HC_STATE_RUNNING; 1568 hcd->state = HC_STATE_RUNNING;
1576 1569
1577 if (sl811->board) 1570 if (sl811->board) {
1578 hcd->can_wakeup = sl811->board->can_wakeup; 1571 hcd->can_wakeup = sl811->board->can_wakeup;
1579 1572 hcd->power_budget = sl811->board->power * 2;
1580 if (usb_hcd_register_root_hub(udev, hcd) != 0) {
1581 usb_put_dev(udev);
1582 sl811h_stop(hcd);
1583 return -ENODEV;
1584 } 1573 }
1585 1574
1586 if (sl811->board && sl811->board->power)
1587 hub_set_power_budget(udev, sl811->board->power * 2);
1588
1589 /* enable power and interupts */ 1575 /* enable power and interupts */
1590 port_power(sl811, 1); 1576 port_power(sl811, 1);
1591 1577
diff --git a/drivers/usb/host/uhci-debug.c b/drivers/usb/host/uhci-debug.c
index 24c73c5a3435..4538a98b6f9d 100644
--- a/drivers/usb/host/uhci-debug.c
+++ b/drivers/usb/host/uhci-debug.c
@@ -237,6 +237,37 @@ static int uhci_show_sc(int port, unsigned short status, char *buf, int len)
237 return out - buf; 237 return out - buf;
238} 238}
239 239
240static int uhci_show_root_hub_state(struct uhci_hcd *uhci, char *buf, int len)
241{
242 char *out = buf;
243 char *rh_state;
244
245 /* Try to make sure there's enough memory */
246 if (len < 60)
247 return 0;
248
249 switch (uhci->rh_state) {
250 case UHCI_RH_RESET:
251 rh_state = "reset"; break;
252 case UHCI_RH_SUSPENDED:
253 rh_state = "suspended"; break;
254 case UHCI_RH_AUTO_STOPPED:
255 rh_state = "auto-stopped"; break;
256 case UHCI_RH_RESUMING:
257 rh_state = "resuming"; break;
258 case UHCI_RH_SUSPENDING:
259 rh_state = "suspending"; break;
260 case UHCI_RH_RUNNING:
261 rh_state = "running"; break;
262 case UHCI_RH_RUNNING_NODEVS:
263 rh_state = "running, no devs"; break;
264 default:
265 rh_state = "?"; break;
266 }
267 out += sprintf(out, "Root-hub state: %s\n", rh_state);
268 return out - buf;
269}
270
240static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len) 271static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len)
241{ 272{
242 char *out = buf; 273 char *out = buf;
@@ -408,6 +439,7 @@ static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len)
408 439
409 spin_lock_irqsave(&uhci->lock, flags); 440 spin_lock_irqsave(&uhci->lock, flags);
410 441
442 out += uhci_show_root_hub_state(uhci, out, len - (out - buf));
411 out += sprintf(out, "HC status\n"); 443 out += sprintf(out, "HC status\n");
412 out += uhci_show_status(uhci, out, len - (out - buf)); 444 out += uhci_show_status(uhci, out, len - (out - buf));
413 445
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
index 49bd83ee0c75..0d5d2545bf07 100644
--- a/drivers/usb/host/uhci-hcd.c
+++ b/drivers/usb/host/uhci-hcd.c
@@ -13,18 +13,13 @@
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface 13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). 14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) 15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu 16 * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
17 * 17 *
18 * Intel documents this fairly well, and as far as I know there 18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are 19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a 20 * people who decided that they want to do the same thing in a
21 * completely different way. 21 * completely different way.
22 * 22 *
23 * WARNING! The USB documentation is downright evil. Most of it
24 * is just crap, written by a committee. You're better off ignoring
25 * most of it, the important stuff is:
26 * - the low-level protocol (fairly simple but lots of small details)
27 * - working around the horridness of the rest
28 */ 23 */
29 24
30#include <linux/config.h> 25#include <linux/config.h>
@@ -64,7 +59,7 @@
64/* 59/*
65 * Version Information 60 * Version Information
66 */ 61 */
67#define DRIVER_VERSION "v2.2" 62#define DRIVER_VERSION "v2.3"
68#define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ 63#define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
69Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ 64Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
70Alan Stern" 65Alan Stern"
@@ -89,8 +84,9 @@ static char *errbuf;
89 84
90static kmem_cache_t *uhci_up_cachep; /* urb_priv */ 85static kmem_cache_t *uhci_up_cachep; /* urb_priv */
91 86
87static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
88static void wakeup_rh(struct uhci_hcd *uhci);
92static void uhci_get_current_frame_number(struct uhci_hcd *uhci); 89static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
93static void hc_state_transitions(struct uhci_hcd *uhci);
94 90
95/* If a transfer is still active after this much time, turn off FSBR */ 91/* If a transfer is still active after this much time, turn off FSBR */
96#define IDLE_TIMEOUT msecs_to_jiffies(50) 92#define IDLE_TIMEOUT msecs_to_jiffies(50)
@@ -101,308 +97,352 @@ static void hc_state_transitions(struct uhci_hcd *uhci);
101/* to make sure it doesn't hog all of the bandwidth */ 97/* to make sure it doesn't hog all of the bandwidth */
102#define DEPTH_INTERVAL 5 98#define DEPTH_INTERVAL 5
103 99
100static inline void restart_timer(struct uhci_hcd *uhci)
101{
102 mod_timer(&uhci->stall_timer, jiffies + msecs_to_jiffies(100));
103}
104
104#include "uhci-hub.c" 105#include "uhci-hub.c"
105#include "uhci-debug.c" 106#include "uhci-debug.c"
106#include "uhci-q.c" 107#include "uhci-q.c"
107 108
108static int init_stall_timer(struct usb_hcd *hcd); 109/*
109 110 * Make sure the controller is completely inactive, unable to
110static void stall_callback(unsigned long ptr) 111 * generate interrupts or do DMA.
112 */
113static void reset_hc(struct uhci_hcd *uhci)
111{ 114{
112 struct usb_hcd *hcd = (struct usb_hcd *)ptr; 115 int port;
113 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
114 struct urb_priv *up;
115 unsigned long flags;
116 116
117 spin_lock_irqsave(&uhci->lock, flags); 117 /* Turn off PIRQ enable and SMI enable. (This also turns off the
118 uhci_scan_schedule(uhci, NULL); 118 * BIOS's USB Legacy Support.) Turn off all the R/WC bits too.
119 119 */
120 list_for_each_entry(up, &uhci->urb_list, urb_list) { 120 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
121 struct urb *u = up->urb; 121 USBLEGSUP_RWC);
122
123 spin_lock(&u->lock);
124
125 /* Check if the FSBR timed out */
126 if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT))
127 uhci_fsbr_timeout(uhci, u);
128 122
129 spin_unlock(&u->lock); 123 /* Reset the HC - this will force us to get a
130 } 124 * new notification of any already connected
125 * ports due to the virtual disconnect that it
126 * implies.
127 */
128 outw(USBCMD_HCRESET, uhci->io_addr + USBCMD);
129 mb();
130 udelay(5);
131 if (inw(uhci->io_addr + USBCMD) & USBCMD_HCRESET)
132 dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
131 133
132 /* Really disable FSBR */ 134 /* Just to be safe, disable interrupt requests and
133 if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) { 135 * make sure the controller is stopped.
134 uhci->fsbrtimeout = 0; 136 */
135 uhci->skel_term_qh->link = UHCI_PTR_TERM; 137 outw(0, uhci->io_addr + USBINTR);
136 } 138 outw(0, uhci->io_addr + USBCMD);
137 139
138 /* Poll for and perform state transitions */ 140 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
139 hc_state_transitions(uhci); 141 * bits in the port status and control registers.
140 if (unlikely(uhci->suspended_ports && uhci->state != UHCI_SUSPENDED)) 142 * We have to clear them by hand.
141 uhci_check_ports(uhci); 143 */
144 for (port = 0; port < uhci->rh_numports; ++port)
145 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
142 146
143 init_stall_timer(hcd); 147 uhci->port_c_suspend = uhci->suspended_ports =
144 spin_unlock_irqrestore(&uhci->lock, flags); 148 uhci->resuming_ports = 0;
149 uhci->rh_state = UHCI_RH_RESET;
150 uhci->is_stopped = UHCI_IS_STOPPED;
151 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
152 uhci_to_hcd(uhci)->poll_rh = 0;
145} 153}
146 154
147static int init_stall_timer(struct usb_hcd *hcd) 155/*
156 * Last rites for a defunct/nonfunctional controller
157 * or one we don't want to use any more.
158 */
159static void hc_died(struct uhci_hcd *uhci)
148{ 160{
149 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 161 reset_hc(uhci);
150 162 uhci->hc_inaccessible = 1;
151 init_timer(&uhci->stall_timer); 163 del_timer(&uhci->stall_timer);
152 uhci->stall_timer.function = stall_callback;
153 uhci->stall_timer.data = (unsigned long)hcd;
154 uhci->stall_timer.expires = jiffies + msecs_to_jiffies(100);
155 add_timer(&uhci->stall_timer);
156
157 return 0;
158} 164}
159 165
160static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs) 166/*
167 * Initialize a controller that was newly discovered or has just been
168 * resumed. In either case we can't be sure of its previous state.
169 */
170static void check_and_reset_hc(struct uhci_hcd *uhci)
161{ 171{
162 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 172 u16 legsup;
163 unsigned long io_addr = uhci->io_addr; 173 unsigned int cmd, intr;
164 unsigned short status;
165 174
166 /* 175 /*
167 * Read the interrupt status, and write it back to clear the 176 * When restarting a suspended controller, we expect all the
168 * interrupt cause. Contrary to the UHCI specification, the 177 * settings to be the same as we left them:
169 * "HC Halted" status bit is persistent: it is RO, not R/WC. 178 *
179 * PIRQ and SMI disabled, no R/W bits set in USBLEGSUP;
180 * Controller is stopped and configured with EGSM set;
181 * No interrupts enabled except possibly Resume Detect.
182 *
183 * If any of these conditions are violated we do a complete reset.
170 */ 184 */
171 status = inw(io_addr + USBSTS); 185 pci_read_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, &legsup);
172 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ 186 if (legsup & ~(USBLEGSUP_RO | USBLEGSUP_RWC)) {
173 return IRQ_NONE; 187 dev_dbg(uhci_dev(uhci), "%s: legsup = 0x%04x\n",
174 outw(status, io_addr + USBSTS); /* Clear it */ 188 __FUNCTION__, legsup);
175 189 goto reset_needed;
176 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
177 if (status & USBSTS_HSE)
178 dev_err(uhci_dev(uhci), "host system error, "
179 "PCI problems?\n");
180 if (status & USBSTS_HCPE)
181 dev_err(uhci_dev(uhci), "host controller process "
182 "error, something bad happened!\n");
183 if ((status & USBSTS_HCH) && uhci->state > 0) {
184 dev_err(uhci_dev(uhci), "host controller halted, "
185 "very bad!\n");
186 /* FIXME: Reset the controller, fix the offending TD */
187 }
188 } 190 }
189 191
190 if (status & USBSTS_RD) 192 cmd = inw(uhci->io_addr + USBCMD);
191 uhci->resume_detect = 1; 193 if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
194 dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
195 __FUNCTION__, cmd);
196 goto reset_needed;
197 }
192 198
193 spin_lock(&uhci->lock); 199 intr = inw(uhci->io_addr + USBINTR);
194 uhci_scan_schedule(uhci, regs); 200 if (intr & (~USBINTR_RESUME)) {
195 spin_unlock(&uhci->lock); 201 dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
202 __FUNCTION__, intr);
203 goto reset_needed;
204 }
205 return;
196 206
197 return IRQ_HANDLED; 207reset_needed:
208 dev_dbg(uhci_dev(uhci), "Performing full reset\n");
209 reset_hc(uhci);
198} 210}
199 211
200static void reset_hc(struct uhci_hcd *uhci) 212/*
213 * Store the basic register settings needed by the controller.
214 */
215static void configure_hc(struct uhci_hcd *uhci)
201{ 216{
202 unsigned long io_addr = uhci->io_addr; 217 /* Set the frame length to the default: 1 ms exactly */
218 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
203 219
204 /* Turn off PIRQ, SMI, and all interrupts. This also turns off 220 /* Store the frame list base address */
205 * the BIOS's USB Legacy Support. 221 outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD);
206 */
207 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
208 outw(0, uhci->io_addr + USBINTR);
209 222
210 /* Global reset for 50ms */ 223 /* Set the current frame number */
211 uhci->state = UHCI_RESET; 224 outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
212 outw(USBCMD_GRESET, io_addr + USBCMD);
213 msleep(50);
214 outw(0, io_addr + USBCMD);
215 225
216 /* Another 10ms delay */ 226 /* Mark controller as running before we enable interrupts */
217 msleep(10); 227 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
218 uhci->resume_detect = 0; 228 mb();
219 uhci->is_stopped = UHCI_IS_STOPPED; 229
230 /* Enable PIRQ */
231 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
232 USBLEGSUP_DEFAULT);
220} 233}
221 234
222static void suspend_hc(struct uhci_hcd *uhci) 235
236static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
223{ 237{
224 unsigned long io_addr = uhci->io_addr; 238 int port;
225 239
226 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); 240 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
227 uhci->state = UHCI_SUSPENDED; 241 default:
228 uhci->resume_detect = 0; 242 break;
229 outw(USBCMD_EGSM, io_addr + USBCMD);
230 243
231 /* FIXME: Wait for the controller to actually stop */ 244 case PCI_VENDOR_ID_GENESYS:
232 uhci_get_current_frame_number(uhci); 245 /* Genesys Logic's GL880S controllers don't generate
233 uhci->is_stopped = UHCI_IS_STOPPED; 246 * resume-detect interrupts.
247 */
248 return 1;
234 249
235 uhci_scan_schedule(uhci, NULL); 250 case PCI_VENDOR_ID_INTEL:
251 /* Some of Intel's USB controllers have a bug that causes
252 * resume-detect interrupts if any port has an over-current
253 * condition. To make matters worse, some motherboards
254 * hardwire unused USB ports' over-current inputs active!
255 * To prevent problems, we will not enable resume-detect
256 * interrupts if any ports are OC.
257 */
258 for (port = 0; port < uhci->rh_numports; ++port) {
259 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
260 USBPORTSC_OC)
261 return 1;
262 }
263 break;
264 }
265 return 0;
236} 266}
237 267
238static void wakeup_hc(struct uhci_hcd *uhci) 268static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
269__releases(uhci->lock)
270__acquires(uhci->lock)
239{ 271{
240 unsigned long io_addr = uhci->io_addr; 272 int auto_stop;
273 int int_enable;
241 274
242 switch (uhci->state) { 275 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
243 case UHCI_SUSPENDED: /* Start the resume */ 276 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
244 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); 277 (auto_stop ? " (auto-stop)" : ""));
245
246 /* Global resume for >= 20ms */
247 outw(USBCMD_FGR | USBCMD_EGSM, io_addr + USBCMD);
248 uhci->state = UHCI_RESUMING_1;
249 uhci->state_end = jiffies + msecs_to_jiffies(20);
250 uhci->is_stopped = 0;
251 break;
252 278
253 case UHCI_RESUMING_1: /* End global resume */ 279 /* If we get a suspend request when we're already auto-stopped
254 uhci->state = UHCI_RESUMING_2; 280 * then there's nothing to do.
255 outw(0, io_addr + USBCMD); 281 */
256 /* Falls through */ 282 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
257 283 uhci->rh_state = new_state;
258 case UHCI_RESUMING_2: /* Wait for EOP to be sent */ 284 return;
259 if (inw(io_addr + USBCMD) & USBCMD_FGR) 285 }
260 break;
261
262 /* Run for at least 1 second, and
263 * mark it configured with a 64-byte max packet */
264 uhci->state = UHCI_RUNNING_GRACE;
265 uhci->state_end = jiffies + HZ;
266 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP,
267 io_addr + USBCMD);
268 break;
269 286
270 case UHCI_RUNNING_GRACE: /* Now allowed to suspend */ 287 /* Enable resume-detect interrupts if they work.
271 uhci->state = UHCI_RUNNING; 288 * Then enter Global Suspend mode, still configured.
272 break; 289 */
290 int_enable = (resume_detect_interrupts_are_broken(uhci) ?
291 0 : USBINTR_RESUME);
292 outw(int_enable, uhci->io_addr + USBINTR);
293 outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
294 mb();
295 udelay(5);
273 296
274 default: 297 /* If we're auto-stopping then no devices have been attached
275 break; 298 * for a while, so there shouldn't be any active URBs and the
299 * controller should stop after a few microseconds. Otherwise
300 * we will give the controller one frame to stop.
301 */
302 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
303 uhci->rh_state = UHCI_RH_SUSPENDING;
304 spin_unlock_irq(&uhci->lock);
305 msleep(1);
306 spin_lock_irq(&uhci->lock);
307 if (uhci->hc_inaccessible) /* Died */
308 return;
276 } 309 }
277} 310 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
311 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
278 312
279static int ports_active(struct uhci_hcd *uhci) 313 uhci_get_current_frame_number(uhci);
280{ 314 smp_wmb();
281 unsigned long io_addr = uhci->io_addr;
282 int connection = 0;
283 int i;
284 315
285 for (i = 0; i < uhci->rh_numports; i++) 316 uhci->rh_state = new_state;
286 connection |= (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_CCS); 317 uhci->is_stopped = UHCI_IS_STOPPED;
318 del_timer(&uhci->stall_timer);
319 uhci_to_hcd(uhci)->poll_rh = !int_enable;
287 320
288 return connection; 321 uhci_scan_schedule(uhci, NULL);
289} 322}
290 323
291static int suspend_allowed(struct uhci_hcd *uhci) 324static void start_rh(struct uhci_hcd *uhci)
292{ 325{
293 unsigned long io_addr = uhci->io_addr; 326 uhci->is_stopped = 0;
294 int i; 327 smp_wmb();
295
296 if (to_pci_dev(uhci_dev(uhci))->vendor != PCI_VENDOR_ID_INTEL)
297 return 1;
298 328
299 /* Some of Intel's USB controllers have a bug that causes false 329 /* Mark it configured and running with a 64-byte max packet.
300 * resume indications if any port has an over current condition. 330 * All interrupts are enabled, even though RESUME won't do anything.
301 * To prevent problems, we will not allow a global suspend if
302 * any ports are OC.
303 *
304 * Some motherboards using Intel's chipsets (but not using all
305 * the USB ports) appear to hardwire the over current inputs active
306 * to disable the USB ports.
307 */ 331 */
308 332 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
309 /* check for over current condition on any port */ 333 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
310 for (i = 0; i < uhci->rh_numports; i++) { 334 uhci->io_addr + USBINTR);
311 if (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_OC) 335 mb();
312 return 0; 336 uhci->rh_state = UHCI_RH_RUNNING;
313 } 337 uhci_to_hcd(uhci)->poll_rh = 1;
314 338 restart_timer(uhci);
315 return 1;
316} 339}
317 340
318static void hc_state_transitions(struct uhci_hcd *uhci) 341static void wakeup_rh(struct uhci_hcd *uhci)
342__releases(uhci->lock)
343__acquires(uhci->lock)
319{ 344{
320 switch (uhci->state) { 345 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
321 case UHCI_RUNNING: 346 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
347 " (auto-start)" : "");
322 348
323 /* global suspend if nothing connected for 1 second */ 349 /* If we are auto-stopped then no devices are attached so there's
324 if (!ports_active(uhci) && suspend_allowed(uhci)) { 350 * no need for wakeup signals. Otherwise we send Global Resume
325 uhci->state = UHCI_SUSPENDING_GRACE; 351 * for 20 ms.
326 uhci->state_end = jiffies + HZ; 352 */
327 } 353 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
328 break; 354 uhci->rh_state = UHCI_RH_RESUMING;
329 355 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
330 case UHCI_SUSPENDING_GRACE: 356 uhci->io_addr + USBCMD);
331 if (ports_active(uhci)) 357 spin_unlock_irq(&uhci->lock);
332 uhci->state = UHCI_RUNNING; 358 msleep(20);
333 else if (time_after_eq(jiffies, uhci->state_end)) 359 spin_lock_irq(&uhci->lock);
334 suspend_hc(uhci); 360 if (uhci->hc_inaccessible) /* Died */
335 break; 361 return;
336 362
337 case UHCI_SUSPENDED: 363 /* End Global Resume and wait for EOP to be sent */
338 364 outw(USBCMD_CF, uhci->io_addr + USBCMD);
339 /* wakeup if requested by a device */ 365 mb();
340 if (uhci->resume_detect) 366 udelay(4);
341 wakeup_hc(uhci); 367 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
342 break; 368 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
369 }
343 370
344 case UHCI_RESUMING_1: 371 start_rh(uhci);
345 case UHCI_RESUMING_2:
346 case UHCI_RUNNING_GRACE:
347 if (time_after_eq(jiffies, uhci->state_end))
348 wakeup_hc(uhci);
349 break;
350 372
351 default: 373 /* Restart root hub polling */
352 break; 374 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
353 }
354} 375}
355 376
356/* 377static void stall_callback(unsigned long _uhci)
357 * Store the current frame number in uhci->frame_number if the controller
358 * is runnning
359 */
360static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
361{ 378{
379 struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
380 unsigned long flags;
381
382 spin_lock_irqsave(&uhci->lock, flags);
383 uhci_scan_schedule(uhci, NULL);
384 check_fsbr(uhci);
385
362 if (!uhci->is_stopped) 386 if (!uhci->is_stopped)
363 uhci->frame_number = inw(uhci->io_addr + USBFRNUM); 387 restart_timer(uhci);
388 spin_unlock_irqrestore(&uhci->lock, flags);
364} 389}
365 390
366static int start_hc(struct uhci_hcd *uhci) 391static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
367{ 392{
368 unsigned long io_addr = uhci->io_addr; 393 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
369 int timeout = 10; 394 unsigned short status;
395 unsigned long flags;
370 396
371 /* 397 /*
372 * Reset the HC - this will force us to get a 398 * Read the interrupt status, and write it back to clear the
373 * new notification of any already connected 399 * interrupt cause. Contrary to the UHCI specification, the
374 * ports due to the virtual disconnect that it 400 * "HC Halted" status bit is persistent: it is RO, not R/WC.
375 * implies.
376 */ 401 */
377 outw(USBCMD_HCRESET, io_addr + USBCMD); 402 status = inw(uhci->io_addr + USBSTS);
378 while (inw(io_addr + USBCMD) & USBCMD_HCRESET) { 403 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
379 if (--timeout < 0) { 404 return IRQ_NONE;
380 dev_err(uhci_dev(uhci), "USBCMD_HCRESET timed out!\n"); 405 outw(status, uhci->io_addr + USBSTS); /* Clear it */
381 return -ETIMEDOUT; 406
407 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
408 if (status & USBSTS_HSE)
409 dev_err(uhci_dev(uhci), "host system error, "
410 "PCI problems?\n");
411 if (status & USBSTS_HCPE)
412 dev_err(uhci_dev(uhci), "host controller process "
413 "error, something bad happened!\n");
414 if (status & USBSTS_HCH) {
415 spin_lock_irqsave(&uhci->lock, flags);
416 if (uhci->rh_state >= UHCI_RH_RUNNING) {
417 dev_err(uhci_dev(uhci),
418 "host controller halted, "
419 "very bad!\n");
420 hc_died(uhci);
421 spin_unlock_irqrestore(&uhci->lock, flags);
422 return IRQ_HANDLED;
423 }
424 spin_unlock_irqrestore(&uhci->lock, flags);
382 } 425 }
383 msleep(1);
384 } 426 }
385 427
386 /* Mark controller as running before we enable interrupts */ 428 if (status & USBSTS_RD)
387 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; 429 usb_hcd_poll_rh_status(hcd);
388
389 /* Turn on PIRQ and all interrupts */
390 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
391 USBLEGSUP_DEFAULT);
392 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
393 io_addr + USBINTR);
394 430
395 /* Start at frame 0 */ 431 spin_lock_irqsave(&uhci->lock, flags);
396 outw(0, io_addr + USBFRNUM); 432 uhci_scan_schedule(uhci, regs);
397 outl(uhci->fl->dma_handle, io_addr + USBFLBASEADD); 433 spin_unlock_irqrestore(&uhci->lock, flags);
398 434
399 /* Run and mark it configured with a 64-byte max packet */ 435 return IRQ_HANDLED;
400 uhci->state = UHCI_RUNNING_GRACE; 436}
401 uhci->state_end = jiffies + HZ;
402 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, io_addr + USBCMD);
403 uhci->is_stopped = 0;
404 437
405 return 0; 438/*
439 * Store the current frame number in uhci->frame_number if the controller
440 * is runnning
441 */
442static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
443{
444 if (!uhci->is_stopped)
445 uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
406} 446}
407 447
408/* 448/*
@@ -448,16 +488,58 @@ static void release_uhci(struct uhci_hcd *uhci)
448static int uhci_reset(struct usb_hcd *hcd) 488static int uhci_reset(struct usb_hcd *hcd)
449{ 489{
450 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 490 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
491 unsigned io_size = (unsigned) hcd->rsrc_len;
492 int port;
451 493
452 uhci->io_addr = (unsigned long) hcd->rsrc_start; 494 uhci->io_addr = (unsigned long) hcd->rsrc_start;
453 495
454 /* Kick BIOS off this hardware and reset, so we won't get 496 /* The UHCI spec says devices must have 2 ports, and goes on to say
455 * interrupts from any previous setup. 497 * they may have more but gives no way to determine how many there
498 * are. However according to the UHCI spec, Bit 7 of the port
499 * status and control register is always set to 1. So we try to
500 * use this to our advantage. Another common failure mode when
501 * a nonexistent register is addressed is to return all ones, so
502 * we test for that also.
456 */ 503 */
457 reset_hc(uhci); 504 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
505 unsigned int portstatus;
506
507 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
508 if (!(portstatus & 0x0080) || portstatus == 0xffff)
509 break;
510 }
511 if (debug)
512 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
513
514 /* Anything greater than 7 is weird so we'll ignore it. */
515 if (port > UHCI_RH_MAXCHILD) {
516 dev_info(uhci_dev(uhci), "port count misdetected? "
517 "forcing to 2 ports\n");
518 port = 2;
519 }
520 uhci->rh_numports = port;
521
522 /* Kick BIOS off this hardware and reset if the controller
523 * isn't already safely quiescent.
524 */
525 check_and_reset_hc(uhci);
458 return 0; 526 return 0;
459} 527}
460 528
529/* Make sure the controller is quiescent and that we're not using it
530 * any more. This is mainly for the benefit of programs which, like kexec,
531 * expect the hardware to be idle: not doing DMA or generating IRQs.
532 *
533 * This routine may be called in a damaged or failing kernel. Hence we
534 * do not acquire the spinlock before shutting down the controller.
535 */
536static void uhci_shutdown(struct pci_dev *pdev)
537{
538 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
539
540 hc_died(hcd_to_uhci(hcd));
541}
542
461/* 543/*
462 * Allocate a frame list, and then setup the skeleton 544 * Allocate a frame list, and then setup the skeleton
463 * 545 *
@@ -478,17 +560,20 @@ static int uhci_start(struct usb_hcd *hcd)
478{ 560{
479 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 561 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
480 int retval = -EBUSY; 562 int retval = -EBUSY;
481 int i, port; 563 int i;
482 unsigned io_size;
483 dma_addr_t dma_handle; 564 dma_addr_t dma_handle;
484 struct usb_device *udev;
485 struct dentry *dentry; 565 struct dentry *dentry;
486 566
487 io_size = (unsigned) hcd->rsrc_len; 567 hcd->uses_new_polling = 1;
568 if (pci_find_capability(to_pci_dev(uhci_dev(uhci)), PCI_CAP_ID_PM))
569 hcd->can_wakeup = 1; /* Assume it supports PME# */
488 570
489 dentry = debugfs_create_file(hcd->self.bus_name, S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, &uhci_debug_operations); 571 dentry = debugfs_create_file(hcd->self.bus_name,
572 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci,
573 &uhci_debug_operations);
490 if (!dentry) { 574 if (!dentry) {
491 dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n"); 575 dev_err(uhci_dev(uhci),
576 "couldn't create uhci debugfs entry\n");
492 retval = -ENOMEM; 577 retval = -ENOMEM;
493 goto err_create_debug_entry; 578 goto err_create_debug_entry;
494 } 579 }
@@ -510,6 +595,10 @@ static int uhci_start(struct usb_hcd *hcd)
510 595
511 init_waitqueue_head(&uhci->waitqh); 596 init_waitqueue_head(&uhci->waitqh);
512 597
598 init_timer(&uhci->stall_timer);
599 uhci->stall_timer.function = stall_callback;
600 uhci->stall_timer.data = (unsigned long) uhci;
601
513 uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl), 602 uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
514 &dma_handle, 0); 603 &dma_handle, 0);
515 if (!uhci->fl) { 604 if (!uhci->fl) {
@@ -536,46 +625,14 @@ static int uhci_start(struct usb_hcd *hcd)
536 goto err_create_qh_pool; 625 goto err_create_qh_pool;
537 } 626 }
538 627
539 /* Initialize the root hub */ 628 uhci->term_td = uhci_alloc_td(uhci);
540
541 /* UHCI specs says devices must have 2 ports, but goes on to say */
542 /* they may have more but give no way to determine how many they */
543 /* have. However, according to the UHCI spec, Bit 7 is always set */
544 /* to 1. So we try to use this to our advantage */
545 for (port = 0; port < (io_size - 0x10) / 2; port++) {
546 unsigned int portstatus;
547
548 portstatus = inw(uhci->io_addr + 0x10 + (port * 2));
549 if (!(portstatus & 0x0080))
550 break;
551 }
552 if (debug)
553 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
554
555 /* This is experimental so anything less than 2 or greater than 8 is */
556 /* something weird and we'll ignore it */
557 if (port < 2 || port > UHCI_RH_MAXCHILD) {
558 dev_info(uhci_dev(uhci), "port count misdetected? "
559 "forcing to 2 ports\n");
560 port = 2;
561 }
562
563 uhci->rh_numports = port;
564
565 udev = usb_alloc_dev(NULL, &hcd->self, 0);
566 if (!udev) {
567 dev_err(uhci_dev(uhci), "unable to allocate root hub\n");
568 goto err_alloc_root_hub;
569 }
570
571 uhci->term_td = uhci_alloc_td(uhci, udev);
572 if (!uhci->term_td) { 629 if (!uhci->term_td) {
573 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); 630 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
574 goto err_alloc_term_td; 631 goto err_alloc_term_td;
575 } 632 }
576 633
577 for (i = 0; i < UHCI_NUM_SKELQH; i++) { 634 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
578 uhci->skelqh[i] = uhci_alloc_qh(uhci, udev); 635 uhci->skelqh[i] = uhci_alloc_qh(uhci);
579 if (!uhci->skelqh[i]) { 636 if (!uhci->skelqh[i]) {
580 dev_err(uhci_dev(uhci), "unable to allocate QH\n"); 637 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
581 goto err_alloc_skelqh; 638 goto err_alloc_skelqh;
@@ -641,32 +698,17 @@ static int uhci_start(struct usb_hcd *hcd)
641 698
642 /* 699 /*
643 * Some architectures require a full mb() to enforce completion of 700 * Some architectures require a full mb() to enforce completion of
644 * the memory writes above before the I/O transfers in start_hc(). 701 * the memory writes above before the I/O transfers in configure_hc().
645 */ 702 */
646 mb(); 703 mb();
647 if ((retval = start_hc(uhci)) != 0)
648 goto err_alloc_skelqh;
649
650 init_stall_timer(hcd);
651
652 udev->speed = USB_SPEED_FULL;
653
654 if (usb_hcd_register_root_hub(udev, hcd) != 0) {
655 dev_err(uhci_dev(uhci), "unable to start root hub\n");
656 retval = -ENOMEM;
657 goto err_start_root_hub;
658 }
659 704
705 configure_hc(uhci);
706 start_rh(uhci);
660 return 0; 707 return 0;
661 708
662/* 709/*
663 * error exits: 710 * error exits:
664 */ 711 */
665err_start_root_hub:
666 reset_hc(uhci);
667
668 del_timer_sync(&uhci->stall_timer);
669
670err_alloc_skelqh: 712err_alloc_skelqh:
671 for (i = 0; i < UHCI_NUM_SKELQH; i++) 713 for (i = 0; i < UHCI_NUM_SKELQH; i++)
672 if (uhci->skelqh[i]) { 714 if (uhci->skelqh[i]) {
@@ -678,9 +720,6 @@ err_alloc_skelqh:
678 uhci->term_td = NULL; 720 uhci->term_td = NULL;
679 721
680err_alloc_term_td: 722err_alloc_term_td:
681 usb_put_dev(udev);
682
683err_alloc_root_hub:
684 dma_pool_destroy(uhci->qh_pool); 723 dma_pool_destroy(uhci->qh_pool);
685 uhci->qh_pool = NULL; 724 uhci->qh_pool = NULL;
686 725
@@ -705,73 +744,114 @@ static void uhci_stop(struct usb_hcd *hcd)
705{ 744{
706 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 745 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
707 746
708 del_timer_sync(&uhci->stall_timer);
709 reset_hc(uhci);
710
711 spin_lock_irq(&uhci->lock); 747 spin_lock_irq(&uhci->lock);
748 reset_hc(uhci);
712 uhci_scan_schedule(uhci, NULL); 749 uhci_scan_schedule(uhci, NULL);
713 spin_unlock_irq(&uhci->lock); 750 spin_unlock_irq(&uhci->lock);
714 751
752 del_timer_sync(&uhci->stall_timer);
715 release_uhci(uhci); 753 release_uhci(uhci);
716} 754}
717 755
718#ifdef CONFIG_PM 756#ifdef CONFIG_PM
757static int uhci_rh_suspend(struct usb_hcd *hcd)
758{
759 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
760
761 spin_lock_irq(&uhci->lock);
762 if (!uhci->hc_inaccessible) /* Not dead */
763 suspend_rh(uhci, UHCI_RH_SUSPENDED);
764 spin_unlock_irq(&uhci->lock);
765 return 0;
766}
767
768static int uhci_rh_resume(struct usb_hcd *hcd)
769{
770 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
771 int rc = 0;
772
773 spin_lock_irq(&uhci->lock);
774 if (uhci->hc_inaccessible) {
775 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
776 dev_warn(uhci_dev(uhci), "HC isn't running!\n");
777 rc = -ENODEV;
778 }
779 /* Otherwise the HC is dead */
780 } else
781 wakeup_rh(uhci);
782 spin_unlock_irq(&uhci->lock);
783 return rc;
784}
785
719static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message) 786static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
720{ 787{
721 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 788 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
789 int rc = 0;
790
791 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
722 792
723 spin_lock_irq(&uhci->lock); 793 spin_lock_irq(&uhci->lock);
794 if (uhci->hc_inaccessible) /* Dead or already suspended */
795 goto done;
724 796
725 /* Don't try to suspend broken motherboards, reset instead */ 797#ifndef CONFIG_USB_SUSPEND
726 if (suspend_allowed(uhci)) 798 /* Otherwise this would never happen */
727 suspend_hc(uhci); 799 suspend_rh(uhci, UHCI_RH_SUSPENDED);
728 else { 800#endif
729 spin_unlock_irq(&uhci->lock); 801
730 reset_hc(uhci); 802 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
731 spin_lock_irq(&uhci->lock); 803 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
732 uhci_scan_schedule(uhci, NULL); 804 hcd->state = HC_STATE_RUNNING;
733 } 805 rc = -EBUSY;
806 goto done;
807 };
734 808
809 /* All PCI host controllers are required to disable IRQ generation
810 * at the source, so we must turn off PIRQ.
811 */
812 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
813 uhci->hc_inaccessible = 1;
814
815 /* FIXME: Enable non-PME# remote wakeup? */
816
817done:
735 spin_unlock_irq(&uhci->lock); 818 spin_unlock_irq(&uhci->lock);
736 return 0; 819 if (rc == 0)
820 del_timer_sync(&hcd->rh_timer);
821 return rc;
737} 822}
738 823
739static int uhci_resume(struct usb_hcd *hcd) 824static int uhci_resume(struct usb_hcd *hcd)
740{ 825{
741 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 826 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
742 int rc;
743 827
744 pci_set_master(to_pci_dev(uhci_dev(uhci))); 828 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
745 829
830 if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
831 return 0;
746 spin_lock_irq(&uhci->lock); 832 spin_lock_irq(&uhci->lock);
747 833
748 if (uhci->state == UHCI_SUSPENDED) { 834 /* FIXME: Disable non-PME# remote wakeup? */
749 835
750 /* 836 uhci->hc_inaccessible = 0;
751 * Some systems don't maintain the UHCI register values 837
752 * during a PM suspend/resume cycle, so reinitialize 838 /* The BIOS may have changed the controller settings during a
753 * the Frame Number, Framelist Base Address, Interrupt 839 * system wakeup. Check it and reconfigure to avoid problems.
754 * Enable, and Legacy Support registers. 840 */
755 */ 841 check_and_reset_hc(uhci);
756 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 842 configure_hc(uhci);
757 0); 843
758 outw(uhci->frame_number, uhci->io_addr + USBFRNUM); 844#ifndef CONFIG_USB_SUSPEND
759 outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD); 845 /* Otherwise this would never happen */
760 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | 846 wakeup_rh(uhci);
761 USBINTR_SP, uhci->io_addr + USBINTR); 847#endif
762 uhci->resume_detect = 1; 848 if (uhci->rh_state == UHCI_RH_RESET)
763 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 849 suspend_rh(uhci, UHCI_RH_SUSPENDED);
764 USBLEGSUP_DEFAULT);
765 } else {
766 spin_unlock_irq(&uhci->lock);
767 reset_hc(uhci);
768 if ((rc = start_hc(uhci)) != 0)
769 return rc;
770 spin_lock_irq(&uhci->lock);
771 }
772 hcd->state = HC_STATE_RUNNING;
773 850
774 spin_unlock_irq(&uhci->lock); 851 spin_unlock_irq(&uhci->lock);
852
853 if (hcd->poll_rh)
854 usb_hcd_poll_rh_status(hcd);
775 return 0; 855 return 0;
776} 856}
777#endif 857#endif
@@ -788,13 +868,15 @@ static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
788static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) 868static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
789{ 869{
790 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 870 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
791 int frame_number;
792 unsigned long flags; 871 unsigned long flags;
872 int is_stopped;
873 int frame_number;
793 874
794 /* Minimize latency by avoiding the spinlock */ 875 /* Minimize latency by avoiding the spinlock */
795 local_irq_save(flags); 876 local_irq_save(flags);
796 rmb(); 877 is_stopped = uhci->is_stopped;
797 frame_number = (uhci->is_stopped ? uhci->frame_number : 878 smp_rmb();
879 frame_number = (is_stopped ? uhci->frame_number :
798 inw(uhci->io_addr + USBFRNUM)); 880 inw(uhci->io_addr + USBFRNUM));
799 local_irq_restore(flags); 881 local_irq_restore(flags);
800 return frame_number; 882 return frame_number;
@@ -817,6 +899,8 @@ static const struct hc_driver uhci_driver = {
817#ifdef CONFIG_PM 899#ifdef CONFIG_PM
818 .suspend = uhci_suspend, 900 .suspend = uhci_suspend,
819 .resume = uhci_resume, 901 .resume = uhci_resume,
902 .hub_suspend = uhci_rh_suspend,
903 .hub_resume = uhci_rh_resume,
820#endif 904#endif
821 .stop = uhci_stop, 905 .stop = uhci_stop,
822 906
@@ -845,6 +929,7 @@ static struct pci_driver uhci_pci_driver = {
845 929
846 .probe = usb_hcd_pci_probe, 930 .probe = usb_hcd_pci_probe,
847 .remove = usb_hcd_pci_remove, 931 .remove = usb_hcd_pci_remove,
932 .shutdown = uhci_shutdown,
848 933
849#ifdef CONFIG_PM 934#ifdef CONFIG_PM
850 .suspend = usb_hcd_pci_suspend, 935 .suspend = usb_hcd_pci_suspend,
diff --git a/drivers/usb/host/uhci-hcd.h b/drivers/usb/host/uhci-hcd.h
index 02255d69e1fe..bf9c5f9b508b 100644
--- a/drivers/usb/host/uhci-hcd.h
+++ b/drivers/usb/host/uhci-hcd.h
@@ -41,6 +41,7 @@
41#define USBFRNUM 6 41#define USBFRNUM 6
42#define USBFLBASEADD 8 42#define USBFLBASEADD 8
43#define USBSOF 12 43#define USBSOF 12
44#define USBSOF_DEFAULT 64 /* Frame length is exactly 1 ms */
44 45
45/* USB port status and control registers */ 46/* USB port status and control registers */
46#define USBPORTSC1 16 47#define USBPORTSC1 16
@@ -66,6 +67,8 @@
66/* Legacy support register */ 67/* Legacy support register */
67#define USBLEGSUP 0xc0 68#define USBLEGSUP 0xc0
68#define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */ 69#define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
70#define USBLEGSUP_RWC 0x8f00 /* the R/WC bits */
71#define USBLEGSUP_RO 0x5040 /* R/O and reserved bits */
69 72
70#define UHCI_NULL_DATA_SIZE 0x7FF /* for UHCI controller TD */ 73#define UHCI_NULL_DATA_SIZE 0x7FF /* for UHCI controller TD */
71 74
@@ -111,7 +114,6 @@ struct uhci_qh {
111 /* Software fields */ 114 /* Software fields */
112 dma_addr_t dma_handle; 115 dma_addr_t dma_handle;
113 116
114 struct usb_device *dev;
115 struct urb_priv *urbp; 117 struct urb_priv *urbp;
116 118
117 struct list_head list; /* P: uhci->frame_list_lock */ 119 struct list_head list; /* P: uhci->frame_list_lock */
@@ -203,7 +205,6 @@ struct uhci_td {
203 /* Software fields */ 205 /* Software fields */
204 dma_addr_t dma_handle; 206 dma_addr_t dma_handle;
205 207
206 struct usb_device *dev;
207 struct urb *urb; 208 struct urb *urb;
208 209
209 struct list_head list; /* P: urb->lock */ 210 struct list_head list; /* P: urb->lock */
@@ -314,26 +315,32 @@ static inline int __interval_to_skel(int interval)
314} 315}
315 316
316/* 317/*
317 * Device states for the host controller. 318 * States for the root hub.
318 * 319 *
319 * To prevent "bouncing" in the presence of electrical noise, 320 * To prevent "bouncing" in the presence of electrical noise,
320 * we insist on a 1-second "grace" period, before switching to 321 * when there are no devices attached we delay for 1 second in the
321 * the RUNNING or SUSPENDED states, during which the state is 322 * RUNNING_NODEVS state before switching to the AUTO_STOPPED state.
322 * not allowed to change. 323 *
323 * 324 * (Note that the AUTO_STOPPED state won't be necessary once the hub
324 * The resume process is divided into substates in order to avoid 325 * driver learns to autosuspend.)
325 * potentially length delays during the timer handler.
326 *
327 * States in which the host controller is halted must have values <= 0.
328 */ 326 */
329enum uhci_state { 327enum uhci_rh_state {
330 UHCI_RESET, 328 /* In the following states the HC must be halted.
331 UHCI_RUNNING_GRACE, /* Before RUNNING */ 329 * These two must come first */
332 UHCI_RUNNING, /* The normal state */ 330 UHCI_RH_RESET,
333 UHCI_SUSPENDING_GRACE, /* Before SUSPENDED */ 331 UHCI_RH_SUSPENDED,
334 UHCI_SUSPENDED = -10, /* When no devices are attached */ 332
335 UHCI_RESUMING_1, 333 UHCI_RH_AUTO_STOPPED,
336 UHCI_RESUMING_2 334 UHCI_RH_RESUMING,
335
336 /* In this state the HC changes from running to halted,
337 * so it can legally appear either way. */
338 UHCI_RH_SUSPENDING,
339
340 /* In the following states it's an error if the HC is halted.
341 * These two must come last */
342 UHCI_RH_RUNNING, /* The normal state */
343 UHCI_RH_RUNNING_NODEVS, /* Running with no devices attached */
337}; 344};
338 345
339/* 346/*
@@ -363,15 +370,16 @@ struct uhci_hcd {
363 int fsbr; /* Full-speed bandwidth reclamation */ 370 int fsbr; /* Full-speed bandwidth reclamation */
364 unsigned long fsbrtimeout; /* FSBR delay */ 371 unsigned long fsbrtimeout; /* FSBR delay */
365 372
366 enum uhci_state state; /* FIXME: needs a spinlock */ 373 enum uhci_rh_state rh_state;
367 unsigned long state_end; /* Time of next transition */ 374 unsigned long auto_stop_time; /* When to AUTO_STOP */
375
368 unsigned int frame_number; /* As of last check */ 376 unsigned int frame_number; /* As of last check */
369 unsigned int is_stopped; 377 unsigned int is_stopped;
370#define UHCI_IS_STOPPED 9999 /* Larger than a frame # */ 378#define UHCI_IS_STOPPED 9999 /* Larger than a frame # */
371 379
372 unsigned int scan_in_progress:1; /* Schedule scan is running */ 380 unsigned int scan_in_progress:1; /* Schedule scan is running */
373 unsigned int need_rescan:1; /* Redo the schedule scan */ 381 unsigned int need_rescan:1; /* Redo the schedule scan */
374 unsigned int resume_detect:1; /* Need a Global Resume */ 382 unsigned int hc_inaccessible:1; /* HC is suspended or dead */
375 383
376 /* Support for port suspend/resume/reset */ 384 /* Support for port suspend/resume/reset */
377 unsigned long port_c_suspend; /* Bit-arrays of ports */ 385 unsigned long port_c_suspend; /* Bit-arrays of ports */
@@ -451,4 +459,11 @@ struct urb_priv {
451 * #2 urb->lock 459 * #2 urb->lock
452 */ 460 */
453 461
462
463/* Some special IDs */
464
465#define PCI_VENDOR_ID_GENESYS 0x17a0
466#define PCI_DEVICE_ID_GL880S_UHCI 0x8083
467#define PCI_DEVICE_ID_GL880S_EHCI 0x8084
468
454#endif 469#endif
diff --git a/drivers/usb/host/uhci-hub.c b/drivers/usb/host/uhci-hub.c
index 4c45ba8390f8..4eace2b19ddb 100644
--- a/drivers/usb/host/uhci-hub.c
+++ b/drivers/usb/host/uhci-hub.c
@@ -33,9 +33,24 @@ static __u8 root_hub_hub_des[] =
33/* status change bits: nonzero writes will clear */ 33/* status change bits: nonzero writes will clear */
34#define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC) 34#define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
35 35
36static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf) 36/* A port that either is connected or has a changed-bit set will prevent
37 * us from AUTO_STOPPING.
38 */
39static int any_ports_active(struct uhci_hcd *uhci)
40{
41 int port;
42
43 for (port = 0; port < uhci->rh_numports; ++port) {
44 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) &
45 (USBPORTSC_CCS | RWC_BITS)) ||
46 test_bit(port, &uhci->port_c_suspend))
47 return 1;
48 }
49 return 0;
50}
51
52static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
37{ 53{
38 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
39 int port; 54 int port;
40 55
41 *buf = 0; 56 *buf = 0;
@@ -44,8 +59,6 @@ static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
44 test_bit(port, &uhci->port_c_suspend)) 59 test_bit(port, &uhci->port_c_suspend))
45 *buf |= (1 << (port + 1)); 60 *buf |= (1 << (port + 1));
46 } 61 }
47 if (*buf && uhci->state == UHCI_SUSPENDED)
48 uhci->resume_detect = 1;
49 return !!*buf; 62 return !!*buf;
50} 63}
51 64
@@ -115,6 +128,11 @@ static void uhci_check_ports(struct uhci_hcd *uhci)
115 set_bit(port, &uhci->resuming_ports); 128 set_bit(port, &uhci->resuming_ports);
116 uhci->ports_timeout = jiffies + 129 uhci->ports_timeout = jiffies +
117 msecs_to_jiffies(20); 130 msecs_to_jiffies(20);
131
132 /* Make sure we see the port again
133 * after the resuming period is over. */
134 mod_timer(&uhci_to_hcd(uhci)->rh_timer,
135 uhci->ports_timeout);
118 } else if (time_after_eq(jiffies, 136 } else if (time_after_eq(jiffies,
119 uhci->ports_timeout)) { 137 uhci->ports_timeout)) {
120 uhci_finish_suspend(uhci, port, port_addr); 138 uhci_finish_suspend(uhci, port, port_addr);
@@ -123,6 +141,60 @@ static void uhci_check_ports(struct uhci_hcd *uhci)
123 } 141 }
124} 142}
125 143
144static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
145{
146 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
147 unsigned long flags;
148 int status;
149
150 spin_lock_irqsave(&uhci->lock, flags);
151 if (uhci->hc_inaccessible) {
152 status = 0;
153 goto done;
154 }
155
156 uhci_check_ports(uhci);
157 status = get_hub_status_data(uhci, buf);
158
159 switch (uhci->rh_state) {
160 case UHCI_RH_SUSPENDING:
161 case UHCI_RH_SUSPENDED:
162 /* if port change, ask to be resumed */
163 if (status)
164 usb_hcd_resume_root_hub(hcd);
165 break;
166
167 case UHCI_RH_AUTO_STOPPED:
168 /* if port change, auto start */
169 if (status)
170 wakeup_rh(uhci);
171 break;
172
173 case UHCI_RH_RUNNING:
174 /* are any devices attached? */
175 if (!any_ports_active(uhci)) {
176 uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
177 uhci->auto_stop_time = jiffies + HZ;
178 }
179 break;
180
181 case UHCI_RH_RUNNING_NODEVS:
182 /* auto-stop if nothing connected for 1 second */
183 if (any_ports_active(uhci))
184 uhci->rh_state = UHCI_RH_RUNNING;
185 else if (time_after_eq(jiffies, uhci->auto_stop_time))
186 suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
187 break;
188
189 default:
190 break;
191 }
192
193done:
194 spin_unlock_irqrestore(&uhci->lock, flags);
195 return status;
196}
197
126/* size of returned buffer is part of USB spec */ 198/* size of returned buffer is part of USB spec */
127static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 199static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
128 u16 wIndex, char *buf, u16 wLength) 200 u16 wIndex, char *buf, u16 wLength)
@@ -134,6 +206,9 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
134 u16 wPortChange, wPortStatus; 206 u16 wPortChange, wPortStatus;
135 unsigned long flags; 207 unsigned long flags;
136 208
209 if (uhci->hc_inaccessible)
210 return -ETIMEDOUT;
211
137 spin_lock_irqsave(&uhci->lock, flags); 212 spin_lock_irqsave(&uhci->lock, flags);
138 switch (typeReq) { 213 switch (typeReq) {
139 214
diff --git a/drivers/usb/host/uhci-q.c b/drivers/usb/host/uhci-q.c
index 2a7c19501f24..5f18084a116d 100644
--- a/drivers/usb/host/uhci-q.c
+++ b/drivers/usb/host/uhci-q.c
@@ -32,6 +32,8 @@ static void uhci_free_pending_tds(struct uhci_hcd *uhci);
32 */ 32 */
33static inline void uhci_set_next_interrupt(struct uhci_hcd *uhci) 33static inline void uhci_set_next_interrupt(struct uhci_hcd *uhci)
34{ 34{
35 if (uhci->is_stopped)
36 mod_timer(&uhci->stall_timer, jiffies);
35 uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC); 37 uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
36} 38}
37 39
@@ -46,7 +48,7 @@ static inline void uhci_moveto_complete(struct uhci_hcd *uhci,
46 list_move_tail(&urbp->urb_list, &uhci->complete_list); 48 list_move_tail(&urbp->urb_list, &uhci->complete_list);
47} 49}
48 50
49static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci, struct usb_device *dev) 51static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
50{ 52{
51 dma_addr_t dma_handle; 53 dma_addr_t dma_handle;
52 struct uhci_td *td; 54 struct uhci_td *td;
@@ -61,14 +63,11 @@ static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci, struct usb_device *d
61 td->buffer = 0; 63 td->buffer = 0;
62 64
63 td->frame = -1; 65 td->frame = -1;
64 td->dev = dev;
65 66
66 INIT_LIST_HEAD(&td->list); 67 INIT_LIST_HEAD(&td->list);
67 INIT_LIST_HEAD(&td->remove_list); 68 INIT_LIST_HEAD(&td->remove_list);
68 INIT_LIST_HEAD(&td->fl_list); 69 INIT_LIST_HEAD(&td->fl_list);
69 70
70 usb_get_dev(dev);
71
72 return td; 71 return td;
73} 72}
74 73
@@ -168,13 +167,10 @@ static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
168 if (!list_empty(&td->fl_list)) 167 if (!list_empty(&td->fl_list))
169 dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td); 168 dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
170 169
171 if (td->dev)
172 usb_put_dev(td->dev);
173
174 dma_pool_free(uhci->td_pool, td, td->dma_handle); 170 dma_pool_free(uhci->td_pool, td, td->dma_handle);
175} 171}
176 172
177static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci, struct usb_device *dev) 173static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci)
178{ 174{
179 dma_addr_t dma_handle; 175 dma_addr_t dma_handle;
180 struct uhci_qh *qh; 176 struct uhci_qh *qh;
@@ -188,14 +184,11 @@ static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci, struct usb_device *d
188 qh->element = UHCI_PTR_TERM; 184 qh->element = UHCI_PTR_TERM;
189 qh->link = UHCI_PTR_TERM; 185 qh->link = UHCI_PTR_TERM;
190 186
191 qh->dev = dev;
192 qh->urbp = NULL; 187 qh->urbp = NULL;
193 188
194 INIT_LIST_HEAD(&qh->list); 189 INIT_LIST_HEAD(&qh->list);
195 INIT_LIST_HEAD(&qh->remove_list); 190 INIT_LIST_HEAD(&qh->remove_list);
196 191
197 usb_get_dev(dev);
198
199 return qh; 192 return qh;
200} 193}
201 194
@@ -206,9 +199,6 @@ static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
206 if (!list_empty(&qh->remove_list)) 199 if (!list_empty(&qh->remove_list))
207 dev_warn(uhci_dev(uhci), "qh %p still in remove_list!\n", qh); 200 dev_warn(uhci_dev(uhci), "qh %p still in remove_list!\n", qh);
208 201
209 if (qh->dev)
210 usb_put_dev(qh->dev);
211
212 dma_pool_free(uhci->qh_pool, qh, qh->dma_handle); 202 dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
213} 203}
214 204
@@ -597,7 +587,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur
597 /* 587 /*
598 * Build the TD for the control request setup packet 588 * Build the TD for the control request setup packet
599 */ 589 */
600 td = uhci_alloc_td(uhci, urb->dev); 590 td = uhci_alloc_td(uhci);
601 if (!td) 591 if (!td)
602 return -ENOMEM; 592 return -ENOMEM;
603 593
@@ -626,7 +616,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur
626 if (pktsze > maxsze) 616 if (pktsze > maxsze)
627 pktsze = maxsze; 617 pktsze = maxsze;
628 618
629 td = uhci_alloc_td(uhci, urb->dev); 619 td = uhci_alloc_td(uhci);
630 if (!td) 620 if (!td)
631 return -ENOMEM; 621 return -ENOMEM;
632 622
@@ -644,7 +634,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur
644 /* 634 /*
645 * Build the final TD for control status 635 * Build the final TD for control status
646 */ 636 */
647 td = uhci_alloc_td(uhci, urb->dev); 637 td = uhci_alloc_td(uhci);
648 if (!td) 638 if (!td)
649 return -ENOMEM; 639 return -ENOMEM;
650 640
@@ -666,7 +656,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur
666 uhci_fill_td(td, status | TD_CTRL_IOC, 656 uhci_fill_td(td, status | TD_CTRL_IOC,
667 destination | uhci_explen(UHCI_NULL_DATA_SIZE), 0); 657 destination | uhci_explen(UHCI_NULL_DATA_SIZE), 0);
668 658
669 qh = uhci_alloc_qh(uhci, urb->dev); 659 qh = uhci_alloc_qh(uhci);
670 if (!qh) 660 if (!qh)
671 return -ENOMEM; 661 return -ENOMEM;
672 662
@@ -865,7 +855,7 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb
865 status &= ~TD_CTRL_SPD; 855 status &= ~TD_CTRL_SPD;
866 } 856 }
867 857
868 td = uhci_alloc_td(uhci, urb->dev); 858 td = uhci_alloc_td(uhci);
869 if (!td) 859 if (!td)
870 return -ENOMEM; 860 return -ENOMEM;
871 861
@@ -891,7 +881,7 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb
891 */ 881 */
892 if (usb_pipeout(urb->pipe) && (urb->transfer_flags & URB_ZERO_PACKET) && 882 if (usb_pipeout(urb->pipe) && (urb->transfer_flags & URB_ZERO_PACKET) &&
893 !len && urb->transfer_buffer_length) { 883 !len && urb->transfer_buffer_length) {
894 td = uhci_alloc_td(uhci, urb->dev); 884 td = uhci_alloc_td(uhci);
895 if (!td) 885 if (!td)
896 return -ENOMEM; 886 return -ENOMEM;
897 887
@@ -913,7 +903,7 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb
913 * flag setting. */ 903 * flag setting. */
914 td->status |= cpu_to_le32(TD_CTRL_IOC); 904 td->status |= cpu_to_le32(TD_CTRL_IOC);
915 905
916 qh = uhci_alloc_qh(uhci, urb->dev); 906 qh = uhci_alloc_qh(uhci);
917 if (!qh) 907 if (!qh)
918 return -ENOMEM; 908 return -ENOMEM;
919 909
@@ -1096,7 +1086,7 @@ static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1096 if (!urb->iso_frame_desc[i].length) 1086 if (!urb->iso_frame_desc[i].length)
1097 continue; 1087 continue;
1098 1088
1099 td = uhci_alloc_td(uhci, urb->dev); 1089 td = uhci_alloc_td(uhci);
1100 if (!td) 1090 if (!td)
1101 return -ENOMEM; 1091 return -ENOMEM;
1102 1092
@@ -1497,6 +1487,7 @@ static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs)
1497 rescan: 1487 rescan:
1498 uhci->need_rescan = 0; 1488 uhci->need_rescan = 0;
1499 1489
1490 uhci_clear_next_interrupt(uhci);
1500 uhci_get_current_frame_number(uhci); 1491 uhci_get_current_frame_number(uhci);
1501 1492
1502 if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) 1493 if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age)
@@ -1537,3 +1528,26 @@ static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs)
1537 /* Wake up anyone waiting for an URB to complete */ 1528 /* Wake up anyone waiting for an URB to complete */
1538 wake_up_all(&uhci->waitqh); 1529 wake_up_all(&uhci->waitqh);
1539} 1530}
1531
1532static void check_fsbr(struct uhci_hcd *uhci)
1533{
1534 struct urb_priv *up;
1535
1536 list_for_each_entry(up, &uhci->urb_list, urb_list) {
1537 struct urb *u = up->urb;
1538
1539 spin_lock(&u->lock);
1540
1541 /* Check if the FSBR timed out */
1542 if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT))
1543 uhci_fsbr_timeout(uhci, u);
1544
1545 spin_unlock(&u->lock);
1546 }
1547
1548 /* Really disable FSBR */
1549 if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) {
1550 uhci->fsbrtimeout = 0;
1551 uhci->skel_term_qh->link = UHCI_PTR_TERM;
1552 }
1553}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 22:25:56 -0500