aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/usb/host/xhci.h
diff options
context:
space:
mode:
authorSarah Sharp <sarah.a.sharp@linux.intel.com>2009-04-27 22:52:28 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-06-16 00:44:48 -0400
commit66d4eadd8d067269ea8fead1a50fe87c2979a80d (patch)
treeb0324868818058161e528bd194f6888456924fd4 /drivers/usb/host/xhci.h
parent74c6874199af98e602bb7c5fb1beb9cffda98729 (diff)
USB: xhci: BIOS handoff and HW initialization.
Add PCI initialization code to take control of the xHCI host controller away from the BIOS, halt, and reset the host controller. The xHCI spec says that BIOSes must give up the host controller within 5 seconds. Add some host controller glue functions to handle hardware initialization and memory allocation for the host controller. The current xHCI prototypes use PCI interrupts, but the xHCI spec requires MSI-X interrupts. Add code to support MSI-X interrupts, but use the PCI interrupts for now. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/xhci.h')
-rw-r--r--drivers/usb/host/xhci.h63
1 files changed, 61 insertions, 2 deletions
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index a4d44aad0697..59fae2e5ea59 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -32,6 +32,9 @@
32/* xHCI PCI Configuration Registers */ 32/* xHCI PCI Configuration Registers */
33#define XHCI_SBRN_OFFSET (0x60) 33#define XHCI_SBRN_OFFSET (0x60)
34 34
35/* Max number of USB devices for any host controller - limit in section 6.1 */
36#define MAX_HC_SLOTS 256
37
35/* 38/*
36 * xHCI register interface. 39 * xHCI register interface.
37 * This corresponds to the eXtensible Host Controller Interface (xHCI) 40 * This corresponds to the eXtensible Host Controller Interface (xHCI)
@@ -359,10 +362,35 @@ struct intr_reg {
359 u32 erst_dequeue[2]; 362 u32 erst_dequeue[2];
360} __attribute__ ((packed)); 363} __attribute__ ((packed));
361 364
365/* irq_pending bitmasks */
362#define ER_IRQ_PENDING(p) ((p) & 0x1) 366#define ER_IRQ_PENDING(p) ((p) & 0x1)
363#define ER_IRQ_ENABLE(p) ((p) | 0x2) 367/* bits 2:31 need to be preserved */
368#define ER_IRQ_CLEAR(p) ((p) & 0xfffffffe)
369#define ER_IRQ_ENABLE(p) ((ER_IRQ_CLEAR(p)) | 0x2)
370#define ER_IRQ_DISABLE(p) ((ER_IRQ_CLEAR(p)) & ~(0x2))
371
372/* irq_control bitmasks */
373/* Minimum interval between interrupts (in 250ns intervals). The interval
374 * between interrupts will be longer if there are no events on the event ring.
375 * Default is 4000 (1 ms).
376 */
377#define ER_IRQ_INTERVAL_MASK (0xffff)
378/* Counter used to count down the time to the next interrupt - HW use only */
379#define ER_IRQ_COUNTER_MASK (0xffff << 16)
380
381/* erst_size bitmasks */
364/* Preserve bits 16:31 of erst_size */ 382/* Preserve bits 16:31 of erst_size */
365#define ERST_SIZE_MASK (0xffff<<16) 383#define ERST_SIZE_MASK (0xffff << 16)
384
385/* erst_dequeue bitmasks */
386/* Dequeue ERST Segment Index (DESI) - Segment number (or alias)
387 * where the current dequeue pointer lies. This is an optional HW hint.
388 */
389#define ERST_DESI_MASK (0x7)
390/* Event Handler Busy (EHB) - is the event ring scheduled to be serviced by
391 * a work queue (or delayed service routine)?
392 */
393#define ERST_EHB (1 << 3)
366 394
367/** 395/**
368 * struct xhci_run_regs 396 * struct xhci_run_regs
@@ -386,6 +414,8 @@ struct xhci_hcd {
386 struct xhci_cap_regs __iomem *cap_regs; 414 struct xhci_cap_regs __iomem *cap_regs;
387 struct xhci_op_regs __iomem *op_regs; 415 struct xhci_op_regs __iomem *op_regs;
388 struct xhci_run_regs __iomem *run_regs; 416 struct xhci_run_regs __iomem *run_regs;
417 /* Our HCD's current interrupter register set */
418 struct intr_reg __iomem *ir_set;
389 419
390 /* Cached register copies of read-only HC data */ 420 /* Cached register copies of read-only HC data */
391 __u32 hcs_params1; 421 __u32 hcs_params1;
@@ -404,7 +434,13 @@ struct xhci_hcd {
404 u8 isoc_threshold; 434 u8 isoc_threshold;
405 int event_ring_max; 435 int event_ring_max;
406 int addr_64; 436 int addr_64;
437 /* 4KB min, 128MB max */
407 int page_size; 438 int page_size;
439 /* Valid values are 12 to 20, inclusive */
440 int page_shift;
441 /* only one MSI vector for now, but might need more later */
442 int msix_count;
443 struct msix_entry *msix_entries;
408}; 444};
409 445
410/* convert between an HCD pointer and the corresponding EHCI_HCD */ 446/* convert between an HCD pointer and the corresponding EHCI_HCD */
@@ -449,4 +485,27 @@ static inline void xhci_writel(const struct xhci_hcd *xhci,
449 writel(val, regs); 485 writel(val, regs);
450} 486}
451 487
488/* xHCI debugging */
489void xhci_print_ir_set(struct xhci_hcd *xhci, struct intr_reg *ir_set, int set_num);
490void xhci_print_registers(struct xhci_hcd *xhci);
491
492/* xHCI memory managment */
493void xhci_mem_cleanup(struct xhci_hcd *xhci);
494int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags);
495
496#ifdef CONFIG_PCI
497/* xHCI PCI glue */
498int xhci_register_pci(void);
499void xhci_unregister_pci(void);
500#endif
501
502/* xHCI host controller glue */
503int xhci_halt(struct xhci_hcd *xhci);
504int xhci_reset(struct xhci_hcd *xhci);
505int xhci_init(struct usb_hcd *hcd);
506int xhci_run(struct usb_hcd *hcd);
507void xhci_stop(struct usb_hcd *hcd);
508void xhci_shutdown(struct usb_hcd *hcd);
509int xhci_get_frame(struct usb_hcd *hcd);
510
452#endif /* __LINUX_XHCI_HCD_H */ 511#endif /* __LINUX_XHCI_HCD_H */