diff options
author | Xenia Ragiadakou <burzalodowa@gmail.com> | 2013-09-09 14:03:09 -0400 |
---|---|---|
committer | Sarah Sharp <sarah.a.sharp@linux.intel.com> | 2013-12-02 15:59:44 -0500 |
commit | 587194873820a4a1b2eda260ac851394095afd77 (patch) | |
tree | 7edbeab125f70ad6893f915bf4aa2dbf779908e0 /drivers/usb/host/xhci-mem.c | |
parent | 6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff) |
xhci: convert TRB_CYCLE to le32 before using it to set Link TRB's cycle bit
This patch converts TRB_CYCLE to le32 to update correctly the Cycle Bit in
'control' field of the link TRB.
This bug was found using sparse.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Diffstat (limited to 'drivers/usb/host/xhci-mem.c')
-rw-r--r-- | drivers/usb/host/xhci-mem.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 49b8bd063fab..90709cf45ee5 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c | |||
@@ -57,7 +57,7 @@ static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, | |||
57 | /* If the cycle state is 0, set the cycle bit to 1 for all the TRBs */ | 57 | /* If the cycle state is 0, set the cycle bit to 1 for all the TRBs */ |
58 | if (cycle_state == 0) { | 58 | if (cycle_state == 0) { |
59 | for (i = 0; i < TRBS_PER_SEGMENT; i++) | 59 | for (i = 0; i < TRBS_PER_SEGMENT; i++) |
60 | seg->trbs[i].link.control |= TRB_CYCLE; | 60 | seg->trbs[i].link.control |= cpu_to_le32(TRB_CYCLE); |
61 | } | 61 | } |
62 | seg->dma = dma; | 62 | seg->dma = dma; |
63 | seg->next = NULL; | 63 | seg->next = NULL; |
@@ -308,7 +308,8 @@ static void xhci_reinit_cached_ring(struct xhci_hcd *xhci, | |||
308 | sizeof(union xhci_trb)*TRBS_PER_SEGMENT); | 308 | sizeof(union xhci_trb)*TRBS_PER_SEGMENT); |
309 | if (cycle_state == 0) { | 309 | if (cycle_state == 0) { |
310 | for (i = 0; i < TRBS_PER_SEGMENT; i++) | 310 | for (i = 0; i < TRBS_PER_SEGMENT; i++) |
311 | seg->trbs[i].link.control |= TRB_CYCLE; | 311 | seg->trbs[i].link.control |= |
312 | cpu_to_le32(TRB_CYCLE); | ||
312 | } | 313 | } |
313 | /* All endpoint rings have link TRBs */ | 314 | /* All endpoint rings have link TRBs */ |
314 | xhci_link_segments(xhci, seg, seg->next, type); | 315 | xhci_link_segments(xhci, seg, seg->next, type); |