diff options
author | Andiry Xu <andiry.xu@amd.com> | 2011-09-23 17:19:48 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-09-26 18:51:08 -0400 |
commit | c9682dffceb4bb3bdf6df4c0c87c4b887b03f5b7 (patch) | |
tree | fe565d63db99160febc6824f091ba4217c5917c9 /drivers/usb/host/xhci-hub.c | |
parent | 1ff4df56846d10379939166713bb2908e6a5ee0e (diff) |
xHCI: set link state
Introduce xhci_set_link_state() to remove redundant codes.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/xhci-hub.c')
-rw-r--r-- | drivers/usb/host/xhci-hub.c | 72 |
1 files changed, 29 insertions, 43 deletions
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c index 7a62b023b4d1..ef03c18a0128 100644 --- a/drivers/usb/host/xhci-hub.c +++ b/drivers/usb/host/xhci-hub.c | |||
@@ -392,13 +392,25 @@ static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array) | |||
392 | return max_ports; | 392 | return max_ports; |
393 | } | 393 | } |
394 | 394 | ||
395 | void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array, | ||
396 | int port_id, u32 link_state) | ||
397 | { | ||
398 | u32 temp; | ||
399 | |||
400 | temp = xhci_readl(xhci, port_array[port_id]); | ||
401 | temp = xhci_port_state_to_neutral(temp); | ||
402 | temp &= ~PORT_PLS_MASK; | ||
403 | temp |= PORT_LINK_STROBE | link_state; | ||
404 | xhci_writel(xhci, temp, port_array[port_id]); | ||
405 | } | ||
406 | |||
395 | int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | 407 | int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, |
396 | u16 wIndex, char *buf, u16 wLength) | 408 | u16 wIndex, char *buf, u16 wLength) |
397 | { | 409 | { |
398 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | 410 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
399 | int max_ports; | 411 | int max_ports; |
400 | unsigned long flags; | 412 | unsigned long flags; |
401 | u32 temp, temp1, status; | 413 | u32 temp, status; |
402 | int retval = 0; | 414 | int retval = 0; |
403 | __le32 __iomem **port_array; | 415 | __le32 __iomem **port_array; |
404 | int slot_id; | 416 | int slot_id; |
@@ -472,11 +484,8 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
472 | xhci_dbg(xhci, "Resume USB2 port %d\n", | 484 | xhci_dbg(xhci, "Resume USB2 port %d\n", |
473 | wIndex + 1); | 485 | wIndex + 1); |
474 | bus_state->resume_done[wIndex] = 0; | 486 | bus_state->resume_done[wIndex] = 0; |
475 | temp1 = xhci_port_state_to_neutral(temp); | 487 | xhci_set_link_state(xhci, port_array, wIndex, |
476 | temp1 &= ~PORT_PLS_MASK; | 488 | XDEV_U0); |
477 | temp1 |= PORT_LINK_STROBE | XDEV_U0; | ||
478 | xhci_writel(xhci, temp1, port_array[wIndex]); | ||
479 | |||
480 | xhci_dbg(xhci, "set port %d resume\n", | 489 | xhci_dbg(xhci, "set port %d resume\n", |
481 | wIndex + 1); | 490 | wIndex + 1); |
482 | slot_id = xhci_find_slot_id_by_port(hcd, xhci, | 491 | slot_id = xhci_find_slot_id_by_port(hcd, xhci, |
@@ -573,10 +582,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
573 | xhci_stop_device(xhci, slot_id, 1); | 582 | xhci_stop_device(xhci, slot_id, 1); |
574 | spin_lock_irqsave(&xhci->lock, flags); | 583 | spin_lock_irqsave(&xhci->lock, flags); |
575 | 584 | ||
576 | temp = xhci_port_state_to_neutral(temp); | 585 | xhci_set_link_state(xhci, port_array, wIndex, XDEV_U3); |
577 | temp &= ~PORT_PLS_MASK; | ||
578 | temp |= PORT_LINK_STROBE | XDEV_U3; | ||
579 | xhci_writel(xhci, temp, port_array[wIndex]); | ||
580 | 586 | ||
581 | spin_unlock_irqrestore(&xhci->lock, flags); | 587 | spin_unlock_irqrestore(&xhci->lock, flags); |
582 | msleep(10); /* wait device to enter */ | 588 | msleep(10); /* wait device to enter */ |
@@ -610,10 +616,8 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
610 | } | 616 | } |
611 | } | 617 | } |
612 | 618 | ||
613 | temp = xhci_port_state_to_neutral(temp); | 619 | xhci_set_link_state(xhci, port_array, wIndex, |
614 | temp &= ~PORT_PLS_MASK; | 620 | link_state); |
615 | temp |= PORT_LINK_STROBE | link_state; | ||
616 | xhci_writel(xhci, temp, port_array[wIndex]); | ||
617 | 621 | ||
618 | spin_unlock_irqrestore(&xhci->lock, flags); | 622 | spin_unlock_irqrestore(&xhci->lock, flags); |
619 | msleep(20); /* wait device to enter */ | 623 | msleep(20); /* wait device to enter */ |
@@ -677,24 +681,13 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
677 | if ((temp & PORT_PE) == 0) | 681 | if ((temp & PORT_PE) == 0) |
678 | goto error; | 682 | goto error; |
679 | 683 | ||
680 | temp = xhci_port_state_to_neutral(temp); | 684 | xhci_set_link_state(xhci, port_array, wIndex, |
681 | temp &= ~PORT_PLS_MASK; | 685 | XDEV_RESUME); |
682 | temp |= PORT_LINK_STROBE | XDEV_RESUME; | 686 | spin_unlock_irqrestore(&xhci->lock, flags); |
683 | xhci_writel(xhci, temp, | ||
684 | port_array[wIndex]); | ||
685 | |||
686 | spin_unlock_irqrestore(&xhci->lock, | ||
687 | flags); | ||
688 | msleep(20); | 687 | msleep(20); |
689 | spin_lock_irqsave(&xhci->lock, flags); | 688 | spin_lock_irqsave(&xhci->lock, flags); |
690 | 689 | xhci_set_link_state(xhci, port_array, wIndex, | |
691 | temp = xhci_readl(xhci, | 690 | XDEV_U0); |
692 | port_array[wIndex]); | ||
693 | temp = xhci_port_state_to_neutral(temp); | ||
694 | temp &= ~PORT_PLS_MASK; | ||
695 | temp |= PORT_LINK_STROBE | XDEV_U0; | ||
696 | xhci_writel(xhci, temp, | ||
697 | port_array[wIndex]); | ||
698 | } | 691 | } |
699 | bus_state->port_c_suspend |= 1 << wIndex; | 692 | bus_state->port_c_suspend |= 1 << wIndex; |
700 | 693 | ||
@@ -910,25 +903,18 @@ int xhci_bus_resume(struct usb_hcd *hcd) | |||
910 | if (test_bit(port_index, &bus_state->bus_suspended) && | 903 | if (test_bit(port_index, &bus_state->bus_suspended) && |
911 | (temp & PORT_PLS_MASK)) { | 904 | (temp & PORT_PLS_MASK)) { |
912 | if (DEV_SUPERSPEED(temp)) { | 905 | if (DEV_SUPERSPEED(temp)) { |
913 | temp = xhci_port_state_to_neutral(temp); | 906 | xhci_set_link_state(xhci, port_array, |
914 | temp &= ~PORT_PLS_MASK; | 907 | port_index, XDEV_U0); |
915 | temp |= PORT_LINK_STROBE | XDEV_U0; | ||
916 | xhci_writel(xhci, temp, port_array[port_index]); | ||
917 | } else { | 908 | } else { |
918 | temp = xhci_port_state_to_neutral(temp); | 909 | xhci_set_link_state(xhci, port_array, |
919 | temp &= ~PORT_PLS_MASK; | 910 | port_index, XDEV_RESUME); |
920 | temp |= PORT_LINK_STROBE | XDEV_RESUME; | ||
921 | xhci_writel(xhci, temp, port_array[port_index]); | ||
922 | 911 | ||
923 | spin_unlock_irqrestore(&xhci->lock, flags); | 912 | spin_unlock_irqrestore(&xhci->lock, flags); |
924 | msleep(20); | 913 | msleep(20); |
925 | spin_lock_irqsave(&xhci->lock, flags); | 914 | spin_lock_irqsave(&xhci->lock, flags); |
926 | 915 | ||
927 | temp = xhci_readl(xhci, port_array[port_index]); | 916 | xhci_set_link_state(xhci, port_array, |
928 | temp = xhci_port_state_to_neutral(temp); | 917 | port_index, XDEV_U0); |
929 | temp &= ~PORT_PLS_MASK; | ||
930 | temp |= PORT_LINK_STROBE | XDEV_U0; | ||
931 | xhci_writel(xhci, temp, port_array[port_index]); | ||
932 | } | 918 | } |
933 | /* wait for the port to enter U0 and report port link | 919 | /* wait for the port to enter U0 and report port link |
934 | * state change. | 920 | * state change. |