diff options
author | Alex He <alex.he@amd.com> | 2012-03-29 22:21:38 -0400 |
---|---|---|
committer | Sarah Sharp <sarah.a.sharp@linux.intel.com> | 2012-04-11 11:31:06 -0400 |
commit | 95018a53f7653e791bba1f54c8d75d9cb700d1bd (patch) | |
tree | 943dcbd00aac0b5aa623dede2d77619cd83ca18a /drivers/usb/host/xhci-ext-caps.h | |
parent | 3fc8206d3dca1550eb0a1f6e2a350881835954ba (diff) |
xHCI: Correct the #define XHCI_LEGACY_DISABLE_SMI
Re-define XHCI_LEGACY_DISABLE_SMI and used it in right way. All SMI enable
bits will be cleared to zero and flag bits 29:31 are also cleared to zero.
Other bits should be presvered as Table 146.
This patch should be backported to kernels as old as 2.6.31.
Signed-off-by: Alex He <alex.he@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/usb/host/xhci-ext-caps.h')
-rw-r--r-- | drivers/usb/host/xhci-ext-caps.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h index c7f33123d4c0..377f4242dabb 100644 --- a/drivers/usb/host/xhci-ext-caps.h +++ b/drivers/usb/host/xhci-ext-caps.h | |||
@@ -62,8 +62,9 @@ | |||
62 | /* USB Legacy Support Control and Status Register - section 7.1.2 */ | 62 | /* USB Legacy Support Control and Status Register - section 7.1.2 */ |
63 | /* Add this offset, plus the value of xECP in HCCPARAMS to the base address */ | 63 | /* Add this offset, plus the value of xECP in HCCPARAMS to the base address */ |
64 | #define XHCI_LEGACY_CONTROL_OFFSET (0x04) | 64 | #define XHCI_LEGACY_CONTROL_OFFSET (0x04) |
65 | /* bits 1:2, 5:12, and 17:19 need to be preserved; bits 21:28 should be zero */ | 65 | /* bits 1:3, 5:12, and 17:19 need to be preserved; bits 21:28 should be zero */ |
66 | #define XHCI_LEGACY_DISABLE_SMI ((0x3 << 1) + (0xff << 5) + (0x7 << 17)) | 66 | #define XHCI_LEGACY_DISABLE_SMI ((0x7 << 1) + (0xff << 5) + (0x7 << 17)) |
67 | #define XHCI_LEGACY_SMI_EVENTS (0x7 << 29) | ||
67 | 68 | ||
68 | /* USB 2.0 xHCI 0.96 L1C capability - section 7.2.2.1.3.2 */ | 69 | /* USB 2.0 xHCI 0.96 L1C capability - section 7.2.2.1.3.2 */ |
69 | #define XHCI_L1C (1 << 16) | 70 | #define XHCI_L1C (1 << 16) |